Jose E. Marchesi d8740be159 cpu,gas,opcodes: remove no longer needed workaround from the BPF port ... cpu/ChangeLog: 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com> * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64. * bpf.opc (bpf_print_insn): Do not set endian_code here. gas/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * config/tc-bpf.c (md_begin): Pass CGEN_CPU_OPEN_INSN_ENDIAN to bpf_cgen_cpu_open. (md_assemble): Remove no longer needed hack. opcodes/ChangeLog: 2020-06-04 Jose E. Marchesi <jose.marchesi@oracle.com> * disassemble.c (disassemble_init_for_target): Set endian_code for bpf targets. * bpf-desc.c: Regenerate. * bpf-opc.c: Likewise. * bpf-dis.c: Likewise.		2020-06-04 16:17:42 +02:00
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bpf.cpu	cpu,gas,opcodes: remove no longer needed workaround from the BPF port	2020-06-04 16:17:42 +02:00
bpf.opc	cpu,gas,opcodes: remove no longer needed workaround from the BPF port	2020-06-04 16:17:42 +02:00
ChangeLog	cpu,gas,opcodes: remove no longer needed workaround from the BPF port	2020-06-04 16:17:42 +02:00
cris.cpu
epiphany.cpu	Remove more shifts for sign/zero extension	2019-12-11 21:14:19 +10:30
epiphany.opc	epiphany/disassembler: Improve alignment of output.	2016-02-02 11:09:17 +00:00
fr30.cpu	ubsan: fr30: left shift of negative value	2020-01-13 12:12:05 +10:30
fr30.opc
frv.cpu	ubsan: frv: left shift of negative value	2020-02-01 23:23:18 +10:30
frv.opc	opcodes error messages	2018-03-03 11:34:26 +10:30
ip2k.cpu
ip2k.opc
iq10.cpu
iq2000.cpu	ubsan: iq2000: left shift of negative value	2019-12-23 18:04:12 +10:30
iq2000.opc
iq2000m.cpu
lm32.cpu	Remove more shifts for sign/zero extension	2019-12-11 21:14:19 +10:30
lm32.opc
m32c.cpu	ubsan: m32c: left shift of negative value	2020-02-03 15:59:08 +10:30
m32c.opc
m32r.cpu	ubsan: m32r: left shift of negative value	2020-01-04 19:20:33 +10:30
m32r.opc
mep-avc2.cpu
mep-avc.cpu
mep-c5.cpu
mep-core.cpu
mep-default.cpu
mep-ext-cop.cpu
mep-fmax.cpu
mep-h1.cpu
mep-ivc2.cpu
mep-rhcop.cpu
mep-sample-ucidsp.cpu
mep.cpu
mep.opc	opcodes: discriminate endianness and insn-endianness in CGEN ports	2020-06-04 16:17:42 +02:00
mt.cpu
mt.opc	cpu/	2012-02-27 06:57:57 +00:00
or1k.cpu	or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts	2020-05-19 20:40:27 +09:00
or1k.opc	cpu/or1k: Add support for orfp64a32 spec	2019-06-13 06:16:18 +09:00
or1kcommon.cpu	or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts	2020-05-19 20:40:27 +09:00
or1korbis.cpu	ubsan: or1k: left shift of negative value	2019-12-20 17:57:58 +10:30
or1korfpx.cpu	or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts	2020-05-19 20:40:27 +09:00
sh64-compact.cpu
sh64-media.cpu
sh.cpu
sh.opc
simplify.inc
xc16x.cpu
xc16x.opc
xstormy16.cpu	ubsan: xstormy16: left shift of negative value	2019-12-16 17:35:13 +10:30
xstormy16.opc