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802e8e6d84
This patch fixes hardware breakpoint regressions exposed by my fix for "PR breakpoints/7143 - Watchpoint does not trigger when first set", at https://sourceware.org/ml/gdb-patches/2014-03/msg00167.html The testsuite caught them on Linux/x86_64, at least. gdb.sum: gdb.sum: FAIL: gdb.base/hbreak2.exp: next over recursive call FAIL: gdb.base/hbreak2.exp: backtrace from factorial(5.1) FAIL: gdb.base/hbreak2.exp: continue until exit at recursive next test gdb.log: (gdb) next Program received signal SIGTRAP, Trace/breakpoint trap. factorial (value=4) at ../../../src/gdb/testsuite/gdb.base/break.c:113 113 if (value > 1) { /* set breakpoint 7 here */ (gdb) FAIL: gdb.base/hbreak2.exp: next over recursive call Actually, that patch just exposed a latent issue to "breakpoints always-inserted off" mode, not really caused it. After that patch, GDB no longer removes breakpoints at each internal event, thus making some scenarios behave like breakpoint always-inserted on. The bug is easy to trigger with always-inserted on. The issue is that since the target-side breakpoint conditions support, if the stub/server supports evaluating breakpoint conditions on the target side, then GDB is sending duplicate Zx packets to the target without removing them before, and GDBserver is not really expecting that for Z packets other than Z0/z0. E.g., with "set breakpoint always-inserted on" and "set debug remote 1": (gdb) b main Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) b main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z0,410943,1#48...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $Z0,410943,1#48...Packet received: OK Sending packet: $z0,410943,1#68...Packet received: OK And for Z1, similarly: (gdb) hbreak main Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 4 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Packet Z1 (hardware-breakpoint) is supported (gdb) hbreak main Note: breakpoint 4 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 5 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) hbreak main Note: breakpoints 4 and 5 also set at pc 0x410943. Sending packet: $m410943,1#ff...Packet received: 48 Hardware assisted breakpoint 6 at 0x410943: file ../../../src/gdb/gdbserver/server.c, line 3028. Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ (gdb) del Delete all breakpoints? (y or n) y Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $Z1,410943,1#49...Packet received: OK ^^^^^^^^^^^^ Sending packet: $z1,410943,1#69...Packet received: OK ^^^^^^^^^^^^ So GDB sent a bunch of Z1 packets, and then when finally removing the breakpoint, only one z1 packet was sent. On the GDBserver side (with monitor set debug-hw-points 1), in the Z1 case, we see: $ ./gdbserver :9999 ./gdbserver Process ./gdbserver created; pid = 8629 Listening on port 9999 Remote debugging from host 127.0.0.1 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=1 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=2 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=3 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 insert_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=5 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 remove_watchpoint (addr=410943, len=1, type=instruction-execute): CONTROL (DR7): 00000101 STATUS (DR6): 00000000 DR0: addr=0x410943, ref.count=4 DR1: addr=0x0, ref.count=0 DR2: addr=0x0, ref.count=0 DR3: addr=0x0, ref.count=0 That's one insert_watchpoint call for each Z1 packet, and then one remove_watchpoint call for the z1 packet. Notice how ref.count increased for each insert_watchpoint call, and then in the end, after GDB told GDBserver to forget about the hardware breakpoint, GDBserver ends with the the first debug register still with ref.count=4! IOW, the hardware breakpoint is left armed on the target, while on the GDB end it's gone. If the program happens to execute 0x410943 afterwards, then the CPU traps, GDBserver reports the trap to GDB, and GDB not having a breakpoint set at that address anymore, reports to the user a spurious SIGTRAP. This is exactly what is happening in the hbreak2.exp test, though in that case, it's a shared library event that triggers a breakpoint_re_set, when breakpoints are still inserted (because nowadays GDB doesn't remove breakpoints while handling internal events), and that recreates breakpoint locations, which likewise forces breakpoint reinsertion and Zx packet resends... That is a lot of bogus Zx duplication that should possibly be addressed on the GDB side. GDB resends Zx packets because the way to change the target-side condition, is to resend the breakpoint to the server with the new condition. (That's an option in the packet: e.g., "Z1,410943,1;X3,220027" for "hbreak main if 0". The packets in the examples above are shorter because the breakpoints don't have conditions attached). GDB doesn't remove the breakpoint first before reinserting it because that'd be bad for non-stop, as it'd open a window where the inferior could miss the breakpoint. The conditions actually haven't changed between the resends, but GDB isn't smart enough to realize that. (TBC, if the target doesn't support target-side conditions, then GDB doesn't trigger these resends (init_bp_location calls mark_breakpoint_location_modified, and that does nothing if condition evaluation is on the host side. The resends are caused by the 'loc->condition_changed = condition_modified.' line.) But, even if GDB was made smarter, GDBserver should really still handle the resends anyway. So target-side conditions also aren't really to blame. The documentation of the Z/z packets says: "To avoid potential problems with duplicate packets, the operations should be implemented in an idempotent way." As such, we may want to fix GDB, but we should definitely fix GDBserver. The fix is a prerequisite for target-side conditions on hardware breakpoints anyway (and while at it, on watchpoints too). GDBserver indeed already treats duplicate Z0 packets in an idempotent way. mem-break.c has the concept of high-level and low-level breakpoints, somewhat similar to GDB's split of breakpoints vs breakpoint locations, and keeps track of multiple breakpoints referencing the same address/location, for the case of an internal GDBserver breakpoint or a tracepoint being set at the same address as a GDB breakpoint. But, it only allows GDB to ever contribute one reference to a software breakpoint location. IOW, if gdbserver sees a Z0 packet for the same address where it already had a GDB breakpoint set, then GDBserver won't create another high-level GDB breakpoint. However, mem-break.c only tracks GDB Z0 breakpoints. The same logic should apply to all kinds of Zx packets. Currently, gdbserver passes down each duplicate Zx (other than Z0) request directly to the target->insert_point routine. The x86 watchpoint support itself refcounts watchpoint / hw breakpoint requests, to handle overlapping watchpoints, and save debug registers. But that code doesn't (and really shouldn't) handle the duplicate requests, assuming that for each insert there will be a corresponding remove. So the fix is to generalize mem-break.c to track all kinds of Zx breakpoints, and filter out duplicates. As mentioned, this ends up adding support for target-side conditions on hardware breakpoints and watchpoints too (though GDB itself doesn't support the latter yet). Probably the least obvious change in the patch is that it kind of turns the breakpoint insert/remove APIs inside out. Before, the target methods were only called for GDB breakpoints. The internal breakpoint set/delete methods inserted memory breakpoints directly bypassing the insert/remove target methods. That's not good when the target should use a debug API to set software breakpoints, instead of relying on GDBserver patching memory with breakpoint instructions, as is the case of NTO. Now removal/insertion of all kinds of breakpoints/watchpoints, either internal, or from GDB, always go through the target methods. The insert_point/remove_point methods no longer get passed a Z packet type, but an internal/raw breakpoint type. They're also passed a pointer to the raw breakpoint itself (note that's still opaque outside mem-break.c), so that insert_memory_breakpoint / remove_memory_breakpoint have access to the breakpoint's shadow buffer. I first tried passing down a new structure based on GDB's "struct bp_target_info" (actually with that name exactly), but then decided against it as unnecessary complication. As software/memory breakpoints work by poking at memory, when setting a GDB Z0 breakpoint (but not internal breakpoints, as those can assume the conditions are already right), we need to tell the target to prepare to access memory (which on Linux means stop threads). If that operation fails, we need to return error to GDB. Seeing an error, if this is the first breakpoint of that type that GDB tries to insert, GDB would then assume the breakpoint type is supported, but it may actually not be. So we need to check whether the type is supported at all before preparing to access memory. And to solve that, the patch adds a new target->supports_z_point_type method that is called before actually trying to insert the breakpoint. Other than that, hopefully the change is more or less obvious. New test added that exercises the hbreak2.exp regression in a more direct way, without relying on a breakpoint re-set happening before main is reached. Tested by building GDBserver for: aarch64-linux-gnu arm-linux-gnueabihf i686-pc-linux-gnu i686-w64-mingw32 m68k-linux-gnu mips-linux-gnu mips-uclinux nios2-linux-gnu powerpc-linux-gnu sh-linux-gnu tilegx-unknown-linux-gnu x86_64-redhat-linux x86_64-w64-mingw32 And also regression tested on x86_64 Fedora 20. gdb/gdbserver/ 2014-05-20 Pedro Alves <palves@redhat.com> * linux-aarch64-low.c (aarch64_insert_point) (aarch64_remove_point): No longer check whether the type is supported here. Adjust to new interface. (the_low_target): Install aarch64_supports_z_point_type as supports_z_point_type method. * linux-arm-low.c (raw_bkpt_type_to_arm_hwbp_type): New function. (arm_linux_hw_point_initialize): Take an enum raw_bkpt_type instead of a Z packet char. Adjust. (arm_supports_z_point_type): New function. (arm_insert_point, arm_remove_point): Adjust to new interface. (the_low_target): Install arm_supports_z_point_type. * linux-crisv32-low.c (cris_supports_z_point_type): New function. (cris_insert_point, cris_remove_point): Adjust to new interface. Don't check whether the type is supported here. (the_low_target): Install cris_supports_z_point_type. * linux-low.c (linux_supports_z_point_type): New function. (linux_insert_point, linux_remove_point): Adjust to new interface. * linux-low.h (struct linux_target_ops) <insert_point, remove_point>: Take an enum raw_bkpt_type instead of a char. Add raw_breakpoint pointer parameter. <supports_z_point_type>: New method. * linux-mips-low.c (mips_supports_z_point_type): New function. (mips_insert_point, mips_remove_point): Adjust to new interface. Use mips_supports_z_point_type. (the_low_target): Install mips_supports_z_point_type. * linux-ppc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-s390-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-sparc-low.c (the_low_target): Install NULL as supports_z_point_type method. * linux-x86-low.c (x86_supports_z_point_type): New function. (x86_insert_point): Adjust to new insert_point interface. Use insert_memory_breakpoint. Adjust to new i386_low_insert_watchpoint interface. (x86_remove_point): Adjust to remove_point interface. Use remove_memory_breakpoint. Adjust to new i386_low_remove_watchpoint interface. (the_low_target): Install x86_supports_z_point_type. * lynx-low.c (lynx_target_ops): Install NULL as supports_z_point_type callback. * nto-low.c (nto_supports_z_point_type): New. (nto_insert_point, nto_remove_point): Adjust to new interface. (nto_target_ops): Install nto_supports_z_point_type. * mem-break.c: Adjust intro comment. (struct raw_breakpoint) <raw_type, size>: New fields. <inserted>: Update comment. <shlib_disabled>: Delete field. (enum bkpt_type) <gdb_breakpoint>: Delete value. <gdb_breakpoint_Z0, gdb_breakpoint_Z1, gdb_breakpoint_Z2, gdb_breakpoint_Z3, gdb_breakpoint_Z4>: New values. (raw_bkpt_type_to_target_hw_bp_type): New function. (find_enabled_raw_code_breakpoint_at): New function. (find_raw_breakpoint_at): New type and size parameters. Use them. (insert_memory_breakpoint): New function, based off set_raw_breakpoint_at. (remove_memory_breakpoint): New function. (set_raw_breakpoint_at): Reimplement. (set_breakpoint): New, based on set_breakpoint_at. (set_breakpoint_at): Reimplement. (delete_raw_breakpoint): Go through the_target->remove_point instead of assuming memory breakpoints. (find_gdb_breakpoint_at): Delete. (Z_packet_to_bkpt_type, Z_packet_to_raw_bkpt_type): New functions. (find_gdb_breakpoint): New function. (set_gdb_breakpoint_at): Delete. (z_type_supported): New function. (set_gdb_breakpoint_1): New function, loosely based off set_gdb_breakpoint_at. (check_gdb_bp_preconditions, set_gdb_breakpoint): New functions. (delete_gdb_breakpoint_at): Delete. (delete_gdb_breakpoint_1): New function, loosely based off delete_gdb_breakpoint_at. (delete_gdb_breakpoint): New function. (clear_gdb_breakpoint_conditions): Rename to ... (clear_breakpoint_conditions): ... this. Don't handle a NULL breakpoint. (add_condition_to_breakpoint): Make static. (add_breakpoint_condition): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_condition_true_at_breakpoint): Rename to ... (gdb_condition_true_at_breakpoint_z_type): ... this, and add z_type parameter. (gdb_condition_true_at_breakpoint): Reimplement. (add_breakpoint_commands): Take a struct breakpoint pointer instead of an address. Adjust. (gdb_no_commands_at_breakpoint): Rename to ... (gdb_no_commands_at_breakpoint_z_type): ... this. Add z_type parameter. Return true if no breakpoint was found. Change debug output. (gdb_no_commands_at_breakpoint): Reimplement. (run_breakpoint_commands): Rename to ... (run_breakpoint_commands_z_type): ... this. Add z_type parameter, and change return type to boolean. (run_breakpoint_commands): New function. (gdb_breakpoint_here): Also check for Z1 breakpoints. (uninsert_raw_breakpoint): Don't try to reinsert a disabled breakpoint. Go through the_target->remove_point instead of assuming memory breakpoint. (uninsert_breakpoints_at, uninsert_all_breakpoints): Uninsert software and hardware breakpoints. (reinsert_raw_breakpoint): Go through the_target->insert_point instead of assuming memory breakpoint. (reinsert_breakpoints_at, reinsert_all_breakpoints): Reinsert software and hardware breakpoints. (check_breakpoints, breakpoint_here, breakpoint_inserted_here): Check both software and hardware breakpoints. (validate_inserted_breakpoint): Assert the breakpoint is a software breakpoint. Set the inserted flag to -1 instead of setting shlib_disabled. (delete_disabled_breakpoints): Adjust. (validate_breakpoints): Only validate software breakpoints. Adjust to inserted flag change. (check_mem_read, check_mem_write): Skip breakpoint types other than software breakpoints. Adjust to inserted flag change. * mem-break.h (enum raw_bkpt_type): New enum. (raw_breakpoint, struct process_info): Forward declare. (Z_packet_to_target_hw_bp_type): Delete declaration. (raw_bkpt_type_to_target_hw_bp_type, Z_packet_to_raw_bkpt_type) (set_gdb_breakpoint, delete_gdb_breakpoint) (clear_breakpoint_conditions): New declarations. (set_gdb_breakpoint_at, clear_gdb_breakpoint_conditions): Delete. (breakpoint_inserted_here): Update comment. (add_breakpoint_condition, add_breakpoint_commands): Replace address parameter with a breakpoint pointer parameter. (gdb_breakpoint_here): Update comment. (delete_gdb_breakpoint_at): Delete. (insert_memory_breakpoint, remove_memory_breakpoint): Declare. * server.c (process_point_options): Take a struct breakpoint pointer instead of an address. Adjust. (process_serial_event) <Z/z packets>: Use set_gdb_breakpoint and delete_gdb_breakpoint. * spu-low.c (spu_target_ops): Install NULL as supports_z_point_type method. * target.h: Include mem-break.h. (struct target_ops) <prepare_to_access_memory>: Update comment. <supports_z_point_type>: New field. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. * win32-arm-low.c (the_low_target): Install NULL as supports_z_point_type. * win32-i386-low.c (i386_supports_z_point_type): New function. (i386_insert_point, i386_remove_point): Adjust to new interface. (the_low_target): Install i386_supports_z_point_type. * win32-low.c (win32_supports_z_point_type): New function. (win32_insert_point, win32_remove_point): Adjust to new interface. (win32_target_ops): Install win32_supports_z_point_type. * win32-low.h (struct win32_target_ops): <supports_z_point_type>: New method. <insert_point, remove_point>: Take an enum raw_bkpt_type argument instead of a char. Also take a raw breakpoint pointer. gdb/testsuite/ 2014-05-20 Pedro Alves <palves@redhat.com> * gdb.base/break-idempotent.c: New file. * gdb.base/break-idempotent.exp: New file.
728 lines
21 KiB
C
728 lines
21 KiB
C
/* GNU/Linux/PowerPC specific low level interface, for the remote server for
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GDB.
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Copyright (C) 1995-2014 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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#include <elf.h>
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#include <asm/ptrace.h>
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/* These are in <asm/cputable.h> in current kernels. */
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#define PPC_FEATURE_HAS_VSX 0x00000080
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#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
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#define PPC_FEATURE_HAS_SPE 0x00800000
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#define PPC_FEATURE_CELL 0x00010000
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#define PPC_FEATURE_HAS_DFP 0x00000400
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static unsigned long ppc_hwcap;
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/* Defined in auto-generated file powerpc-32l.c. */
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void init_registers_powerpc_32l (void);
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extern const struct target_desc *tdesc_powerpc_32l;
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/* Defined in auto-generated file powerpc-altivec32l.c. */
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void init_registers_powerpc_altivec32l (void);
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extern const struct target_desc *tdesc_powerpc_altivec32l;
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/* Defined in auto-generated file powerpc-cell32l.c. */
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void init_registers_powerpc_cell32l (void);
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extern const struct target_desc *tdesc_powerpc_cell32l;
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/* Defined in auto-generated file powerpc-vsx32l.c. */
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void init_registers_powerpc_vsx32l (void);
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extern const struct target_desc *tdesc_powerpc_vsx32l;
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/* Defined in auto-generated file powerpc-isa205-32l.c. */
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void init_registers_powerpc_isa205_32l (void);
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extern const struct target_desc *tdesc_powerpc_isa205_32l;
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/* Defined in auto-generated file powerpc-isa205-altivec32l.c. */
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void init_registers_powerpc_isa205_altivec32l (void);
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extern const struct target_desc *tdesc_powerpc_isa205_altivec32l;
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/* Defined in auto-generated file powerpc-isa205-vsx32l.c. */
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void init_registers_powerpc_isa205_vsx32l (void);
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extern const struct target_desc *tdesc_powerpc_isa205_vsx32l;
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/* Defined in auto-generated file powerpc-e500l.c. */
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void init_registers_powerpc_e500l (void);
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extern const struct target_desc *tdesc_powerpc_e500l;
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/* Defined in auto-generated file powerpc-64l.c. */
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void init_registers_powerpc_64l (void);
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extern const struct target_desc *tdesc_powerpc_64l;
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/* Defined in auto-generated file powerpc-altivec64l.c. */
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void init_registers_powerpc_altivec64l (void);
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extern const struct target_desc *tdesc_powerpc_altivec64l;
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/* Defined in auto-generated file powerpc-cell64l.c. */
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void init_registers_powerpc_cell64l (void);
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extern const struct target_desc *tdesc_powerpc_cell64l;
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/* Defined in auto-generated file powerpc-vsx64l.c. */
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void init_registers_powerpc_vsx64l (void);
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extern const struct target_desc *tdesc_powerpc_vsx64l;
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/* Defined in auto-generated file powerpc-isa205-64l.c. */
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void init_registers_powerpc_isa205_64l (void);
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extern const struct target_desc *tdesc_powerpc_isa205_64l;
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/* Defined in auto-generated file powerpc-isa205-altivec64l.c. */
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void init_registers_powerpc_isa205_altivec64l (void);
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extern const struct target_desc *tdesc_powerpc_isa205_altivec64l;
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/* Defined in auto-generated file powerpc-isa205-vsx64l.c. */
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void init_registers_powerpc_isa205_vsx64l (void);
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extern const struct target_desc *tdesc_powerpc_isa205_vsx64l;
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#define ppc_num_regs 73
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/* This sometimes isn't defined. */
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#ifndef PT_ORIG_R3
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#define PT_ORIG_R3 34
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#endif
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#ifndef PT_TRAP
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#define PT_TRAP 40
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#endif
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#ifdef __powerpc64__
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/* We use a constant for FPSCR instead of PT_FPSCR, because
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many shipped PPC64 kernels had the wrong value in ptrace.h. */
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static int ppc_regmap[] =
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{PT_R0 * 8, PT_R1 * 8, PT_R2 * 8, PT_R3 * 8,
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PT_R4 * 8, PT_R5 * 8, PT_R6 * 8, PT_R7 * 8,
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PT_R8 * 8, PT_R9 * 8, PT_R10 * 8, PT_R11 * 8,
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PT_R12 * 8, PT_R13 * 8, PT_R14 * 8, PT_R15 * 8,
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PT_R16 * 8, PT_R17 * 8, PT_R18 * 8, PT_R19 * 8,
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PT_R20 * 8, PT_R21 * 8, PT_R22 * 8, PT_R23 * 8,
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PT_R24 * 8, PT_R25 * 8, PT_R26 * 8, PT_R27 * 8,
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PT_R28 * 8, PT_R29 * 8, PT_R30 * 8, PT_R31 * 8,
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PT_FPR0*8, PT_FPR0*8 + 8, PT_FPR0*8+16, PT_FPR0*8+24,
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PT_FPR0*8+32, PT_FPR0*8+40, PT_FPR0*8+48, PT_FPR0*8+56,
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PT_FPR0*8+64, PT_FPR0*8+72, PT_FPR0*8+80, PT_FPR0*8+88,
|
|
PT_FPR0*8+96, PT_FPR0*8+104, PT_FPR0*8+112, PT_FPR0*8+120,
|
|
PT_FPR0*8+128, PT_FPR0*8+136, PT_FPR0*8+144, PT_FPR0*8+152,
|
|
PT_FPR0*8+160, PT_FPR0*8+168, PT_FPR0*8+176, PT_FPR0*8+184,
|
|
PT_FPR0*8+192, PT_FPR0*8+200, PT_FPR0*8+208, PT_FPR0*8+216,
|
|
PT_FPR0*8+224, PT_FPR0*8+232, PT_FPR0*8+240, PT_FPR0*8+248,
|
|
PT_NIP * 8, PT_MSR * 8, PT_CCR * 8, PT_LNK * 8,
|
|
PT_CTR * 8, PT_XER * 8, PT_FPR0*8 + 256,
|
|
PT_ORIG_R3 * 8, PT_TRAP * 8 };
|
|
#else
|
|
/* Currently, don't check/send MQ. */
|
|
static int ppc_regmap[] =
|
|
{PT_R0 * 4, PT_R1 * 4, PT_R2 * 4, PT_R3 * 4,
|
|
PT_R4 * 4, PT_R5 * 4, PT_R6 * 4, PT_R7 * 4,
|
|
PT_R8 * 4, PT_R9 * 4, PT_R10 * 4, PT_R11 * 4,
|
|
PT_R12 * 4, PT_R13 * 4, PT_R14 * 4, PT_R15 * 4,
|
|
PT_R16 * 4, PT_R17 * 4, PT_R18 * 4, PT_R19 * 4,
|
|
PT_R20 * 4, PT_R21 * 4, PT_R22 * 4, PT_R23 * 4,
|
|
PT_R24 * 4, PT_R25 * 4, PT_R26 * 4, PT_R27 * 4,
|
|
PT_R28 * 4, PT_R29 * 4, PT_R30 * 4, PT_R31 * 4,
|
|
PT_FPR0*4, PT_FPR0*4 + 8, PT_FPR0*4+16, PT_FPR0*4+24,
|
|
PT_FPR0*4+32, PT_FPR0*4+40, PT_FPR0*4+48, PT_FPR0*4+56,
|
|
PT_FPR0*4+64, PT_FPR0*4+72, PT_FPR0*4+80, PT_FPR0*4+88,
|
|
PT_FPR0*4+96, PT_FPR0*4+104, PT_FPR0*4+112, PT_FPR0*4+120,
|
|
PT_FPR0*4+128, PT_FPR0*4+136, PT_FPR0*4+144, PT_FPR0*4+152,
|
|
PT_FPR0*4+160, PT_FPR0*4+168, PT_FPR0*4+176, PT_FPR0*4+184,
|
|
PT_FPR0*4+192, PT_FPR0*4+200, PT_FPR0*4+208, PT_FPR0*4+216,
|
|
PT_FPR0*4+224, PT_FPR0*4+232, PT_FPR0*4+240, PT_FPR0*4+248,
|
|
PT_NIP * 4, PT_MSR * 4, PT_CCR * 4, PT_LNK * 4,
|
|
PT_CTR * 4, PT_XER * 4, PT_FPSCR * 4,
|
|
PT_ORIG_R3 * 4, PT_TRAP * 4
|
|
};
|
|
|
|
static int ppc_regmap_e500[] =
|
|
{PT_R0 * 4, PT_R1 * 4, PT_R2 * 4, PT_R3 * 4,
|
|
PT_R4 * 4, PT_R5 * 4, PT_R6 * 4, PT_R7 * 4,
|
|
PT_R8 * 4, PT_R9 * 4, PT_R10 * 4, PT_R11 * 4,
|
|
PT_R12 * 4, PT_R13 * 4, PT_R14 * 4, PT_R15 * 4,
|
|
PT_R16 * 4, PT_R17 * 4, PT_R18 * 4, PT_R19 * 4,
|
|
PT_R20 * 4, PT_R21 * 4, PT_R22 * 4, PT_R23 * 4,
|
|
PT_R24 * 4, PT_R25 * 4, PT_R26 * 4, PT_R27 * 4,
|
|
PT_R28 * 4, PT_R29 * 4, PT_R30 * 4, PT_R31 * 4,
|
|
-1, -1, -1, -1,
|
|
-1, -1, -1, -1,
|
|
-1, -1, -1, -1,
|
|
-1, -1, -1, -1,
|
|
-1, -1, -1, -1,
|
|
-1, -1, -1, -1,
|
|
-1, -1, -1, -1,
|
|
-1, -1, -1, -1,
|
|
PT_NIP * 4, PT_MSR * 4, PT_CCR * 4, PT_LNK * 4,
|
|
PT_CTR * 4, PT_XER * 4, -1,
|
|
PT_ORIG_R3 * 4, PT_TRAP * 4
|
|
};
|
|
#endif
|
|
|
|
static int
|
|
ppc_cannot_store_register (int regno)
|
|
{
|
|
const struct target_desc *tdesc = current_process ()->tdesc;
|
|
|
|
#ifndef __powerpc64__
|
|
/* Some kernels do not allow us to store fpscr. */
|
|
if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE)
|
|
&& regno == find_regno (tdesc, "fpscr"))
|
|
return 2;
|
|
#endif
|
|
|
|
/* Some kernels do not allow us to store orig_r3 or trap. */
|
|
if (regno == find_regno (tdesc, "orig_r3")
|
|
|| regno == find_regno (tdesc, "trap"))
|
|
return 2;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int
|
|
ppc_cannot_fetch_register (int regno)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void
|
|
ppc_collect_ptrace_register (struct regcache *regcache, int regno, char *buf)
|
|
{
|
|
int size = register_size (regcache->tdesc, regno);
|
|
|
|
memset (buf, 0, sizeof (long));
|
|
|
|
if (size < sizeof (long))
|
|
collect_register (regcache, regno, buf + sizeof (long) - size);
|
|
else
|
|
collect_register (regcache, regno, buf);
|
|
}
|
|
|
|
static void
|
|
ppc_supply_ptrace_register (struct regcache *regcache,
|
|
int regno, const char *buf)
|
|
{
|
|
int size = register_size (regcache->tdesc, regno);
|
|
if (size < sizeof (long))
|
|
supply_register (regcache, regno, buf + sizeof (long) - size);
|
|
else
|
|
supply_register (regcache, regno, buf);
|
|
}
|
|
|
|
|
|
#define INSTR_SC 0x44000002
|
|
#define NR_spu_run 0x0116
|
|
|
|
/* If the PPU thread is currently stopped on a spu_run system call,
|
|
return to FD and ADDR the file handle and NPC parameter address
|
|
used with the system call. Return non-zero if successful. */
|
|
static int
|
|
parse_spufs_run (struct regcache *regcache, int *fd, CORE_ADDR *addr)
|
|
{
|
|
CORE_ADDR curr_pc;
|
|
int curr_insn;
|
|
int curr_r0;
|
|
|
|
if (register_size (regcache->tdesc, 0) == 4)
|
|
{
|
|
unsigned int pc, r0, r3, r4;
|
|
collect_register_by_name (regcache, "pc", &pc);
|
|
collect_register_by_name (regcache, "r0", &r0);
|
|
collect_register_by_name (regcache, "orig_r3", &r3);
|
|
collect_register_by_name (regcache, "r4", &r4);
|
|
curr_pc = (CORE_ADDR) pc;
|
|
curr_r0 = (int) r0;
|
|
*fd = (int) r3;
|
|
*addr = (CORE_ADDR) r4;
|
|
}
|
|
else
|
|
{
|
|
unsigned long pc, r0, r3, r4;
|
|
collect_register_by_name (regcache, "pc", &pc);
|
|
collect_register_by_name (regcache, "r0", &r0);
|
|
collect_register_by_name (regcache, "orig_r3", &r3);
|
|
collect_register_by_name (regcache, "r4", &r4);
|
|
curr_pc = (CORE_ADDR) pc;
|
|
curr_r0 = (int) r0;
|
|
*fd = (int) r3;
|
|
*addr = (CORE_ADDR) r4;
|
|
}
|
|
|
|
/* Fetch instruction preceding current NIP. */
|
|
if ((*the_target->read_memory) (curr_pc - 4,
|
|
(unsigned char *) &curr_insn, 4) != 0)
|
|
return 0;
|
|
/* It should be a "sc" instruction. */
|
|
if (curr_insn != INSTR_SC)
|
|
return 0;
|
|
/* System call number should be NR_spu_run. */
|
|
if (curr_r0 != NR_spu_run)
|
|
return 0;
|
|
|
|
return 1;
|
|
}
|
|
|
|
static CORE_ADDR
|
|
ppc_get_pc (struct regcache *regcache)
|
|
{
|
|
CORE_ADDR addr;
|
|
int fd;
|
|
|
|
if (parse_spufs_run (regcache, &fd, &addr))
|
|
{
|
|
unsigned int pc;
|
|
(*the_target->read_memory) (addr, (unsigned char *) &pc, 4);
|
|
return ((CORE_ADDR)1 << 63)
|
|
| ((CORE_ADDR)fd << 32) | (CORE_ADDR) (pc - 4);
|
|
}
|
|
else if (register_size (regcache->tdesc, 0) == 4)
|
|
{
|
|
unsigned int pc;
|
|
collect_register_by_name (regcache, "pc", &pc);
|
|
return (CORE_ADDR) pc;
|
|
}
|
|
else
|
|
{
|
|
unsigned long pc;
|
|
collect_register_by_name (regcache, "pc", &pc);
|
|
return (CORE_ADDR) pc;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ppc_set_pc (struct regcache *regcache, CORE_ADDR pc)
|
|
{
|
|
CORE_ADDR addr;
|
|
int fd;
|
|
|
|
if (parse_spufs_run (regcache, &fd, &addr))
|
|
{
|
|
unsigned int newpc = pc;
|
|
(*the_target->write_memory) (addr, (unsigned char *) &newpc, 4);
|
|
}
|
|
else if (register_size (regcache->tdesc, 0) == 4)
|
|
{
|
|
unsigned int newpc = pc;
|
|
supply_register_by_name (regcache, "pc", &newpc);
|
|
}
|
|
else
|
|
{
|
|
unsigned long newpc = pc;
|
|
supply_register_by_name (regcache, "pc", &newpc);
|
|
}
|
|
}
|
|
|
|
|
|
static int
|
|
ppc_get_hwcap (unsigned long *valp)
|
|
{
|
|
const struct target_desc *tdesc = current_process ()->tdesc;
|
|
int wordsize = register_size (tdesc, 0);
|
|
unsigned char *data = alloca (2 * wordsize);
|
|
int offset = 0;
|
|
|
|
while ((*the_target->read_auxv) (offset, data, 2 * wordsize) == 2 * wordsize)
|
|
{
|
|
if (wordsize == 4)
|
|
{
|
|
unsigned int *data_p = (unsigned int *)data;
|
|
if (data_p[0] == AT_HWCAP)
|
|
{
|
|
*valp = data_p[1];
|
|
return 1;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
unsigned long *data_p = (unsigned long *)data;
|
|
if (data_p[0] == AT_HWCAP)
|
|
{
|
|
*valp = data_p[1];
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
offset += 2 * wordsize;
|
|
}
|
|
|
|
*valp = 0;
|
|
return 0;
|
|
}
|
|
|
|
/* Forward declaration. */
|
|
static struct usrregs_info ppc_usrregs_info;
|
|
#ifndef __powerpc64__
|
|
static int ppc_regmap_adjusted;
|
|
#endif
|
|
|
|
static void
|
|
ppc_arch_setup (void)
|
|
{
|
|
const struct target_desc *tdesc;
|
|
#ifdef __powerpc64__
|
|
long msr;
|
|
struct regcache *regcache;
|
|
|
|
/* On a 64-bit host, assume 64-bit inferior process with no
|
|
AltiVec registers. Reset ppc_hwcap to ensure that the
|
|
collect_register call below does not fail. */
|
|
tdesc = tdesc_powerpc_64l;
|
|
current_process ()->tdesc = tdesc;
|
|
ppc_hwcap = 0;
|
|
|
|
/* Only if the high bit of the MSR is set, we actually have
|
|
a 64-bit inferior. */
|
|
regcache = new_register_cache (tdesc);
|
|
fetch_inferior_registers (regcache, find_regno (tdesc, "msr"));
|
|
collect_register_by_name (regcache, "msr", &msr);
|
|
free_register_cache (regcache);
|
|
if (msr < 0)
|
|
{
|
|
ppc_get_hwcap (&ppc_hwcap);
|
|
if (ppc_hwcap & PPC_FEATURE_CELL)
|
|
tdesc = tdesc_powerpc_cell64l;
|
|
else if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
|
|
{
|
|
/* Power ISA 2.05 (implemented by Power 6 and newer processors)
|
|
increases the FPSCR from 32 bits to 64 bits. Even though Power 7
|
|
supports this ISA version, it doesn't have PPC_FEATURE_ARCH_2_05
|
|
set, only PPC_FEATURE_ARCH_2_06. Since for now the only bits
|
|
used in the higher half of the register are for Decimal Floating
|
|
Point, we check if that feature is available to decide the size
|
|
of the FPSCR. */
|
|
if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
|
|
tdesc = tdesc_powerpc_isa205_vsx64l;
|
|
else
|
|
tdesc = tdesc_powerpc_vsx64l;
|
|
}
|
|
else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
|
|
{
|
|
if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
|
|
tdesc = tdesc_powerpc_isa205_altivec64l;
|
|
else
|
|
tdesc = tdesc_powerpc_altivec64l;
|
|
}
|
|
|
|
current_process ()->tdesc = tdesc;
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
/* OK, we have a 32-bit inferior. */
|
|
tdesc = tdesc_powerpc_32l;
|
|
current_process ()->tdesc = tdesc;
|
|
|
|
ppc_get_hwcap (&ppc_hwcap);
|
|
if (ppc_hwcap & PPC_FEATURE_CELL)
|
|
tdesc = tdesc_powerpc_cell32l;
|
|
else if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
|
|
{
|
|
if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
|
|
tdesc = tdesc_powerpc_isa205_vsx32l;
|
|
else
|
|
tdesc = tdesc_powerpc_vsx32l;
|
|
}
|
|
else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
|
|
{
|
|
if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
|
|
tdesc = tdesc_powerpc_isa205_altivec32l;
|
|
else
|
|
tdesc = tdesc_powerpc_altivec32l;
|
|
}
|
|
|
|
/* On 32-bit machines, check for SPE registers.
|
|
Set the low target's regmap field as appropriately. */
|
|
#ifndef __powerpc64__
|
|
if (ppc_hwcap & PPC_FEATURE_HAS_SPE)
|
|
tdesc = tdesc_powerpc_e500l;
|
|
|
|
if (!ppc_regmap_adjusted)
|
|
{
|
|
if (ppc_hwcap & PPC_FEATURE_HAS_SPE)
|
|
ppc_usrregs_info.regmap = ppc_regmap_e500;
|
|
|
|
/* If the FPSCR is 64-bit wide, we need to fetch the whole
|
|
64-bit slot and not just its second word. The PT_FPSCR
|
|
supplied in a 32-bit GDB compilation doesn't reflect
|
|
this. */
|
|
if (register_size (tdesc, 70) == 8)
|
|
ppc_regmap[70] = (48 + 2*32) * sizeof (long);
|
|
|
|
ppc_regmap_adjusted = 1;
|
|
}
|
|
#endif
|
|
current_process ()->tdesc = tdesc;
|
|
}
|
|
|
|
/* Correct in either endianness.
|
|
This instruction is "twge r2, r2", which GDB uses as a software
|
|
breakpoint. */
|
|
static const unsigned int ppc_breakpoint = 0x7d821008;
|
|
#define ppc_breakpoint_len 4
|
|
|
|
static int
|
|
ppc_breakpoint_at (CORE_ADDR where)
|
|
{
|
|
unsigned int insn;
|
|
|
|
if (where & ((CORE_ADDR)1 << 63))
|
|
{
|
|
char mem_annex[32];
|
|
sprintf (mem_annex, "%d/mem", (int)((where >> 32) & 0x7fffffff));
|
|
(*the_target->qxfer_spu) (mem_annex, (unsigned char *) &insn,
|
|
NULL, where & 0xffffffff, 4);
|
|
if (insn == 0x3fff)
|
|
return 1;
|
|
}
|
|
else
|
|
{
|
|
(*the_target->read_memory) (where, (unsigned char *) &insn, 4);
|
|
if (insn == ppc_breakpoint)
|
|
return 1;
|
|
/* If necessary, recognize more trap instructions here. GDB only uses
|
|
the one. */
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Provide only a fill function for the general register set. ps_lgetregs
|
|
will use this for NPTL support. */
|
|
|
|
static void ppc_fill_gregset (struct regcache *regcache, void *buf)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < 32; i++)
|
|
ppc_collect_ptrace_register (regcache, i, (char *) buf + ppc_regmap[i]);
|
|
|
|
for (i = 64; i < 70; i++)
|
|
ppc_collect_ptrace_register (regcache, i, (char *) buf + ppc_regmap[i]);
|
|
|
|
for (i = 71; i < 73; i++)
|
|
ppc_collect_ptrace_register (regcache, i, (char *) buf + ppc_regmap[i]);
|
|
}
|
|
|
|
#ifndef PTRACE_GETVSXREGS
|
|
#define PTRACE_GETVSXREGS 27
|
|
#define PTRACE_SETVSXREGS 28
|
|
#endif
|
|
|
|
#define SIZEOF_VSXREGS 32*8
|
|
|
|
static void
|
|
ppc_fill_vsxregset (struct regcache *regcache, void *buf)
|
|
{
|
|
int i, base;
|
|
char *regset = buf;
|
|
|
|
if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
|
|
return;
|
|
|
|
base = find_regno (regcache->tdesc, "vs0h");
|
|
for (i = 0; i < 32; i++)
|
|
collect_register (regcache, base + i, ®set[i * 8]);
|
|
}
|
|
|
|
static void
|
|
ppc_store_vsxregset (struct regcache *regcache, const void *buf)
|
|
{
|
|
int i, base;
|
|
const char *regset = buf;
|
|
|
|
if (!(ppc_hwcap & PPC_FEATURE_HAS_VSX))
|
|
return;
|
|
|
|
base = find_regno (regcache->tdesc, "vs0h");
|
|
for (i = 0; i < 32; i++)
|
|
supply_register (regcache, base + i, ®set[i * 8]);
|
|
}
|
|
|
|
#ifndef PTRACE_GETVRREGS
|
|
#define PTRACE_GETVRREGS 18
|
|
#define PTRACE_SETVRREGS 19
|
|
#endif
|
|
|
|
#define SIZEOF_VRREGS 33*16+4
|
|
|
|
static void
|
|
ppc_fill_vrregset (struct regcache *regcache, void *buf)
|
|
{
|
|
int i, base;
|
|
char *regset = buf;
|
|
|
|
if (!(ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC))
|
|
return;
|
|
|
|
base = find_regno (regcache->tdesc, "vr0");
|
|
for (i = 0; i < 32; i++)
|
|
collect_register (regcache, base + i, ®set[i * 16]);
|
|
|
|
collect_register_by_name (regcache, "vscr", ®set[32 * 16 + 12]);
|
|
collect_register_by_name (regcache, "vrsave", ®set[33 * 16]);
|
|
}
|
|
|
|
static void
|
|
ppc_store_vrregset (struct regcache *regcache, const void *buf)
|
|
{
|
|
int i, base;
|
|
const char *regset = buf;
|
|
|
|
if (!(ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC))
|
|
return;
|
|
|
|
base = find_regno (regcache->tdesc, "vr0");
|
|
for (i = 0; i < 32; i++)
|
|
supply_register (regcache, base + i, ®set[i * 16]);
|
|
|
|
supply_register_by_name (regcache, "vscr", ®set[32 * 16 + 12]);
|
|
supply_register_by_name (regcache, "vrsave", ®set[33 * 16]);
|
|
}
|
|
|
|
#ifndef PTRACE_GETEVRREGS
|
|
#define PTRACE_GETEVRREGS 20
|
|
#define PTRACE_SETEVRREGS 21
|
|
#endif
|
|
|
|
struct gdb_evrregset_t
|
|
{
|
|
unsigned long evr[32];
|
|
unsigned long long acc;
|
|
unsigned long spefscr;
|
|
};
|
|
|
|
static void
|
|
ppc_fill_evrregset (struct regcache *regcache, void *buf)
|
|
{
|
|
int i, ev0;
|
|
struct gdb_evrregset_t *regset = buf;
|
|
|
|
if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE))
|
|
return;
|
|
|
|
ev0 = find_regno (regcache->tdesc, "ev0h");
|
|
for (i = 0; i < 32; i++)
|
|
collect_register (regcache, ev0 + i, ®set->evr[i]);
|
|
|
|
collect_register_by_name (regcache, "acc", ®set->acc);
|
|
collect_register_by_name (regcache, "spefscr", ®set->spefscr);
|
|
}
|
|
|
|
static void
|
|
ppc_store_evrregset (struct regcache *regcache, const void *buf)
|
|
{
|
|
int i, ev0;
|
|
const struct gdb_evrregset_t *regset = buf;
|
|
|
|
if (!(ppc_hwcap & PPC_FEATURE_HAS_SPE))
|
|
return;
|
|
|
|
ev0 = find_regno (regcache->tdesc, "ev0h");
|
|
for (i = 0; i < 32; i++)
|
|
supply_register (regcache, ev0 + i, ®set->evr[i]);
|
|
|
|
supply_register_by_name (regcache, "acc", ®set->acc);
|
|
supply_register_by_name (regcache, "spefscr", ®set->spefscr);
|
|
}
|
|
|
|
static struct regset_info ppc_regsets[] = {
|
|
/* List the extra register sets before GENERAL_REGS. That way we will
|
|
fetch them every time, but still fall back to PTRACE_PEEKUSER for the
|
|
general registers. Some kernels support these, but not the newer
|
|
PPC_PTRACE_GETREGS. */
|
|
{ PTRACE_GETVSXREGS, PTRACE_SETVSXREGS, 0, SIZEOF_VSXREGS, EXTENDED_REGS,
|
|
ppc_fill_vsxregset, ppc_store_vsxregset },
|
|
{ PTRACE_GETVRREGS, PTRACE_SETVRREGS, 0, SIZEOF_VRREGS, EXTENDED_REGS,
|
|
ppc_fill_vrregset, ppc_store_vrregset },
|
|
{ PTRACE_GETEVRREGS, PTRACE_SETEVRREGS, 0, 32 * 4 + 8 + 4, EXTENDED_REGS,
|
|
ppc_fill_evrregset, ppc_store_evrregset },
|
|
{ 0, 0, 0, 0, GENERAL_REGS, ppc_fill_gregset, NULL },
|
|
{ 0, 0, 0, -1, -1, NULL, NULL }
|
|
};
|
|
|
|
static struct usrregs_info ppc_usrregs_info =
|
|
{
|
|
ppc_num_regs,
|
|
ppc_regmap,
|
|
};
|
|
|
|
static struct regsets_info ppc_regsets_info =
|
|
{
|
|
ppc_regsets, /* regsets */
|
|
0, /* num_regsets */
|
|
NULL, /* disabled_regsets */
|
|
};
|
|
|
|
static struct regs_info regs_info =
|
|
{
|
|
NULL, /* regset_bitmap */
|
|
&ppc_usrregs_info,
|
|
&ppc_regsets_info
|
|
};
|
|
|
|
static const struct regs_info *
|
|
ppc_regs_info (void)
|
|
{
|
|
return ®s_info;
|
|
}
|
|
|
|
struct linux_target_ops the_low_target = {
|
|
ppc_arch_setup,
|
|
ppc_regs_info,
|
|
ppc_cannot_fetch_register,
|
|
ppc_cannot_store_register,
|
|
NULL, /* fetch_register */
|
|
ppc_get_pc,
|
|
ppc_set_pc,
|
|
(const unsigned char *) &ppc_breakpoint,
|
|
ppc_breakpoint_len,
|
|
NULL,
|
|
0,
|
|
ppc_breakpoint_at,
|
|
NULL, /* supports_z_point_type */
|
|
NULL,
|
|
NULL,
|
|
NULL,
|
|
NULL,
|
|
ppc_collect_ptrace_register,
|
|
ppc_supply_ptrace_register,
|
|
};
|
|
|
|
void
|
|
initialize_low_arch (void)
|
|
{
|
|
/* Initialize the Linux target descriptions. */
|
|
|
|
init_registers_powerpc_32l ();
|
|
init_registers_powerpc_altivec32l ();
|
|
init_registers_powerpc_cell32l ();
|
|
init_registers_powerpc_vsx32l ();
|
|
init_registers_powerpc_isa205_32l ();
|
|
init_registers_powerpc_isa205_altivec32l ();
|
|
init_registers_powerpc_isa205_vsx32l ();
|
|
init_registers_powerpc_e500l ();
|
|
init_registers_powerpc_64l ();
|
|
init_registers_powerpc_altivec64l ();
|
|
init_registers_powerpc_cell64l ();
|
|
init_registers_powerpc_vsx64l ();
|
|
init_registers_powerpc_isa205_64l ();
|
|
init_registers_powerpc_isa205_altivec64l ();
|
|
init_registers_powerpc_isa205_vsx64l ();
|
|
|
|
initialize_regsets_info (&ppc_regsets_info);
|
|
}
|