mirror of
https://sourceware.org/git/binutils-gdb.git
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960 lines
23 KiB
C
960 lines
23 KiB
C
/****************************************************************************
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THIS SOFTWARE IS NOT COPYRIGHTED
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HP offers the following for use in the public domain. HP makes no
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warranty with regard to the software or it's performance and the
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user accepts the software "AS IS" with all faults.
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HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD
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TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
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****************************************************************************/
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/****************************************************************************
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* Header: remcom.c,v 1.34 91/03/09 12:29:49 glenne Exp $
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*
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* Module name: remcom.c $
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* Revision: 1.34 $
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* Date: 91/03/09 12:29:49 $
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* Contributor: Lake Stevens Instrument Division$
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*
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* Description: low level support for gdb debugger. $
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*
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* Considerations: only works on target hardware $
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*
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* Written by: Glenn Engel $
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* ModuleState: Experimental $
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*
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* NOTES: See Below $
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*
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* Modified for SPARC by Stu Grossman, Cygnus Support.
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* Based on sparc-stub.c, it's modified for SPARClite Debug Unit hardware
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* breakpoint support to create sparclite-stub.c, by Kung Hsu, Cygnus Support.
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*
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* This code has been extensively tested on the Fujitsu SPARClite demo board.
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*
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* To enable debugger support, two things need to happen. One, a
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* call to set_debug_traps() is necessary in order to allow any breakpoints
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* or error conditions to be properly intercepted and reported to gdb.
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* Two, a breakpoint needs to be generated to begin communication. This
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* is most easily accomplished by a call to breakpoint(). Breakpoint()
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* simulates a breakpoint by executing a trap #1.
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*
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*************
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*
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* The following gdb commands are supported:
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*
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* command function Return value
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*
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* g return the value of the CPU registers hex data or ENN
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* G set the value of the CPU registers OK or ENN
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* P set the value of a single CPU register OK or ENN
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*
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* mAA..AA,LLLL Read LLLL bytes at address AA..AA hex data or ENN
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* MAA..AA,LLLL: Write LLLL bytes at address AA.AA OK or ENN
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*
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* c Resume at current address SNN ( signal NN)
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* cAA..AA Continue at address AA..AA SNN
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*
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* s Step one instruction SNN
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* sAA..AA Step one instruction from AA..AA SNN
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*
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* k kill
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*
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* ? What was the last sigval ? SNN (signal NN)
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*
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* All commands and responses are sent with a packet which includes a
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* checksum. A packet consists of
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*
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* $<packet info>#<checksum>.
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*
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* where
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* <packet info> :: <characters representing the command or response>
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* <checksum> :: < two hex digits computed as modulo 256 sum of <packetinfo>>
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*
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* When a packet is received, it is first acknowledged with either '+' or '-'.
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* '+' indicates a successful transfer. '-' indicates a failed transfer.
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*
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* Example:
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*
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* Host: Reply:
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* $m0,10#2a +$00010203040506070809101112131415#42
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*
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****************************************************************************/
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#include <string.h>
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#include <signal.h>
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#include <sparclite.h>
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/************************************************************************
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*
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* external low-level support routines
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*/
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extern void putDebugChar (int c); /* write a single character */
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extern int getDebugChar (void); /* read and return a single char */
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/************************************************************************/
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/* BUFMAX defines the maximum number of characters in inbound/outbound buffers*/
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/* at least NUMREGBYTES*2 are needed for register packets */
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#define BUFMAX 2048
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static int initialized = 0; /* !0 means we've been initialized */
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extern void breakinst ();
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static void set_mem_fault_trap (int enable);
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static void get_in_break_mode (void);
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static const char hexchars[]="0123456789abcdef";
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#define NUMREGS 80
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/* Number of bytes of registers. */
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#define NUMREGBYTES (NUMREGS * 4)
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enum regnames {G0, G1, G2, G3, G4, G5, G6, G7,
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O0, O1, O2, O3, O4, O5, SP, O7,
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L0, L1, L2, L3, L4, L5, L6, L7,
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I0, I1, I2, I3, I4, I5, FP, I7,
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F0, F1, F2, F3, F4, F5, F6, F7,
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F8, F9, F10, F11, F12, F13, F14, F15,
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F16, F17, F18, F19, F20, F21, F22, F23,
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F24, F25, F26, F27, F28, F29, F30, F31,
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Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR,
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DIA1, DIA2, DDA1, DDA2, DDV1, DDV2, DCR, DSR };
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/*************************** ASSEMBLY CODE MACROS *************************/
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/* */
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extern void trap_low();
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/* Create private copies of common functions used by the stub. This prevents
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nasty interactions between app code and the stub (for instance if user steps
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into strlen, etc..) */
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static char *
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strcpy (char *dst, const char *src)
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{
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char *retval = dst;
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while ((*dst++ = *src++) != '\000');
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return retval;
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}
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static void *
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memcpy (void *vdst, const void *vsrc, int n)
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{
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char *dst = vdst;
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const char *src = vsrc;
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char *retval = dst;
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while (n-- > 0)
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*dst++ = *src++;
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return retval;
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}
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asm("
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.reserve trapstack, 1000 * 4, \"bss\", 8
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.data
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.align 4
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in_trap_handler:
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.word 0
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.text
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.align 4
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! This function is called when any SPARC trap (except window overflow or
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! underflow) occurs. It makes sure that the invalid register window is still
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! available before jumping into C code. It will also restore the world if you
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! return from handle_exception.
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!
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! On entry, trap_low expects l1 and l2 to contain pc and npc respectivly.
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! Register usage throughout the routine is as follows:
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!
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! l0 - psr
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! l1 - pc
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! l2 - npc
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! l3 - wim
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! l4 - scratch and y reg
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! l5 - scratch and tbr
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! l6 - unused
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! l7 - unused
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.globl _trap_low
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_trap_low:
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mov %psr, %l0
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mov %wim, %l3
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srl %l3, %l0, %l4 ! wim >> cwp
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cmp %l4, 1
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bne window_fine ! Branch if not in the invalid window
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nop
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! Handle window overflow
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mov %g1, %l4 ! Save g1, we use it to hold the wim
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srl %l3, 1, %g1 ! Rotate wim right
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tst %g1
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bg good_wim ! Branch if new wim is non-zero
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nop
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! At this point, we need to bring a 1 into the high order bit of the wim.
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! Since we don't want to make any assumptions about the number of register
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! windows, we figure it out dynamically so as to setup the wim correctly.
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not %g1 ! Fill g1 with ones
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mov %g1, %wim ! Fill the wim with ones
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nop
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nop
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nop
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mov %wim, %g1 ! Read back the wim
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inc %g1 ! Now g1 has 1 just to left of wim
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srl %g1, 1, %g1 ! Now put 1 at top of wim
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mov %g0, %wim ! Clear wim so that subsequent save
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nop ! won't trap
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nop
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nop
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good_wim:
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save %g0, %g0, %g0 ! Slip into next window
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mov %g1, %wim ! Install the new wim
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std %l0, [%sp + 0 * 4] ! save L & I registers
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std %l2, [%sp + 2 * 4]
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std %l4, [%sp + 4 * 4]
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std %l6, [%sp + 6 * 4]
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std %i0, [%sp + 8 * 4]
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std %i2, [%sp + 10 * 4]
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std %i4, [%sp + 12 * 4]
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std %i6, [%sp + 14 * 4]
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restore ! Go back to trap window.
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mov %l4, %g1 ! Restore %g1
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window_fine:
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sethi %hi(in_trap_handler), %l4
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ld [%lo(in_trap_handler) + %l4], %l5
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tst %l5
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bg recursive_trap
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inc %l5
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set trapstack+1000*4, %sp ! Switch to trap stack
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recursive_trap:
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st %l5, [%lo(in_trap_handler) + %l4]
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sub %sp,(16+1+6+1+80)*4,%sp ! Make room for input & locals
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! + hidden arg + arg spill
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! + doubleword alignment
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! + registers[72] local var
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std %g0, [%sp + (24 + 0) * 4] ! registers[Gx]
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std %g2, [%sp + (24 + 2) * 4]
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std %g4, [%sp + (24 + 4) * 4]
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std %g6, [%sp + (24 + 6) * 4]
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std %i0, [%sp + (24 + 8) * 4] ! registers[Ox]
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std %i2, [%sp + (24 + 10) * 4]
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std %i4, [%sp + (24 + 12) * 4]
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std %i6, [%sp + (24 + 14) * 4]
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mov %y, %l4
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mov %tbr, %l5
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st %l4, [%sp + (24 + 64) * 4] ! Y
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st %l0, [%sp + (24 + 65) * 4] ! PSR
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st %l3, [%sp + (24 + 66) * 4] ! WIM
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st %l5, [%sp + (24 + 67) * 4] ! TBR
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st %l1, [%sp + (24 + 68) * 4] ! PC
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st %l2, [%sp + (24 + 69) * 4] ! NPC
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or %l0, 0xf20, %l4
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mov %l4, %psr ! Turn on traps, disable interrupts
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set 0x1000, %l1
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btst %l1, %l0 ! FP enabled?
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be no_fpstore
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nop
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! Must save fsr first, to flush the FQ. This may cause a deferred fp trap, so
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! traps must be enabled to allow the trap handler to clean things up.
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st %fsr, [%sp + (24 + 70) * 4]
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std %f0, [%sp + (24 + 32) * 4]
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std %f2, [%sp + (24 + 34) * 4]
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std %f4, [%sp + (24 + 36) * 4]
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std %f6, [%sp + (24 + 38) * 4]
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std %f8, [%sp + (24 + 40) * 4]
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std %f10, [%sp + (24 + 42) * 4]
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std %f12, [%sp + (24 + 44) * 4]
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std %f14, [%sp + (24 + 46) * 4]
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std %f16, [%sp + (24 + 48) * 4]
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std %f18, [%sp + (24 + 50) * 4]
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std %f20, [%sp + (24 + 52) * 4]
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std %f22, [%sp + (24 + 54) * 4]
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std %f24, [%sp + (24 + 56) * 4]
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std %f26, [%sp + (24 + 58) * 4]
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std %f28, [%sp + (24 + 60) * 4]
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std %f30, [%sp + (24 + 62) * 4]
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no_fpstore:
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call _handle_exception
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add %sp, 24 * 4, %o0 ! Pass address of registers
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! Reload all of the registers that aren't on the stack
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ld [%sp + (24 + 1) * 4], %g1 ! registers[Gx]
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ldd [%sp + (24 + 2) * 4], %g2
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ldd [%sp + (24 + 4) * 4], %g4
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ldd [%sp + (24 + 6) * 4], %g6
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ldd [%sp + (24 + 8) * 4], %i0 ! registers[Ox]
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ldd [%sp + (24 + 10) * 4], %i2
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ldd [%sp + (24 + 12) * 4], %i4
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ldd [%sp + (24 + 14) * 4], %i6
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ldd [%sp + (24 + 64) * 4], %l0 ! Y & PSR
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ldd [%sp + (24 + 68) * 4], %l2 ! PC & NPC
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set 0x1000, %l5
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btst %l5, %l1 ! FP enabled?
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be no_fpreload
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nop
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ldd [%sp + (24 + 32) * 4], %f0
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ldd [%sp + (24 + 34) * 4], %f2
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ldd [%sp + (24 + 36) * 4], %f4
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ldd [%sp + (24 + 38) * 4], %f6
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ldd [%sp + (24 + 40) * 4], %f8
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ldd [%sp + (24 + 42) * 4], %f10
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ldd [%sp + (24 + 44) * 4], %f12
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ldd [%sp + (24 + 46) * 4], %f14
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ldd [%sp + (24 + 48) * 4], %f16
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ldd [%sp + (24 + 50) * 4], %f18
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ldd [%sp + (24 + 52) * 4], %f20
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ldd [%sp + (24 + 54) * 4], %f22
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ldd [%sp + (24 + 56) * 4], %f24
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ldd [%sp + (24 + 58) * 4], %f26
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ldd [%sp + (24 + 60) * 4], %f28
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ldd [%sp + (24 + 62) * 4], %f30
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ld [%sp + (24 + 70) * 4], %fsr
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no_fpreload:
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restore ! Ensure that previous window is valid
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save %g0, %g0, %g0 ! by causing a window_underflow trap
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mov %l0, %y
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mov %l1, %psr ! Make sure that traps are disabled
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! for rett
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sethi %hi(in_trap_handler), %l4
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ld [%lo(in_trap_handler) + %l4], %l5
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dec %l5
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st %l5, [%lo(in_trap_handler) + %l4]
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jmpl %l2, %g0 ! Restore old PC
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rett %l3 ! Restore old nPC
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");
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/* Convert ch from a hex digit to an int */
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static int
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hex(ch)
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unsigned char ch;
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{
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if (ch >= 'a' && ch <= 'f')
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return ch-'a'+10;
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if (ch >= '0' && ch <= '9')
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return ch-'0';
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if (ch >= 'A' && ch <= 'F')
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return ch-'A'+10;
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return -1;
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}
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static char remcomInBuffer[BUFMAX];
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static char remcomOutBuffer[BUFMAX];
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/* scan for the sequence $<data>#<checksum> */
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unsigned char *
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getpacket ()
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{
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unsigned char *buffer = &remcomInBuffer[0];
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unsigned char checksum;
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unsigned char xmitcsum;
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int count;
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char ch;
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while (1)
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{
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/* wait around for the start character, ignore all other characters */
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while ((ch = getDebugChar ()) != '$')
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;
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retry:
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checksum = 0;
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xmitcsum = -1;
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count = 0;
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/* now, read until a # or end of buffer is found */
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while (count < BUFMAX)
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{
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ch = getDebugChar ();
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if (ch == '$')
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goto retry;
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if (ch == '#')
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break;
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checksum = checksum + ch;
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buffer[count] = ch;
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count = count + 1;
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}
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buffer[count] = 0;
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if (ch == '#')
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{
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ch = getDebugChar ();
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xmitcsum = hex (ch) << 4;
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ch = getDebugChar ();
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xmitcsum += hex (ch);
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if (checksum != xmitcsum)
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{
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putDebugChar ('-'); /* failed checksum */
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}
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else
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{
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putDebugChar ('+'); /* successful transfer */
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/* if a sequence char is present, reply the sequence ID */
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if (buffer[2] == ':')
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{
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putDebugChar (buffer[0]);
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putDebugChar (buffer[1]);
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return &buffer[3];
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}
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return &buffer[0];
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}
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}
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}
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}
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/* send the packet in buffer. */
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static void
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putpacket(buffer)
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unsigned char *buffer;
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{
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unsigned char checksum;
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int count;
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unsigned char ch;
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/* $<packet info>#<checksum>. */
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do
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{
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putDebugChar('$');
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checksum = 0;
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count = 0;
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while (ch = buffer[count])
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{
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putDebugChar (ch);
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checksum += ch;
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count += 1;
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}
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putDebugChar('#');
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putDebugChar(hexchars[checksum >> 4]);
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putDebugChar(hexchars[checksum & 0xf]);
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}
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while (getDebugChar() != '+');
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}
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/* Indicate to caller of mem2hex or hex2mem that there has been an
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error. */
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static volatile int mem_err = 0;
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/* Convert the memory pointed to by mem into hex, placing result in buf.
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* Return a pointer to the last char put in buf (null), in case of mem fault,
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* return 0.
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* If MAY_FAULT is non-zero, then we will handle memory faults by returning
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* a 0, else treat a fault like any other fault in the stub.
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*/
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static unsigned char *
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mem2hex(mem, buf, count, may_fault)
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unsigned char *mem;
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unsigned char *buf;
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int count;
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int may_fault;
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{
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unsigned char ch;
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set_mem_fault_trap(may_fault);
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while (count-- > 0)
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{
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ch = *mem++;
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if (mem_err)
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return 0;
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*buf++ = hexchars[ch >> 4];
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*buf++ = hexchars[ch & 0xf];
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}
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*buf = 0;
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set_mem_fault_trap(0);
|
|
|
|
return buf;
|
|
}
|
|
|
|
/* convert the hex array pointed to by buf into binary to be placed in mem
|
|
* return a pointer to the character AFTER the last byte written */
|
|
|
|
static char *
|
|
hex2mem(buf, mem, count, may_fault)
|
|
unsigned char *buf;
|
|
unsigned char *mem;
|
|
int count;
|
|
int may_fault;
|
|
{
|
|
int i;
|
|
unsigned char ch;
|
|
|
|
set_mem_fault_trap(may_fault);
|
|
|
|
for (i=0; i<count; i++)
|
|
{
|
|
ch = hex(*buf++) << 4;
|
|
ch |= hex(*buf++);
|
|
*mem++ = ch;
|
|
if (mem_err)
|
|
return 0;
|
|
}
|
|
|
|
set_mem_fault_trap(0);
|
|
|
|
return mem;
|
|
}
|
|
|
|
/* This table contains the mapping between SPARC hardware trap types, and
|
|
signals, which are primarily what GDB understands. It also indicates
|
|
which hardware traps we need to commandeer when initializing the stub. */
|
|
|
|
static struct hard_trap_info
|
|
{
|
|
unsigned char tt; /* Trap type code for SPARClite */
|
|
unsigned char signo; /* Signal that we map this trap into */
|
|
} hard_trap_info[] = {
|
|
{0x01, SIGSEGV}, /* instruction access error */
|
|
{0x02, SIGILL}, /* privileged instruction */
|
|
{0x03, SIGILL}, /* illegal instruction */
|
|
{0x04, SIGEMT}, /* fp disabled */
|
|
{0x07, SIGBUS}, /* mem address not aligned */
|
|
{0x09, SIGSEGV}, /* data access exception */
|
|
{0x0a, SIGEMT}, /* tag overflow */
|
|
{0x20, SIGBUS}, /* r register access error */
|
|
{0x21, SIGBUS}, /* instruction access error */
|
|
{0x24, SIGEMT}, /* cp disabled */
|
|
{0x29, SIGBUS}, /* data access error */
|
|
{0x2a, SIGFPE}, /* divide by zero */
|
|
{0x2b, SIGBUS}, /* data store error */
|
|
{0x80+1, SIGTRAP}, /* ta 1 - normal breakpoint instruction */
|
|
{0xff, SIGTRAP}, /* hardware breakpoint */
|
|
{0, 0} /* Must be last */
|
|
};
|
|
|
|
/* Set up exception handlers for tracing and breakpoints */
|
|
|
|
void
|
|
set_debug_traps()
|
|
{
|
|
struct hard_trap_info *ht;
|
|
|
|
/* Only setup fp traps if the FP is disabled. */
|
|
|
|
for (ht = hard_trap_info;
|
|
ht->tt != 0 && ht->signo != 0;
|
|
ht++)
|
|
if (ht->tt != 4 || ! (read_psr () & 0x1000))
|
|
exceptionHandler(ht->tt, trap_low);
|
|
|
|
initialized = 1;
|
|
}
|
|
|
|
asm ("
|
|
! Trap handler for memory errors. This just sets mem_err to be non-zero. It
|
|
! assumes that %l1 is non-zero. This should be safe, as it is doubtful that
|
|
! 0 would ever contain code that could mem fault. This routine will skip
|
|
! past the faulting instruction after setting mem_err.
|
|
|
|
.text
|
|
.align 4
|
|
|
|
_fltr_set_mem_err:
|
|
sethi %hi(_mem_err), %l0
|
|
st %l1, [%l0 + %lo(_mem_err)]
|
|
jmpl %l2, %g0
|
|
rett %l2+4
|
|
");
|
|
|
|
static void
|
|
set_mem_fault_trap(enable)
|
|
int enable;
|
|
{
|
|
extern void fltr_set_mem_err();
|
|
mem_err = 0;
|
|
|
|
if (enable)
|
|
exceptionHandler(9, fltr_set_mem_err);
|
|
else
|
|
exceptionHandler(9, trap_low);
|
|
}
|
|
|
|
asm ("
|
|
.text
|
|
.align 4
|
|
|
|
_dummy_hw_breakpoint:
|
|
jmpl %l2, %g0
|
|
rett %l2+4
|
|
nop
|
|
nop
|
|
");
|
|
|
|
static void
|
|
get_in_break_mode()
|
|
{
|
|
extern void dummy_hw_breakpoint();
|
|
|
|
exceptionHandler (255, dummy_hw_breakpoint);
|
|
|
|
asm ("ta 255");
|
|
|
|
exceptionHandler (255, trap_low);
|
|
}
|
|
|
|
/* Convert the SPARC hardware trap type code to a unix signal number. */
|
|
|
|
static int
|
|
computeSignal(tt)
|
|
int tt;
|
|
{
|
|
struct hard_trap_info *ht;
|
|
|
|
for (ht = hard_trap_info; ht->tt && ht->signo; ht++)
|
|
if (ht->tt == tt)
|
|
return ht->signo;
|
|
|
|
return SIGHUP; /* default for things we don't know about */
|
|
}
|
|
|
|
/*
|
|
* While we find nice hex chars, build an int.
|
|
* Return number of chars processed.
|
|
*/
|
|
|
|
static int
|
|
hexToInt(char **ptr, int *intValue)
|
|
{
|
|
int numChars = 0;
|
|
int hexValue;
|
|
|
|
*intValue = 0;
|
|
|
|
while (**ptr)
|
|
{
|
|
hexValue = hex(**ptr);
|
|
if (hexValue < 0)
|
|
break;
|
|
|
|
*intValue = (*intValue << 4) | hexValue;
|
|
numChars ++;
|
|
|
|
(*ptr)++;
|
|
}
|
|
|
|
return (numChars);
|
|
}
|
|
|
|
/*
|
|
* This function does all command procesing for interfacing to gdb. It
|
|
* returns 1 if you should skip the instruction at the trap address, 0
|
|
* otherwise.
|
|
*/
|
|
|
|
static void
|
|
handle_exception (registers)
|
|
unsigned long *registers;
|
|
{
|
|
int tt; /* Trap type */
|
|
int sigval;
|
|
int addr;
|
|
int length;
|
|
char *ptr;
|
|
unsigned long *sp;
|
|
unsigned long dsr;
|
|
|
|
/* First, we must force all of the windows to be spilled out */
|
|
|
|
asm(" save %sp, -64, %sp
|
|
save %sp, -64, %sp
|
|
save %sp, -64, %sp
|
|
save %sp, -64, %sp
|
|
save %sp, -64, %sp
|
|
save %sp, -64, %sp
|
|
save %sp, -64, %sp
|
|
save %sp, -64, %sp
|
|
restore
|
|
restore
|
|
restore
|
|
restore
|
|
restore
|
|
restore
|
|
restore
|
|
restore
|
|
");
|
|
|
|
get_in_break_mode (); /* Enable DSU register writes */
|
|
|
|
registers[DIA1] = read_asi (1, 0xff00);
|
|
registers[DIA2] = read_asi (1, 0xff04);
|
|
registers[DDA1] = read_asi (1, 0xff08);
|
|
registers[DDA2] = read_asi (1, 0xff0c);
|
|
registers[DDV1] = read_asi (1, 0xff10);
|
|
registers[DDV2] = read_asi (1, 0xff14);
|
|
registers[DCR] = read_asi (1, 0xff18);
|
|
registers[DSR] = read_asi (1, 0xff1c);
|
|
|
|
if (registers[PC] == (unsigned long)breakinst)
|
|
{
|
|
registers[PC] = registers[NPC];
|
|
registers[NPC] += 4;
|
|
}
|
|
sp = (unsigned long *)registers[SP];
|
|
|
|
dsr = (unsigned long)registers[DSR];
|
|
if (dsr & 0x3c)
|
|
tt = 255;
|
|
else
|
|
tt = (registers[TBR] >> 4) & 0xff;
|
|
|
|
/* reply to host that an exception has occurred */
|
|
sigval = computeSignal(tt);
|
|
ptr = remcomOutBuffer;
|
|
|
|
*ptr++ = 'T';
|
|
*ptr++ = hexchars[sigval >> 4];
|
|
*ptr++ = hexchars[sigval & 0xf];
|
|
|
|
*ptr++ = hexchars[PC >> 4];
|
|
*ptr++ = hexchars[PC & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®isters[PC], ptr, 4, 0);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[FP >> 4];
|
|
*ptr++ = hexchars[FP & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex(sp + 8 + 6, ptr, 4, 0); /* FP */
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[SP >> 4];
|
|
*ptr++ = hexchars[SP & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)&sp, ptr, 4, 0);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[NPC >> 4];
|
|
*ptr++ = hexchars[NPC & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®isters[NPC], ptr, 4, 0);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = hexchars[O7 >> 4];
|
|
*ptr++ = hexchars[O7 & 0xf];
|
|
*ptr++ = ':';
|
|
ptr = mem2hex((char *)®isters[O7], ptr, 4, 0);
|
|
*ptr++ = ';';
|
|
|
|
*ptr++ = 0;
|
|
|
|
putpacket(remcomOutBuffer);
|
|
|
|
while (1)
|
|
{
|
|
remcomOutBuffer[0] = 0;
|
|
|
|
ptr = getpacket();
|
|
switch (*ptr++)
|
|
{
|
|
case '?':
|
|
remcomOutBuffer[0] = 'S';
|
|
remcomOutBuffer[1] = hexchars[sigval >> 4];
|
|
remcomOutBuffer[2] = hexchars[sigval & 0xf];
|
|
remcomOutBuffer[3] = 0;
|
|
break;
|
|
|
|
case 'd':
|
|
/* toggle debug flag */
|
|
break;
|
|
|
|
case 'g': /* return the value of the CPU registers */
|
|
memcpy (®isters[L0], sp, 16 * 4); /* Copy L & I regs from stack */
|
|
mem2hex ((char *)registers, remcomOutBuffer, NUMREGBYTES, 0);
|
|
break;
|
|
|
|
case 'G': /* Set the value of all registers */
|
|
case 'P': /* Set the value of one register */
|
|
{
|
|
unsigned long *newsp, psr;
|
|
|
|
psr = registers[PSR];
|
|
|
|
if (ptr[-1] == 'P')
|
|
{
|
|
int regno;
|
|
|
|
if (hexToInt (&ptr, ®no)
|
|
&& *ptr++ == '=')
|
|
if (regno >= L0 && regno <= I7)
|
|
hex2mem (ptr, sp + regno - L0, 4, 0);
|
|
else
|
|
hex2mem (ptr, (char *)®isters[regno], 4, 0);
|
|
else
|
|
{
|
|
strcpy (remcomOutBuffer, "E01");
|
|
break;
|
|
}
|
|
}
|
|
else
|
|
{
|
|
hex2mem (ptr, (char *)registers, NUMREGBYTES, 0);
|
|
memcpy (sp, ®isters[L0], 16 * 4); /* Copy L & I regs to stack */
|
|
}
|
|
|
|
/* See if the stack pointer has moved. If so, then copy the saved
|
|
locals and ins to the new location. This keeps the window
|
|
overflow and underflow routines happy. */
|
|
|
|
newsp = (unsigned long *)registers[SP];
|
|
if (sp != newsp)
|
|
sp = memcpy(newsp, sp, 16 * 4);
|
|
|
|
/* Don't allow CWP to be modified. */
|
|
|
|
if (psr != registers[PSR])
|
|
registers[PSR] = (psr & 0x1f) | (registers[PSR] & ~0x1f);
|
|
|
|
strcpy(remcomOutBuffer,"OK");
|
|
}
|
|
break;
|
|
|
|
case 'm': /* mAA..AA,LLLL Read LLLL bytes at address AA..AA */
|
|
/* Try to read %x,%x. */
|
|
|
|
if (hexToInt(&ptr, &addr)
|
|
&& *ptr++ == ','
|
|
&& hexToInt(&ptr, &length))
|
|
{
|
|
if (mem2hex((char *)addr, remcomOutBuffer, length, 1))
|
|
break;
|
|
|
|
strcpy (remcomOutBuffer, "E03");
|
|
}
|
|
else
|
|
strcpy(remcomOutBuffer,"E01");
|
|
break;
|
|
|
|
case 'M': /* MAA..AA,LLLL: Write LLLL bytes at address AA.AA return OK */
|
|
/* Try to read '%x,%x:'. */
|
|
|
|
if (hexToInt(&ptr, &addr)
|
|
&& *ptr++ == ','
|
|
&& hexToInt(&ptr, &length)
|
|
&& *ptr++ == ':')
|
|
{
|
|
if (hex2mem(ptr, (char *)addr, length, 1))
|
|
strcpy(remcomOutBuffer, "OK");
|
|
else
|
|
strcpy(remcomOutBuffer, "E03");
|
|
}
|
|
else
|
|
strcpy(remcomOutBuffer, "E02");
|
|
break;
|
|
|
|
case 'c': /* cAA..AA Continue at address AA..AA(optional) */
|
|
/* try to read optional parameter, pc unchanged if no parm */
|
|
if (hexToInt(&ptr, &addr))
|
|
{
|
|
registers[PC] = addr;
|
|
registers[NPC] = addr + 4;
|
|
}
|
|
|
|
/* Need to flush the instruction cache here, as we may have deposited a
|
|
breakpoint, and the icache probably has no way of knowing that a data ref to
|
|
some location may have changed something that is in the instruction cache.
|
|
*/
|
|
|
|
flush_i_cache ();
|
|
|
|
if (!(registers[DSR] & 0x1) /* DSU enabled? */
|
|
&& !(registers[DCR] & 0x200)) /* Are we in break state? */
|
|
{ /* Yes, set the DSU regs */
|
|
write_asi (1, 0xff00, registers[DIA1]);
|
|
write_asi (1, 0xff04, registers[DIA2]);
|
|
write_asi (1, 0xff08, registers[DDA1]);
|
|
write_asi (1, 0xff0c, registers[DDA2]);
|
|
write_asi (1, 0xff10, registers[DDV1]);
|
|
write_asi (1, 0xff14, registers[DDV2]);
|
|
write_asi (1, 0xff1c, registers[DSR]);
|
|
write_asi (1, 0xff18, registers[DCR] | 0x200); /* Clear break */
|
|
}
|
|
|
|
return;
|
|
|
|
/* kill the program */
|
|
case 'k' : /* do nothing */
|
|
break;
|
|
#if 0
|
|
case 't': /* Test feature */
|
|
asm (" std %f30,[%sp]");
|
|
break;
|
|
#endif
|
|
case 'r': /* Reset */
|
|
asm ("call 0
|
|
nop ");
|
|
break;
|
|
} /* switch */
|
|
|
|
/* reply to the request */
|
|
putpacket(remcomOutBuffer);
|
|
}
|
|
}
|
|
|
|
/* This function will generate a breakpoint exception. It is used at the
|
|
beginning of a program to sync up with a debugger and can be used
|
|
otherwise as a quick means to stop program execution and "break" into
|
|
the debugger. */
|
|
|
|
void
|
|
breakpoint()
|
|
{
|
|
if (!initialized)
|
|
return;
|
|
|
|
asm(" .globl _breakinst
|
|
|
|
_breakinst: ta 1
|
|
");
|
|
}
|