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328 lines
11 KiB
Plaintext
328 lines
11 KiB
Plaintext
# Copyright (C) 2003-2020 Free Software Foundation, Inc.
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#
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# This file is part of the GNU Binutils.
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#
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# This program is free software; you can redistribute it and/or modify
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# it under the terms of the GNU General Public License as published by
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# the Free Software Foundation; either version 3 of the License, or
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# (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful,
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# but WITHOUT ANY WARRANTY; without even the implied warranty of
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# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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# GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License
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# along with this program; if not, write to the Free Software
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# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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# MA 02110-1301, USA.
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if {![istarget mips*-*-*] || ![is_elf_format]} {
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return
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}
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global ldemul
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if {[istarget mips*-*-irix6*]} {
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set ldemul "-melf32bsmip"
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} elseif {[istarget mips*el-*-linux*]} {
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set ldemul "-melf32ltsmip"
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} elseif {[istarget mips*-*-linux*]} {
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set ldemul "-melf32btsmip"
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} elseif {[istarget mips*el-*-*freebsd*]} {
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set ldemul "-melf32ltsmip_fbsd"
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} elseif {[istarget mips*-*-*freebsd*]} {
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set ldemul "-melf32btsmip_fbsd"
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} else {
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set ldemul ""
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}
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# Check is ld supported 32bit emulations.
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proc check_ld_support_32bit { } {
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global ld
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global echo
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set ld_output [remote_exec host $ld "-V"]
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if [string match "*elf32*" $ld_output] then {
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return 1
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} else {
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return 0
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}
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}
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# Check args is 32bit abis.
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proc check_is_32bit_args {arg} {
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if { [string match "*-32*" $arg]
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|| [string match "*-mabi=32*" $arg]
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|| [string match "*-mabi=o64*" $arg]
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|| [string match "*-mgp32*" $arg] } {
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return 1
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} else {
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return 0
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}
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}
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# Assemble jr.s using each of the argument lists in ARGLIST. Return the
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# list of object files on success and an empty list on failure.
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proc assemble_for_flags {arglist} {
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global as srcdir subdir
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set objs {}
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set index 1
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foreach args $arglist {
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set obj "tmpdir/mips-flags-${index}.o"
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if {![ld_assemble $as "$args $srcdir/$subdir/jr.s" $obj]} {
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return ""
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}
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lappend objs $obj
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incr index
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}
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return $objs
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}
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# Assemble a file using each set of arguments in ARGLIST. Check that
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# the objects can be linked together and that the `readelf -h' output
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# includes each flag named in FLAGS. Additional one or more arguments
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# request the addition of the `-A' option to `readelf' invocation. In
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# this case check MIPS ABI Flags reported for the ISA to match the
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# first of these arguments, the ISA Extension to match the second, and
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# the ASEs listed are exactly the same as those listed in the third,
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# passed as a TCL list.
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proc good_combination {arglist flags args} {
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global ld ldemul READELF
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set finalobj "tmpdir/mips-flags.o"
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set testname "MIPS compatible objects: $arglist"
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set objs [assemble_for_flags $arglist]
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foreach argsl $arglist {
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if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } {
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unsupported $testname
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return 0
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}
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}
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if {$objs == ""} {
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unresolved $testname
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} elseif {![ld_link "$ld $ldemul" $finalobj "-r $objs"]} {
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fail $testname
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} else {
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set A [expr {[llength $args] > 0} ? {"A"} : {""}]
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set cmd "$READELF -h$A $finalobj"
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send_log "$cmd\n"
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set cmdret [remote_exec host [concat sh -c [list "$cmd 2>&1"]]]
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set output [lindex $cmdret 1]
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set cmdret [lindex $cmdret 0]
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if {$cmdret != 0 \
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|| ![regexp "Flags: *(\[^\n\r\]*)" $output full gotflags]} {
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unresolved $testname
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} else {
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set failed 0
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# GOTFLAGS is a list of flags separated by ", ".
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# Convert it to a tcl list.
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regsub -all ", " $gotflags "," gotflags
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set gotflags [split $gotflags ","]
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foreach flag $flags {
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if {[lsearch -exact $gotflags $flag] < 0} {
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# The mips*-*-irix* not use o32 flags.
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if {[istarget mips*-*-irix*] && $flag == "o32"} {
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set failed 0
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} else {
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set failed 1
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}
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}
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}
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set isa [string trim [lindex $args 0]]
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if {$isa != ""
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&& (![regexp "ISA: *(\[^\n\r\]*)" $output full gotisa]
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|| ![string match $isa $gotisa])} {
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set failed 1
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}
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set ext [string trim [lindex $args 1]]
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if {$ext != ""
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&& (![regexp "ISA Extension: *(\[^\n\r\]*)" \
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$output full gotext]
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|| ![string match $ext $gotext])} {
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set failed 1
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}
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set ases [string trim [lindex $args 2]]
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if {[llength $ases] > 0} {
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if {![regexp "ASEs:\[\n\r\]+((?:\t\[^\n\r\]*\[\n\r\]+)*)" \
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$output full gotases]} {
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set failed 1
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} else {
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# GOTASES is a list of strings separated by tab and
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# line separator characters. Convert it to a TCL list.
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regsub -all "\[\n\r\t\]+" $gotases "\n" gotases
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set gotases [split [string trim $gotases] "\n"]
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foreach ase $ases {
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set aseidx [lsearch -exact $gotases $ase]
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if {$aseidx >= 0} {
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set gotases [lreplace $gotases $aseidx $aseidx]
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} else {
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set failed 1
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}
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}
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if {[llength $gotases] > 0} {
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set failed 1
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}
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}
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}
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if {$failed} {
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fail $testname
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} else {
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pass $testname
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}
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}
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}
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}
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# Like good_combination, but check that the objects can't be linked
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# together successfully and that the output includes MESSAGE.
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proc bad_combination {arglist message} {
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global link_output ld ldemul
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set finalobj "tmpdir/mips-flags.o"
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set testname "MIPS incompatible objects: $arglist"
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set objs [assemble_for_flags $arglist]
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foreach argsl $arglist {
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if { [check_is_32bit_args $argsl] && ![check_ld_support_32bit] } {
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unsupported $testname
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return 0
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}
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}
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if {$objs == ""} {
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unresolved $testname
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} elseif {[ld_link "$ld $ldemul" $finalobj "-r $objs"]
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|| [string first $message $link_output] < 0} {
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fail $testname
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} else {
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pass $testname
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}
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}
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# Routines to check for various kinds of incompatibility.
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proc abi_conflict {arglist firstabi secondabi} {
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bad_combination $arglist \
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"linking $secondabi module with previous $firstabi modules"
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}
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proc isa_conflict {arglist firstisa secondisa} {
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bad_combination $arglist \
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"linking mips:$secondisa module with previous mips:$firstisa modules"
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}
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proc regsize_conflict {arglist} {
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bad_combination $arglist \
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"linking 32-bit code with 64-bit code"
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}
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abi_conflict { "-mabi=eabi -mgp32" "-mips4 -mabi=32" } EABI32 O32
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abi_conflict { "-mips4 -mabi=o64" "-mips3 -mabi=eabi" } O64 EABI64
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isa_conflict { "-march=vr5500 -32" "-march=sb1 -32" } 5500 sb1
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isa_conflict { "-march=vr5400 -32" "-march=4120 -32" } 5400 4120
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isa_conflict { "-march=r3900 -32" "-march=r6000 -32" } 3900 6000
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isa_conflict { "-march=r4010 -32" "-march=r4650 -32" } 4010 4650
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isa_conflict { "-mips3 -mgp32 -32" "-mips32 -32" } 4000 isa32
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isa_conflict { "-march=sb1 -mgp32 -32" "-mips32r2 -32" } sb1 isa32r2
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isa_conflict { "-march=sb1 -32" "-mips64r2 -32" } sb1 isa64r2
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isa_conflict { "-march=vr4100 -32" "-march=r10000 -32" } 4100 8000
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isa_conflict { "-march=r5900 -32" "-march=vr4111 -32" } 5900 4111
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isa_conflict { "-march=loongson2e -32" "-march=loongson2f -32" } loongson_2e loongson_2f
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isa_conflict { "-march=gs464 -32" "-march=loongson2f -32" } gs464 loongson_2f
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isa_conflict { "-march=interaptiv-mr2 -32" \
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"-march=r4010 -32" } interaptiv-mr2 4010
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isa_conflict { "-march=interaptiv-mr2 -mnan=2008 -mfp64 -32" \
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"-mips32r6 -32" } interaptiv-mr2 isa32r6
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isa_conflict { "-march=interaptiv-mr2 -32" \
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"-mips3 -32" } interaptiv-mr2 4000
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isa_conflict { "-march=interaptiv-mr2 -32" \
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"-mips64r2 -32" } interaptiv-mr2 isa64r2
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isa_conflict { "-march=interaptiv-mr2 -32" \
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"-march=octeon -32" } interaptiv-mr2 octeon
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regsize_conflict { "-mips4 -mgp64 -mabi=o64" "-mips2 -32" }
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regsize_conflict { "-mips4 -mabi=o64" "-mips4 -mabi=32" }
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regsize_conflict { "-mips4 -mabi=eabi -mgp32" "-mips4 -mabi=eabi -mgp64" }
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regsize_conflict { "-march=vr5000 -mgp64 -mabi=o64" "-march=vr5000 -mgp32 -32" }
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regsize_conflict { "-mips32 -32" "-mips64 -mabi=o64" }
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regsize_conflict { "-mips32r2 -32" "-mips64 -mabi=o64" }
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regsize_conflict { "-mips32r2 -32" "-mips64r2 -mabi=o64" }
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good_combination { "-mips4 -mgp32 -32" "-mips2 -32" } { mips4 o32 }
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good_combination { "-mips4 -mabi=32" "-mips2 -32" } { mips4 o32 }
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good_combination { "-mips2 -32" "-mips4 -mabi=32" } { mips4 o32 }
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good_combination { "-mips2 -mabi=eabi" "-mips4 -mabi=eabi -mgp32" } { mips4 eabi32 }
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good_combination { "-mips2 -32" "-mips32 -32" "-mips32r2 -32" } { mips32r2 }
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good_combination { "-mips1 -32" "-mips32r2 -32" "-mips32 -32" } { mips32r2 }
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good_combination { "-march=vr4100 -32" "-march=vr4120 -32" } { 4120 }
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good_combination { "-march=vr5400 -32" "-march=vr5500 -32" "-mips4 -32" } { 5500 }
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good_combination { "-mips3 -32" "-mips4 -32" "-march=sb1 -32" "-mips5 -32" } { sb1 }
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good_combination { "-mips1 -32" "-march=3900 -32" } { 3900 }
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good_combination { "-mips3 -32" "-mips64r2 -32" " -mips64 -32" } { mips64r2 }
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good_combination { "-march=vr4120 -mabi=32" "-mips3 -mabi=32" } { 4120 o32 }
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good_combination { "-march=sb1 -mgp32 -32" "-march=4000 -mgp32 -32" } { sb1 o32 }
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good_combination { "-mips32 -mabi=32" "-march=sb1 -mabi=32" } { sb1 o32 }
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good_combination { "-mips64r2 -mabi=32" "-mips32 -mabi=32" } { mips64r2 o32 }
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good_combination { "-mips5 -mabi=o64" "-mips64r2 -mabi=o64" } { mips64r2 o64 }
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good_combination { "-march=interaptiv-mr2 -32" "-mips1 -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r3 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
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good_combination { "-march=interaptiv-mr2 -32" "-mips32r2 -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r3 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
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good_combination { "-march=interaptiv-mr2 -32" "-march=interaptiv -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r3 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
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good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r3 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
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good_combination { "-march=interaptiv-mr2 -32" "-mips32r3 -mips16 -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r3 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" "MT ASE" "MIPS16 ASE" }
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good_combination { "-march=interaptiv-mr2 -mips16 -32" "-mips32r3 -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r3 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" "MT ASE" \
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"MIPS16 ASE" "MIPS16e2 ASE" }
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good_combination { "-march=interaptiv-mr2 -32" "-mips32r5 -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r5 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" "MT ASE" }
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good_combination { "-march=interaptiv-mr2 -32" "-march=m5100 -32" } \
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{ mips32r2 interaptiv-mr2 } \
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MIPS32r5 "Imagination interAptiv MR2" \
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{ "DSP ASE" "Enhanced VA Scheme" \
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"MCU (MicroController) ASE" "MT ASE" }
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good_combination { "-march=gs464 -32" "-march=gs464e -32" } \
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{ gs464e o32 } \
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MIPS64r2 "None" \
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{ "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" }
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good_combination { "-march=gs264e -32" "-march=gs464e -32" } \
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{ gs264e o32 } \
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MIPS64r2 "None" \
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{ "Loongson MMI ASE" "Loongson CAM ASE" "Loongson EXT ASE" "Loongson EXT2 ASE" }
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