binutils-gdb/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od
Maciej W. Rozycki 54806ffa85 MIPS/BFD: Handle branches in PLT compression selection
Complement:

commit 1bbce13264
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date:   Mon Jun 24 23:55:46 2013 +0000

<https://sourceware.org/ml/binutils/2013-06/msg00077.html>, ("MIPS:
Compressed PLT/stubs support"), and also choose between regular and
compressed PLT entries as appropriate for any branches referring.

	bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation): Handle branches
	in PLT compression selection.
	(_bfd_mips_elf_check_relocs): Likewise.

	ld/
	* testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support.
	* testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise.
	* testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New
	test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New
	test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd:
	New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-26 20:00:48 +01:00

34 lines
775 B
Plaintext

.* file format .*
Disassembly of section \.plt:
# All entries must be microMIPS.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 7984 0000 addiu \$3,\$pc,1048576
.*: ff23 0000 lw \$25,0\(\$3\)
.*: 0535 subu \$2,\$2,\$3
.*: 2525 srl \$2,\$2,2
.*: 3302 fffe addiu \$24,\$2,-2
.*: 0dff move \$15,\$31
.*: 45f9 jalrs \$25
.*: 0f83 move \$28,\$3
.*: 0c00 nop
10100018 <f_bc@micromipsplt>:
.*: 7903 fffc addiu \$2,\$pc,1048560
# ^ 0x10200008
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
Disassembly of section \.text\.a:
10101000 <testc>:
.*: 4060 f80a bal 10100018 <f_bc@micromipsplt>
.*: 0000 0000 nop
.*: 9400 f806 b 10100018 <f_bc@micromipsplt>
.*: 0c00 nop
.*: 459f jr \$31