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40fc1451c6
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This change affects microMIPS, MIPS32, MIPS64. 2015-08-12 Simon Dardis <simon.dardis@imgtec.com> opcodes/ * micromips-opc.c (micromips_opcodes): Re-order table so that move based on 'or' is first. * mips-opc.c (mips_builtin_opcodes): Ditto. bfd/ * elfxx-mips.c (STUB_MOVE): Change to use 'or' only. (mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry, mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry): Update to use 'or' instead of 'addu/daddu'. (_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE. (move_insns_32): Reorder table. gas/ * config/tc-mips.c (move_register): Change to use 'or' only. (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to use or for move. gas/testsuite/ * gas/mips/elf-rel23.d: Update test. * gas/mips/elf-rel23.d: Ditto. * gas/mips/elf-rel23a.d: Ditto. * gas/mips/elf-rel23b.d: Ditto. * gas/mips/elf_e_flags1.d: Ditto. * gas/mips/elf_e_flags2.d: Ditto. * gas/mips/elf_e_flags3.d: Ditto. * gas/mips/elf_e_flags4.d: Ditto. * gas/mips/loc-swap-dis.d: Ditto. * gas/mips/micromips-insn32.d: Ditto. * gas/mips/micromips-noinsn32.d: Ditto. * gas/mips/micromips-trap.d: Ditto. * gas/mips/micromips.d: Ditto. * gas/mips/mips-abi32-pic.d: Ditto. * gas/mips/mips-abi32.d: Ditto. * gas/mips/mips-gp32-fp32-pic.d: Ditto. * gas/mips/mips-gp32-fp32.d: Ditto. * gas/mips/mips-gp32-fp64-pic.d: Ditto. * gas/mips/mips-gp32-fp64.d: Ditto. * gas/mips/mips-gp64-fp32-pic.d: Ditto. * gas/mips/mips-gp64-fp32.d: Ditto. * gas/mips/mips-gp64-fp64-pic.d: Ditto. * gas/mips/mips-gp64-fp64.d: Ditto. * gas/mips/mipsr6@loc-swap-dis.d: Ditto. * gas/mips/tls-o32.d: Ditto. * gas/mips/uld2-eb.d: Ditto. * gas/mips/uld2-el.d: Ditto. * gas/mips/ulw2-eb-ilocks.d: Ditto. * gas/mips/ulw2-eb.d: Ditto. * gas/mips/ulw2-el-ilocks.d: Ditto. * gas/mips/ulw2-el.d: Ditto. * gas/mips/move.d: New test. * gas/mips/move.s: Ditto. * gas/mips/micromips32-move.d: Ditto. * gas/mips/micromips32-move.s: Ditto. * gas/mips/mips.exp: Run the new tests. gold/ * mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64, lazy_stub_normal_1, lazy_stub_normal_1_n64, lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big, lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64, lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big, lazy_stub_micromips32_big_n64): Update to use 'or' for move instead of 'addu/daddu'. ld/testsuite/ * ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test. * ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-se.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto. * ld-mips-elf/jalx-2.dd: Ditto. * ld-mips-elf/mips16-pic-3.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3a.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-5b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto. * ld-mips-elf/stub-dynsym-1-10000.d: Ditto. * ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto. * ld-mips-elf/stub-dynsym-1-7fff.d: Ditto. * ld-mips-elf/stub-dynsym-1-8000.d: Ditto. * ld-mips-elf/stub-dynsym-1-fff0.d: Ditto. * ld-mips-elf/tlsbin-o32.d: Ditto. * ld-mips-elf/tlsdyn-o32-1.d: Ditto. * ld-mips-elf/tlsdyn-o32-2.d: Ditto. * ld-mips-elf/tlsdyn-o32-3.d: Ditto. * ld-mips-elf/tlsdyn-o32.d: Ditto. * ld-mips-elf/tlslib-o32.d: Ditto.
104 lines
2.5 KiB
Plaintext
104 lines
2.5 KiB
Plaintext
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.* file format .*
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Disassembly of section \.plt:
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10100000 <_PROCEDURE_LINKAGE_TABLE_>:
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.*: 3c1c1020 lui \$28,0x1020
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.*: 8f990000 lw \$25,0\(\$28\)
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.*: 279c0000 addiu \$28,\$28,0
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.*: 031cc023 subu \$24,\$24,\$28
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.*: 03e07825 move \$15,\$31
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.*: 0018c082 srl \$24,\$24,0x2
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.*: 0320f809 jalr \$25
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.*: 2718fffe addiu \$24,\$24,-2
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10100020 <f_lo_iu@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90008 lw \$25,8\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80008 addiu \$24,\$15,8
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10100030 <f_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9000c lw \$25,12\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8000c addiu \$24,\$15,12
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10100040 <f_iu_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90010 lw \$25,16\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80010 addiu \$24,\$15,16
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10100050 <f_lo_iu_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90014 lw \$25,20\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80014 addiu \$24,\$15,20
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10100060 <f_lo_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90018 lw \$25,24\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80018 addiu \$24,\$15,24
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10100070 <f_lo@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9001c lw \$25,28\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8001c addiu \$24,\$15,28
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Disassembly of section \.MIPS\.stubs:
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10101000 <_MIPS_STUBS_>:
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# Lazy-binding stub for f_iu.
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.*: 8f998010 lw \$25,-32752\(\$28\)
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.*: 03e07825 move \$15,\$31
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.*: 0320f809 jalr \$25
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.*: 24180009 li \$24,9
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\.\.\.
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Disassembly of section \.text\.b:
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10102000 <testu>:
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.*: ........ jal [0-9a-f]+ <f_du@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_du@plt>
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.*: 00000000 nop
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.*: 8c628024 lw \$2,-32732\(\$3\)
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# ^ global GOT entry for f_iu
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.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_iu_du@plt>
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.*: 00000000 nop
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.*: 8c628018 lw \$2,-32744\(\$3\)
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# ^ local GOT entry for f_iu_du@plt
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.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_lo_du@plt>
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.*: 00000000 nop
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.*: 8c62801c lw \$2,-32740\(\$3\)
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# ^ local GOT entry for f_lo_iu@plt
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.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
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.*: 00000000 nop
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.*: 8c628020 lw \$2,-32736\(\$3\)
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# ^ local GOT entry for f_lo_iu_du@plt
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.*: 03e00008 jr \$31
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Disassembly of section \.text\.c:
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10103000 <testlo>:
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.*: 24020070 li \$2,112
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# ^ low 16 bits of f_lo@plt
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.*: 24020060 li \$2,96
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# ^ low 16 bits of f_lo_du@plt
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.*: 24020020 li \$2,32
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# ^ low 16 bits of f_lo_iu@plt
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.*: 24020050 li \$2,80
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# ^ low 16 bits of f_lo_iu_du@plt
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