binutils-gdb/ld/testsuite/ld-alpha/tlsbinr.dd
Alan Modra 2e0ce1c84d Align eh_frame FDEs according to their encoding
bfd/
	* elf-bfd.h (struct eh_cie_fde): Add u.cie.per_encoding_aligned8.
	* elf-eh-frame.c (size_of_output_cie_fde): Don't align here.
	(next_cie_fde_offset): New function.
	(_bfd_elf_parse_eh_frame): Set u.cie.per_encoding_aligned8.
	(_bfd_elf_discard_section_eh_frame): Align zero terminator to
	four bytes.  Align CIEs to four or eight bytes depending on
	per_encoding_aligned8.  Align FDEs according to their encoding.
	Pad last FDE to output section alignment.
	(_bfd_elf_write_section_eh_frame): Adjust to suit.  Remove
	assertion.
	* elf64-ppc.c (glink_eh_frame_cie): Delete padding.
	(ppc64_elf_size_stubs): Pad glink eh_frame as per elf-eh-frame.c.
	(ppc64_elf_finish_dynamic_sections): Adjust to suit.
ld/
	* testsuite/ld-elf/eh3.d: Adjust for eh_frame alignment change.
	* testsuite/ld-elf/eh6.d: Likewise.
	* testsuite/ld-alpha/tlsbin.dd: Likewise.
	* testsuite/ld-alpha/tlsbin.td: Likewise.
	* testsuite/ld-alpha/tlsbinr.dd: Likewise.
	* testsuite/ld-alpha/tlspic.dd: Likewise.
	* testsuite/ld-alpha/tlspic.rd: Likewise.
	* testsuite/ld-alpha/tlspic.sd: Likewise.
	* testsuite/ld-alpha/tlspic.td: Likewise.
	* testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise.
	* testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise.
	* testsuite/ld-mips-elf/eh-frame3.d: Likewise.
	* testsuite/ld-x86-64/pr20830a.d: Likewise.
	* testsuite/ld-x86-64/pr21038a.d: Likewise.
	* testsuite/ld-x86-64/pr21038b.d: Likewise.
	* testsuite/ld-x86-64/pr21038c.d: Likewise.
2017-03-05 14:49:54 +10:30

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#source: align.s
#source: tlsbinpic.s
#source: tlsbin.s
#as:
#ld: -relax -melf64alpha
#objdump: -drj.text
#target: alpha*-*-*
.*: +file format elf64-alpha
Disassembly of section \.text:
0+120001000 <fn2>:
120001000: 02 00 bb 27 ldah gp,2\(t12\)
120001004: 98 82 bd 23 lda gp,-32104\(gp\)
120001008: 3e 15 c2 43 subq sp,0x10,sp
12000100c: 00 00 5e b7 stq ra,0\(sp\)
120001010: 08 80 1d a6 ldq a0,-32760\(gp\)
120001014: 00 00 fe 2f unop
120001018: 9e 00 00 00 rduniq
12000101c: 00 04 00 42 addq a0,v0,v0
120001020: 00 00 fe 2f unop
120001024: 34 00 1f 22 lda a0,52
120001028: 00 00 fe 2f unop
12000102c: 9e 00 00 00 rduniq
120001030: 00 04 00 42 addq a0,v0,v0
120001034: 00 00 fe 2f unop
120001038: 10 00 1f 22 lda a0,16
12000103c: 00 00 fe 2f unop
120001040: 9e 00 00 00 rduniq
120001044: 00 04 00 42 addq a0,v0,v0
120001048: 00 00 fe 2f unop
12000104c: 21 00 20 20 lda t0,33\(v0\)
120001050: 10 00 1f 22 lda a0,16
120001054: 00 00 fe 2f unop
120001058: 9e 00 00 00 rduniq
12000105c: 00 04 00 42 addq a0,v0,v0
120001060: 00 00 fe 2f unop
120001064: 40 00 20 20 lda t0,64\(v0\)
120001068: 46 00 20 20 lda t0,70\(v0\)
12000106c: 00 00 20 24 ldah t0,0\(v0\)
120001070: 4b 00 21 20 lda t0,75\(t0\)
120001074: 56 00 3f 20 lda t0,86
120001078: 01 04 20 40 addq t0,v0,t0
12000107c: 00 00 5e a7 ldq ra,0\(sp\)
120001080: 1e 14 c2 43 addq sp,0x10,sp
120001084: 01 80 fa 6b ret
0000000120001088 <_start>:
120001088: 9e 00 00 00 rduniq
12000108c: 09 04 e0 47 mov v0,s0
120001090: 00 80 3d a4 ldq t0,-32768\(gp\)
120001094: 01 04 29 40 addq t0,s0,t0
120001098: 90 00 3f 20 lda t0,144
12000109c: 01 04 29 40 addq t0,s0,t0
1200010a0: 10 00 29 20 lda t0,16\(s0\)
1200010a4: 96 00 29 20 lda t0,150\(s0\)
1200010a8: 00 00 29 24 ldah t0,0\(s0\)
1200010ac: 57 00 21 20 lda t0,87\(t0\)
1200010b0: 98 00 3f 20 lda t0,152
1200010b4: 01 04 29 40 addq t0,s0,t0
1200010b8: 01 80 fa 6b ret