mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-27 03:54:41 +08:00
aea77599d0
* ppc.h: Add PPC_OPCODE_ALTIVEC2, PPC_OPCODE_E6500, PPC_OPCODE_TMR. opcodes/ * ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500". * ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New. (PPCVEC2, PPCTMR, E6500): New short names. (powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt, mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx, lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl, lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl, lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC optional operands on sync instruction for E6500 target. bfd/ * archures.c: Add bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500. * bfd-in2.h: Regenerate. * cpu-powerpc.c (bfd_powerpc_archs): Add entryies for bfd_mach_ppc_e5500 and bfd_mach_ppc_e6500. gas/ * config/tc-ppc.c (md_show_usage): Document -me5500 and -me6500. (ppc_handle_align): Add termination nop opcode for e500mc family. * doc/as.texinfo: Document options -me5500 and -me6500. * doc/c-ppc.texi: Likewise. gas/testsuite/ * gas/ppc/e500mc64_nop.s: New test case for e500mc family termination nops. * gas/ppc/e500mc64_nop.d: Likewise. * gas/ppc/e5500_nop.s: Likewise. * gas/ppc/e5500_nop.d: Likewise. * gas/ppc/e6500_nop.s: Likewise. * gas/ppc/e6500_nop.d: Likewise. * gas/ppc/e6500.s: New. * gas/ppc/e6500.d: Likewise. * gas/ppc/ppc.exp: Run e6500, e500mc64_nop, e5500_nop, and e6500_nop.
222 lines
5.4 KiB
Plaintext
222 lines
5.4 KiB
Plaintext
@c Copyright 2001, 2002, 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
|
|
@c 2012 Free Software Foundation, Inc.
|
|
@c This is part of the GAS manual.
|
|
@c For copying conditions, see the file as.texinfo.
|
|
@c man end
|
|
@ifset GENERIC
|
|
@page
|
|
@node PPC-Dependent
|
|
@chapter PowerPC Dependent Features
|
|
@end ifset
|
|
@ifclear GENERIC
|
|
@node Machine Dependencies
|
|
@chapter PowerPC Dependent Features
|
|
@end ifclear
|
|
|
|
@cindex PowerPC support
|
|
@menu
|
|
* PowerPC-Opts:: Options
|
|
* PowerPC-Pseudo:: PowerPC Assembler Directives
|
|
* PowerPC-Syntax:: PowerPC Syntax
|
|
@end menu
|
|
|
|
@node PowerPC-Opts
|
|
@section Options
|
|
|
|
@cindex options for PowerPC
|
|
@cindex PowerPC options
|
|
@cindex architectures, PowerPC
|
|
@cindex PowerPC architectures
|
|
The PowerPC chip family includes several successive levels, using the same
|
|
core instruction set, but including a few additional instructions at
|
|
each level. There are exceptions to this however. For details on what
|
|
instructions each variant supports, please see the chip's architecture
|
|
reference manual.
|
|
|
|
The following table lists all available PowerPC options.
|
|
|
|
@c man begin OPTIONS
|
|
@table @gcctabopt
|
|
@item -a32
|
|
Generate ELF32 or XCOFF32.
|
|
|
|
@item -a64
|
|
Generate ELF64 or XCOFF64.
|
|
|
|
@item -K PIC
|
|
Set EF_PPC_RELOCATABLE_LIB in ELF flags.
|
|
|
|
@item -mpwrx | -mpwr2
|
|
Generate code for POWER/2 (RIOS2).
|
|
|
|
@item -mpwr
|
|
Generate code for POWER (RIOS1)
|
|
|
|
@item -m601
|
|
Generate code for PowerPC 601.
|
|
|
|
@item -mppc, -mppc32, -m603, -m604
|
|
Generate code for PowerPC 603/604.
|
|
|
|
@item -m403, -m405
|
|
Generate code for PowerPC 403/405.
|
|
|
|
@item -m440
|
|
Generate code for PowerPC 440. BookE and some 405 instructions.
|
|
|
|
@item -m464
|
|
Generate code for PowerPC 464.
|
|
|
|
@item -m476
|
|
Generate code for PowerPC 476.
|
|
|
|
@item -m7400, -m7410, -m7450, -m7455
|
|
Generate code for PowerPC 7400/7410/7450/7455.
|
|
|
|
@item -m750cl
|
|
Generate code for PowerPC 750CL.
|
|
|
|
@item -mppc64, -m620
|
|
Generate code for PowerPC 620/625/630.
|
|
|
|
@item -me500, -me500x2
|
|
Generate code for Motorola e500 core complex.
|
|
|
|
@item -me500mc
|
|
Generate code for Freescale e500mc core complex.
|
|
|
|
@item -me500mc64
|
|
Generate code for Freescale e500mc64 core complex.
|
|
|
|
@item -me5500
|
|
Generate code for Freescale e5500 core complex.
|
|
|
|
@item -me6500
|
|
Generate code for Freescale e6500 core complex.
|
|
|
|
@item -mspe
|
|
Generate code for Motorola SPE instructions.
|
|
|
|
@item -mtitan
|
|
Generate code for AppliedMicro Titan core complex.
|
|
|
|
@item -mppc64bridge
|
|
Generate code for PowerPC 64, including bridge insns.
|
|
|
|
@item -mbooke
|
|
Generate code for 32-bit BookE.
|
|
|
|
@item -ma2
|
|
Generate code for A2 architecture.
|
|
|
|
@item -me300
|
|
Generate code for PowerPC e300 family.
|
|
|
|
@item -maltivec
|
|
Generate code for processors with AltiVec instructions.
|
|
|
|
@item -mvsx
|
|
Generate code for processors with Vector-Scalar (VSX) instructions.
|
|
|
|
@item -mpower4, -mpwr4
|
|
Generate code for Power4 architecture.
|
|
|
|
@item -mpower5, -mpwr5, -mpwr5x
|
|
Generate code for Power5 architecture.
|
|
|
|
@item -mpower6, -mpwr6
|
|
Generate code for Power6 architecture.
|
|
|
|
@item -mpower7, -mpwr7
|
|
Generate code for Power7 architecture.
|
|
|
|
@item -mcell
|
|
Generate code for Cell Broadband Engine architecture.
|
|
|
|
@item -mcom
|
|
Generate code Power/PowerPC common instructions.
|
|
|
|
@item -many
|
|
Generate code for any architecture (PWR/PWRX/PPC).
|
|
|
|
@item -mregnames
|
|
Allow symbolic names for registers.
|
|
|
|
@item -mno-regnames
|
|
Do not allow symbolic names for registers.
|
|
|
|
@item -mrelocatable
|
|
Support for GCC's -mrelocatable option.
|
|
|
|
@item -mrelocatable-lib
|
|
Support for GCC's -mrelocatable-lib option.
|
|
|
|
@item -memb
|
|
Set PPC_EMB bit in ELF flags.
|
|
|
|
@item -mlittle, -mlittle-endian, -le
|
|
Generate code for a little endian machine.
|
|
|
|
@item -mbig, -mbig-endian, -be
|
|
Generate code for a big endian machine.
|
|
|
|
@item -msolaris
|
|
Generate code for Solaris.
|
|
|
|
@item -mno-solaris
|
|
Do not generate code for Solaris.
|
|
|
|
@item -nops=@var{count}
|
|
If an alignment directive inserts more than @var{count} nops, put a
|
|
branch at the beginning to skip execution of the nops.
|
|
@end table
|
|
@c man end
|
|
|
|
|
|
@node PowerPC-Pseudo
|
|
@section PowerPC Assembler Directives
|
|
|
|
@cindex directives for PowerPC
|
|
@cindex PowerPC directives
|
|
A number of assembler directives are available for PowerPC. The
|
|
following table is far from complete.
|
|
|
|
@table @code
|
|
@item .machine "string"
|
|
This directive allows you to change the machine for which code is
|
|
generated. @code{"string"} may be any of the -m cpu selection options
|
|
(without the -m) enclosed in double quotes, @code{"push"}, or
|
|
@code{"pop"}. @code{.machine "push"} saves the currently selected
|
|
cpu, which may be restored with @code{.machine "pop"}.
|
|
@end table
|
|
|
|
@node PowerPC-Syntax
|
|
@section PowerPC Syntax
|
|
@menu
|
|
* PowerPC-Chars:: Special Characters
|
|
@end menu
|
|
|
|
@node PowerPC-Chars
|
|
@subsection Special Characters
|
|
|
|
@cindex line comment character, PowerPC
|
|
@cindex PowerPC line comment character
|
|
The presence of a @samp{#} on a line indicates the start of a comment
|
|
that extends to the end of the current line.
|
|
|
|
If a @samp{#} appears as the first character of a line then the whole
|
|
line is treated as a comment, but in this case the line could also be
|
|
a logical line number directive (@pxref{Comments}) or a preprocessor
|
|
control command (@pxref{Preprocessing}).
|
|
|
|
If the assembler has been configured for the ppc-*-solaris* target
|
|
then the @samp{!} character also acts as a line comment character.
|
|
This can be disabled via the @option{-mno-solaris} command line
|
|
option.
|
|
|
|
@cindex line separator, PowerPC
|
|
@cindex statement separator, PowerPC
|
|
@cindex PowerPC line separator
|
|
The @samp{;} character can be used to separate statements on the same
|
|
line.
|