Jaydeep Patil 1c37b30945 sim/riscv: fix JALR instruction simulation ... Fix 32bit 'jalr rd,ra,imm' integer instruction, where RD was written before using it to calculate destination address. This commit also improves testutils.inc for riscv; make use of pushsection and popsection when adding things to .data, and setup the %gp global pointer register within the 'start' macro. Approved-By: Andrew Burgess <aburgess@redhat.com>		2023-10-18 17:55:31 +01:00
..
aarch64	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
arm	sim: formally assume unistd.h always exists (via gnulib)	2023-01-16 04:35:48 -05:00
avr	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
bfin	Rename bfd_bread and bfd_bwrite	2023-08-09 08:48:09 +09:30
bpf	sim: bpf: remove negi, neg32i insns	2023-08-21 10:07:25 -07:00
common	Simplify definition of GUILE	2023-08-26 13:09:38 -06:00
cr16	sim: formally assume unistd.h always exists (via gnulib)	2023-01-16 04:35:48 -05:00
cris	Placate -Wmissing-declarations in sim/cris	2023-08-19 12:26:21 -06:00
d10v	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
erc32	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
example-synacor	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
frv	sim regen	2023-08-19 12:41:32 +09:30
ft32	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
h8300	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
igen	sim: igen: simplify build logic a little	2023-01-15 02:07:43 -05:00
iq2000	sim regen	2023-08-19 12:41:32 +09:30
lm32	sim regen	2023-08-19 12:41:32 +09:30
m4	sim --enable-cgen-maint	2023-08-19 12:41:32 +09:30
m32c	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
m32r	sim regen	2023-08-19 12:41:32 +09:30
m68hc11	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
mcore	[RFA] Fix for mcore simulator	2023-10-11 16:31:11 -06:00
microblaze	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
mips	sim: mips: fix printf string	2023-10-15 16:25:13 +05:45
mn10300	sim: mn10300: minimize mn10300-sim.h include in sim-main.h	2023-01-19 01:05:00 +01:00
moxie	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
msp430	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
or1k	sim regen	2023-08-19 12:41:32 +09:30
ppc	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
pru	sim: modules.c: fix generation after recent refactors	2023-01-15 20:55:48 -05:00
riscv	sim/riscv: fix JALR instruction simulation	2023-10-18 17:55:31 +01:00
rl78	Rename bfd_bread and bfd_bwrite	2023-08-09 08:48:09 +09:30
rx	Rename bfd_bread and bfd_bwrite	2023-08-09 08:48:09 +09:30
sh	sim: info: convert verbose field to a bool	2023-01-18 20:47:55 -05:00
testsuite	sim/riscv: fix JALR instruction simulation	2023-10-18 17:55:31 +01:00
v850	sim: v850: reduce extra header inclusion to igen files	2023-01-18 19:13:04 -05:00
.gitignore	sim: drop unused gentmap & nltvals.def logic	2021-11-28 13:24:00 -05:00
aclocal.m4	sim: smp: make option available again	2022-12-25 02:13:30 -05:00
arch-subdir.mk.in	sim: build: drop support for creating libsim.a in subdirs	2023-01-10 01:15:26 -05:00
ChangeLog-2021	sim: rename ChangeLog files to ChangeLog-2021	2021-08-17 20:27:36 -04:00
config.h.in	sim: build: stop probing system extensions (ourselves)	2023-01-16 04:22:10 -05:00
configure	sim --enable-cgen-maint	2023-08-19 12:41:32 +09:30
configure.ac	sim: igen: simplify build logic a little	2023-01-15 02:07:43 -05:00
COPYING	sim: clarify license text via COPYING file	2021-11-06 01:44:06 -04:00
gdbinit.in	sim: gdbinit: hoist setup to common code	2022-02-21 13:57:33 -05:00
MAINTAINERS	sim: Update mailing list address	2022-09-01 10:15:09 -04:00
Makefile.am	sim: igen: simplify build logic a little	2023-01-15 02:07:43 -05:00
Makefile.in	Simplify definition of GUILE	2023-08-26 13:09:38 -06:00
README-HACKING	sim: build: delete Make-common.in logic	2023-01-13 17:34:53 -05:00
semcrisv32f-switch.c	sim regen	2023-08-19 12:41:32 +09:30