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bfd/ChangeLog: * bfd-in.h (startswith): Add startswith function. (CONST_STRNEQ): Remove. * bfd-in2.h (startswith): Regenerate with make headers. * archive.c (bfd_slurp_armap): Replace usage of CONST_STRNEQ with startswith. (_bfd_slurp_extended_name_table): Likewise. * archive64.c (_bfd_archive_64_bit_slurp_armap): Likewise. * bfd.c (bfd_get_sign_extend_vma): Likewise. (bfd_convert_section_size): Likewise. (bfd_convert_section_contents): Likewise. * coff-stgo32.c (go32exe_create_stub): Likewise. (go32exe_check_format): Likewise. * coffcode.h (styp_to_sec_flags): Likewise. (GNU_DEBUGALTLINK): Likewise. * coffgen.c (_bfd_coff_section_already_linked): Likewise. (coff_gc_sweep): Likewise. (bfd_coff_gc_sections): Likewise. * cofflink.c (coff_link_add_symbols): Likewise. (process_embedded_commands): Likewise. * compress.c (bfd_is_section_compressed_with_header): Likewise. (bfd_init_section_decompress_status): Likewise. * dwarf2.c (find_debug_info): Likewise. (place_sections): Likewise. * ecoff.c (_bfd_ecoff_slurp_armap): Likewise. * elf-m10300.c (_bfd_mn10300_elf_size_dynamic_sections): Likewise. * elf.c (_bfd_elf_make_section_from_shdr): Likewise. (assign_section_numbers): Likewise. (elfcore_grok_win32pstatus): Likewise. * elf32-arm.c (cmse_scan): Likewise. (elf32_arm_gc_mark_extra_sections): Likewise. (elf32_arm_size_dynamic_sections): Likewise. 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(_bfd_generic_link_add_one_symbol): Likewise. * mmo.c (mmo_internal_write_section): Likewise. * osf-core.c (osf_core_core_file_p): Likewise. * pef.c (bfd_pef_print_symbol): Likewise. * pei-x86_64.c (pex64_print_all_pdata_sections): Likewise. * som.c (som_slurp_symbol_table): Likewise. (som_slurp_armap): Likewise. * wasm-module.c (wasm_compute_custom_section_file_position): Likewise. binutils/ChangeLog: * dlltool.c (scan_drectve_symbols): Replace usage of CONST_STRNEQ with startswith. * emul_aix.c (ar_emul_aix_parse_arg): Likewise. * objcopy.c (is_mergeable_note_section): Likewise. * objdump.c (dump_dwarf_section): Likewise. * prdbg.c (pr_method_type): Likewise. (pr_class_baseclass): Likewise. (tg_class_baseclass): Likewise. * readelf.c (process_lto_symbol_tables): Likewise. * stabs.c (ULLHIGH): Likewise. (parse_stab_argtypes): Likewise. (stab_demangle_function_name): Likewise. gas/ChangeLog: * config/tc-i386.c (md_parse_option): Replace usage of CONST_STRNEQ with startswith. (x86_64_section_word): Likewise. * config/tc-sparc.c (md_parse_option): Likewise. gdb/ChangeLog: * arm-tdep.c (show_disassembly_style_sfunc): Replace usage of CONST_STRNEQ with startswith. (_initialize_arm_tdep): Likewise. ld/ChangeLog: * emultempl/aix.em: Replace usage of CONST_STRNEQ with startswith. * emultempl/beos.em: Likewise. * emultempl/elf.em: Likewise. * emultempl/pe.em: Likewise. * emultempl/pep.em: Likewise. * emultempl/xtensaelf.em: Likewise. * ldctor.c (ctor_prio): Likewise. * ldelf.c (ldelf_try_needed): Likewise. (ldelf_parse_ld_so_conf): Likewise. (ldelf_after_open): Likewise. (output_rel_find): Likewise. (ldelf_place_orphan): Likewise. * ldfile.c (ldfile_add_library_path): Likewise. * ldlang.c (lang_add_input_file): Likewise. * ldmain.c (get_sysroot): Likewise. (get_emulation): Likewise. (add_archive_element): Likewise. * ldwrite.c (unsplittable_name): Likewise. (clone_section): Likewise. * lexsup.c (parse_args): Likewise. * pe-dll.c (is_import): Likewise. (pe_implied_import_dll): Likewise. opcodes/ChangeLog: * aarch64-dis.c (parse_aarch64_dis_option): Replace usage of CONST_STRNEQ with startswith. * arc-dis.c (parse_option): Likewise. * arm-dis.c (parse_arm_disassembler_options): Likewise. * cris-dis.c (print_with_operands): Likewise. * h8300-dis.c (bfd_h8_disassemble): Likewise. * i386-dis.c (print_insn): Likewise. * ia64-gen.c (fetch_insn_class): Likewise. (parse_resource_users): Likewise. (in_iclass): Likewise. (lookup_specifier): Likewise. (insert_opcode_dependencies): Likewise. * mips-dis.c (parse_mips_ase_option): Likewise. (parse_mips_dis_option): Likewise. * s390-dis.c (disassemble_init_s390): Likewise. * wasm32-dis.c (parse_wasm32_disassembler_options): Likewise.
433 lines
12 KiB
C
433 lines
12 KiB
C
/* s390-dis.c -- Disassemble S390 instructions
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Copyright (C) 2000-2021 Free Software Foundation, Inc.
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Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this file; see the file COPYING. If not, write to the
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Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include <stdio.h>
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#include "ansidecl.h"
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#include "disassemble.h"
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#include "opintl.h"
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#include "opcode/s390.h"
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#include "libiberty.h"
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static int opc_index[256];
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static int current_arch_mask = 0;
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static int option_use_insn_len_bits_p = 0;
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typedef struct
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{
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const char *name;
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const char *description;
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} s390_options_t;
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static const s390_options_t options[] =
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{
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{ "esa" , N_("Disassemble in ESA architecture mode") },
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{ "zarch", N_("Disassemble in z/Architecture mode") },
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{ "insnlength", N_("Print unknown instructions according to "
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"length from first two bits") }
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};
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/* Set up index table for first opcode byte. */
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void
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disassemble_init_s390 (struct disassemble_info *info)
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{
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int i;
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const char *p;
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memset (opc_index, 0, sizeof (opc_index));
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/* Reverse order, such that each opc_index ends up pointing to the
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first matching entry instead of the last. */
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for (i = s390_num_opcodes; i--; )
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opc_index[s390_opcodes[i].opcode[0]] = i;
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current_arch_mask = 1 << S390_OPCODE_ZARCH;
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option_use_insn_len_bits_p = 0;
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for (p = info->disassembler_options; p != NULL; )
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{
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if (startswith (p, "esa"))
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current_arch_mask = 1 << S390_OPCODE_ESA;
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else if (startswith (p, "zarch"))
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current_arch_mask = 1 << S390_OPCODE_ZARCH;
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else if (startswith (p, "insnlength"))
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option_use_insn_len_bits_p = 1;
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else
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/* xgettext:c-format */
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opcodes_error_handler (_("unknown S/390 disassembler option: %s"), p);
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p = strchr (p, ',');
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if (p != NULL)
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p++;
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}
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}
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/* Derive the length of an instruction from its first byte. */
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static inline int
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s390_insn_length (const bfd_byte *buffer)
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{
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/* 00xxxxxx -> 2, 01xxxxxx/10xxxxxx -> 4, 11xxxxxx -> 6. */
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return ((buffer[0] >> 6) + 3) & ~1U;
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}
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/* Match the instruction in BUFFER against the given OPCODE, excluding
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the first byte. */
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static inline int
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s390_insn_matches_opcode (const bfd_byte *buffer,
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const struct s390_opcode *opcode)
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{
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return (buffer[1] & opcode->mask[1]) == opcode->opcode[1]
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&& (buffer[2] & opcode->mask[2]) == opcode->opcode[2]
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&& (buffer[3] & opcode->mask[3]) == opcode->opcode[3]
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&& (buffer[4] & opcode->mask[4]) == opcode->opcode[4]
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&& (buffer[5] & opcode->mask[5]) == opcode->opcode[5];
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}
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union operand_value
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{
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int i;
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unsigned int u;
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};
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/* Extracts an operand value from an instruction. */
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/* We do not perform the shift operation for larl-type address
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operands here since that would lead to an overflow of the 32 bit
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integer value. Instead the shift operation is done when printing
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the operand. */
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static inline union operand_value
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s390_extract_operand (const bfd_byte *insn,
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const struct s390_operand *operand)
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{
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union operand_value ret;
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unsigned int val;
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int bits;
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const bfd_byte *orig_insn = insn;
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/* Extract fragments of the operand byte for byte. */
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insn += operand->shift / 8;
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bits = (operand->shift & 7) + operand->bits;
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val = 0;
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do
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{
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val <<= 8;
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val |= (unsigned int) *insn++;
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bits -= 8;
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}
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while (bits > 0);
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val >>= -bits;
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val &= ((1U << (operand->bits - 1)) << 1) - 1;
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/* Check for special long displacement case. */
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if (operand->bits == 20 && operand->shift == 20)
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val = (val & 0xff) << 12 | (val & 0xfff00) >> 8;
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/* Sign extend value if the operand is signed or pc relative. Avoid
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integer overflows. */
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if (operand->flags & (S390_OPERAND_SIGNED | S390_OPERAND_PCREL))
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{
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unsigned int m = 1U << (operand->bits - 1);
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if (val >= m)
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ret.i = (int) (val - m) - 1 - (int) (m - 1U);
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else
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ret.i = (int) val;
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}
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else if (operand->flags & S390_OPERAND_LENGTH)
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/* Length x in an instruction has real length x + 1. */
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ret.u = val + 1;
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else if (operand->flags & S390_OPERAND_VR)
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{
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/* Extract the extra bits for a vector register operand stored
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in the RXB field. */
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unsigned vr = operand->shift == 32 ? 3
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: (unsigned) operand->shift / 4 - 2;
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ret.u = val | ((orig_insn[4] & (1 << (3 - vr))) << (vr + 1));
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}
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else
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ret.u = val;
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return ret;
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}
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/* Print the S390 instruction in BUFFER, assuming that it matches the
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given OPCODE. */
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static void
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s390_print_insn_with_opcode (bfd_vma memaddr,
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struct disassemble_info *info,
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const bfd_byte *buffer,
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const struct s390_opcode *opcode)
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{
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const unsigned char *opindex;
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char separator;
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/* Mnemonic. */
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info->fprintf_func (info->stream, "%s", opcode->name);
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/* Operands. */
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separator = '\t';
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for (opindex = opcode->operands; *opindex != 0; opindex++)
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{
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const struct s390_operand *operand = s390_operands + *opindex;
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union operand_value val = s390_extract_operand (buffer, operand);
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unsigned long flags = operand->flags;
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if ((flags & S390_OPERAND_INDEX) && val.u == 0)
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continue;
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if ((flags & S390_OPERAND_BASE) &&
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val.u == 0 && separator == '(')
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{
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separator = ',';
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continue;
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}
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/* For instructions with a last optional operand don't print it
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if zero. */
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if ((opcode->flags & (S390_INSTR_FLAG_OPTPARM | S390_INSTR_FLAG_OPTPARM2))
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&& val.u == 0
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&& opindex[1] == 0)
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break;
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if ((opcode->flags & S390_INSTR_FLAG_OPTPARM2)
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&& val.u == 0 && opindex[1] != 0 && opindex[2] == 0)
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{
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union operand_value next_op_val =
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s390_extract_operand (buffer, s390_operands + opindex[1]);
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if (next_op_val.u == 0)
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break;
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}
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if (flags & S390_OPERAND_GPR)
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info->fprintf_func (info->stream, "%c%%r%u", separator, val.u);
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else if (flags & S390_OPERAND_FPR)
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info->fprintf_func (info->stream, "%c%%f%u", separator, val.u);
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else if (flags & S390_OPERAND_VR)
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info->fprintf_func (info->stream, "%c%%v%i", separator, val.u);
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else if (flags & S390_OPERAND_AR)
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info->fprintf_func (info->stream, "%c%%a%u", separator, val.u);
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else if (flags & S390_OPERAND_CR)
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info->fprintf_func (info->stream, "%c%%c%u", separator, val.u);
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else if (flags & S390_OPERAND_PCREL)
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{
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info->fprintf_func (info->stream, "%c", separator);
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info->print_address_func (memaddr + val.i + val.i, info);
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}
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else if (flags & S390_OPERAND_SIGNED)
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info->fprintf_func (info->stream, "%c%i", separator, val.i);
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else
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{
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if (flags & S390_OPERAND_OR1)
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val.u &= ~1;
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if (flags & S390_OPERAND_OR2)
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val.u &= ~2;
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if (flags & S390_OPERAND_OR8)
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val.u &= ~8;
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if ((opcode->flags & S390_INSTR_FLAG_OPTPARM)
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&& val.u == 0
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&& opindex[1] == 0)
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break;
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info->fprintf_func (info->stream, "%c%u", separator, val.u);
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}
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if (flags & S390_OPERAND_DISP)
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separator = '(';
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else if (flags & S390_OPERAND_BASE)
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{
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info->fprintf_func (info->stream, ")");
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separator = ',';
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}
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else
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separator = ',';
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}
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}
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/* Check whether opcode A's mask is more specific than that of B. */
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static int
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opcode_mask_more_specific (const struct s390_opcode *a,
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const struct s390_opcode *b)
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{
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return (((int) a->mask[0] + a->mask[1] + a->mask[2]
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+ a->mask[3] + a->mask[4] + a->mask[5])
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> ((int) b->mask[0] + b->mask[1] + b->mask[2]
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+ b->mask[3] + b->mask[4] + b->mask[5]));
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}
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/* Print a S390 instruction. */
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int
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print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)
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{
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bfd_byte buffer[6];
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const struct s390_opcode *opcode = NULL;
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unsigned int value;
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int status, opsize, bufsize, bytes_to_dump, i;
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/* The output looks better if we put 6 bytes on a line. */
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info->bytes_per_line = 6;
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/* Every S390 instruction is max 6 bytes long. */
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memset (buffer, 0, 6);
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status = info->read_memory_func (memaddr, buffer, 6, info);
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if (status != 0)
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{
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for (bufsize = 0; bufsize < 6; bufsize++)
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if (info->read_memory_func (memaddr, buffer, bufsize + 1, info) != 0)
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break;
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if (bufsize <= 0)
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{
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info->memory_error_func (status, memaddr, info);
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return -1;
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}
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opsize = s390_insn_length (buffer);
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status = opsize > bufsize;
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}
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else
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{
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bufsize = 6;
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opsize = s390_insn_length (buffer);
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}
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if (status == 0)
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{
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const struct s390_opcode *op;
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/* Find the "best match" in the opcode table. */
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for (op = s390_opcodes + opc_index[buffer[0]];
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op != s390_opcodes + s390_num_opcodes
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&& op->opcode[0] == buffer[0];
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op++)
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{
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if ((op->modes & current_arch_mask)
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&& s390_insn_matches_opcode (buffer, op)
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&& (opcode == NULL
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|| opcode_mask_more_specific (op, opcode)))
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opcode = op;
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}
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if (opcode != NULL)
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{
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/* The instruction is valid. Print it and return its size. */
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s390_print_insn_with_opcode (memaddr, info, buffer, opcode);
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return opsize;
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|
}
|
|
}
|
|
|
|
/* For code sections it makes sense to skip unknown instructions
|
|
according to their length bits. */
|
|
if (status == 0
|
|
&& option_use_insn_len_bits_p
|
|
&& info->section != NULL
|
|
&& (info->section->flags & SEC_CODE))
|
|
bytes_to_dump = opsize;
|
|
else
|
|
/* By default unknown instructions are printed as .long's/.short'
|
|
depending on how many bytes are available. */
|
|
bytes_to_dump = bufsize >= 4 ? 4 : bufsize;
|
|
|
|
if (bytes_to_dump == 0)
|
|
return 0;
|
|
|
|
/* Fall back to hex print. */
|
|
switch (bytes_to_dump)
|
|
{
|
|
case 4:
|
|
value = (unsigned int) buffer[0];
|
|
value = (value << 8) + (unsigned int) buffer[1];
|
|
value = (value << 8) + (unsigned int) buffer[2];
|
|
value = (value << 8) + (unsigned int) buffer[3];
|
|
info->fprintf_func (info->stream, ".long\t0x%08x", value);
|
|
return 4;
|
|
case 2:
|
|
value = (unsigned int) buffer[0];
|
|
value = (value << 8) + (unsigned int) buffer[1];
|
|
info->fprintf_func (info->stream, ".short\t0x%04x", value);
|
|
return 2;
|
|
default:
|
|
info->fprintf_func (info->stream, ".byte\t0x%02x",
|
|
(unsigned int) buffer[0]);
|
|
for (i = 1; i < bytes_to_dump; i++)
|
|
info->fprintf_func (info->stream, ",0x%02x",
|
|
(unsigned int) buffer[i]);
|
|
return bytes_to_dump;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
const disasm_options_and_args_t *
|
|
disassembler_options_s390 (void)
|
|
{
|
|
static disasm_options_and_args_t *opts_and_args;
|
|
|
|
if (opts_and_args == NULL)
|
|
{
|
|
size_t i, num_options = ARRAY_SIZE (options);
|
|
disasm_options_t *opts;
|
|
|
|
opts_and_args = XNEW (disasm_options_and_args_t);
|
|
opts_and_args->args = NULL;
|
|
|
|
opts = &opts_and_args->options;
|
|
opts->name = XNEWVEC (const char *, num_options + 1);
|
|
opts->description = XNEWVEC (const char *, num_options + 1);
|
|
opts->arg = NULL;
|
|
for (i = 0; i < num_options; i++)
|
|
{
|
|
opts->name[i] = options[i].name;
|
|
opts->description[i] = _(options[i].description);
|
|
}
|
|
/* The array we return must be NULL terminated. */
|
|
opts->name[i] = NULL;
|
|
opts->description[i] = NULL;
|
|
}
|
|
|
|
return opts_and_args;
|
|
}
|
|
|
|
void
|
|
print_s390_disassembler_options (FILE *stream)
|
|
{
|
|
unsigned int i, max_len = 0;
|
|
fprintf (stream, _("\n\
|
|
The following S/390 specific disassembler options are supported for use\n\
|
|
with the -M switch (multiple options should be separated by commas):\n"));
|
|
|
|
for (i = 0; i < ARRAY_SIZE (options); i++)
|
|
{
|
|
unsigned int len = strlen (options[i].name);
|
|
if (max_len < len)
|
|
max_len = len;
|
|
}
|
|
|
|
for (i = 0, max_len++; i < ARRAY_SIZE (options); i++)
|
|
fprintf (stream, " %s%*c %s\n",
|
|
options[i].name,
|
|
(int)(max_len - strlen (options[i].name)), ' ',
|
|
_(options[i].description));
|
|
}
|