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0963b4bd45
* ada-lang.c: Comment cleanup, mostly periods and spaces. * ada-lang.h: Ditto. * ada-tasks.c: Ditto. * ada-valprint.c: Ditto. * aix-threads.c: Ditto. * alpha-linux-nat.c: Ditto. * alpha-linux-tdep.c: Ditto. * alpha-mdebug-tdep.c: Ditto. * alpha-nat.c: Ditto. * alpha-osf1-tdep.c: Ditto. * alpha-tdep.c: Ditto. * alphabsd-nat.c: Ditto. * alphabsd-tdep.c: Ditto. * amd64-darwin-tdep.c: Ditto. * amd64-linux-nat.c: Ditto. * amd64-linux-tdep.c: Ditto. * amd64-sol2-tdep.c: Ditto. * amd64-tdep.c: Ditto. * amd64-fbsd-tdep.c: Ditto. * amd64-nbsd-tdep.c: Ditto. * amd64-obsd-tdep.c: Ditto. * amd64-linux-nat.c: Ditto. * amd64-linux-tdep.c: Ditto. * arm-tdep.c: Ditto. * arm-tdep.h: Ditto. * armnbsd-nat.c: Ditto. * avr-tdep.c: Ditto. * bfin-tdep.c: Ditto. * bsd-kvm.c: Ditto. * c-typeprintc: Ditto. * c-valprint.c: Ditto. * coff-pe-read.h: Ditto. * coffreead.c: Ditto. * cris-tdep.c: Ditto. * d-lang.c: Ditto. * darwin-nat-info.c: Ditto. * darwin-nat.c: Ditto. * dbug-rom.c: Ditto. * dbxread.c: Ditto. * dcache.c: Ditto. * dcache.h: Ditto. * dec-thread.c: Ditto. * defs.h: Ditto. * demangle.c: Ditto. * dicos-tdep.c: Ditto. * dictionary.c: Ditto. * dictionary.h: Ditto. * dink32-rom.c: Ditto. * disasm.c: Ditto. * doublest.c: Ditto. * dsrec.c: Ditto. * dummy-frame.c: Ditto. * dwarf2-frame.c: Ditto. * dwarf2expr.c: Ditto. * dwarf2loc.c: Ditto. * dwarf2read.c: Ditto. * elfread.c: Ditto. * environ.c: Ditto. * eval.c: Ditto. * event-top.h: Ditto. * exceptions.c: Ditto. * exceptions.h: Ditto. * exec.c: Ditto. * expprint.c: Ditto. * expression.h: Ditto. * f-exp.y: Ditto. * f-lang.c: Ditto. * f-lang.h: Ditto. * f-typeprint.c: Ditto. * f-valprint.c: Ditto. * fbsd-nat.c: Ditto. * findvar.c: Ditto. * fork-child.c: Ditto. * frame.c: Ditto. * frame.h: Ditto. * frv-linux-tdep.c: Ditto. * frv-tdep.c: Ditto. * gcore.c: Ditto. * gdb-stabs.h: Ditto. * gdb_assert.h: Ditto. * gdb_string.h: Ditto. * gdb_thread_db.h: Ditto. * gdb_wait.h: Ditto. * gdbarch.sh: Ditto. * gdbcore.h: Ditto. * gdbthread.h: Ditto. * gdbtypes.c: Ditto. * gdbtypes.h: Ditto. * gnu-nat.c: Ditto. * gnu-nat.h: Ditto. * gnu-v2-abi.c: Ditto. * gnu-v3-abi.c: Ditto. * go32-nat.c: Ditto. * gdbarch.c: Regenerate. * gdbarch.h: Regenerate.
505 lines
12 KiB
C
505 lines
12 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002, 2004, 2007,
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2008, 2009, 2010, 2011 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include "gdb_string.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "arm-tdep.h"
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#include "inf-ptrace.h"
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extern int arm_apcs_32;
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static void
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arm_supply_gregset (struct regcache *regcache, struct reg *gregset)
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{
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int regno;
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CORE_ADDR r_pc;
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/* Integer registers. */
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_supply (regcache, regno, (char *) &gregset->r[regno]);
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &gregset->r_sp);
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &gregset->r_lr);
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/* This is ok: we're running native... */
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r_pc = gdbarch_addr_bits_remove (get_regcache_arch (regcache), gregset->r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc);
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_pc);
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}
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static void
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arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset)
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{
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_raw_supply (regcache, regno,
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(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &fparegset->fpr_fpsr);
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}
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static void
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fetch_register (struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general register"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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/* This is ok: we're running native... */
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(get_regcache_arch (regcache),
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inferior_registers.r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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}
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static void
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fetch_regs (struct regcache *regcache)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_gregset (regcache, &inferior_registers);
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}
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static void
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fetch_fp_register (struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point register"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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}
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static void
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fetch_fp_regs (struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_fparegset (regcache, &inferior_fp_registers);
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}
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static void
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armnbsd_fetch_registers (struct target_ops *ops,
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struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regcache, regno);
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else
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fetch_fp_register (regcache, regno);
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}
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else
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{
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fetch_regs (regcache);
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fetch_fp_regs (regcache);
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}
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}
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static void
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store_register (const struct regcache *regcache, int regno)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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inferior_registers.r_pc ^= gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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struct reg inferior_registers;
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to store general registers"));
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}
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static void
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store_fp_register (const struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point registers"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_raw_collect (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_fp_regs (const struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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regcache_raw_collect (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to store floating-point registers"));
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}
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static void
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armnbsd_store_registers (struct target_ops *ops,
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struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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store_register (regcache, regno);
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else
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store_fp_register (regcache, regno);
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}
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else
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{
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store_regs (regcache);
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store_fp_regs (regcache);
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}
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}
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struct md_core
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{
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struct reg intreg;
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struct fpreg freg;
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};
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static void
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fetch_core_registers (struct regcache *regcache,
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char *core_reg_sect, unsigned core_reg_size,
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int which, CORE_ADDR ignore)
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{
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struct md_core *core_reg = (struct md_core *) core_reg_sect;
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int regno;
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CORE_ADDR r_pc;
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arm_supply_gregset (regcache, &core_reg->intreg);
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arm_supply_fparegset (regcache, &core_reg->freg);
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}
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static void
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fetch_elfcore_registers (struct regcache *regcache,
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char *core_reg_sect, unsigned core_reg_size,
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int which, CORE_ADDR ignore)
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{
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struct reg gregset;
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struct fpreg fparegset;
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switch (which)
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{
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case 0: /* Integer registers. */
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if (core_reg_size != sizeof (struct reg))
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warning (_("wrong size of register set in core file"));
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else
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{
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/* The memcpy may be unnecessary, but we can't really be sure
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of the alignment of the data in the core file. */
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memcpy (&gregset, core_reg_sect, sizeof (gregset));
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arm_supply_gregset (regcache, &gregset);
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}
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break;
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case 2:
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if (core_reg_size != sizeof (struct fpreg))
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warning (_("wrong size of FPA register set in core file"));
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|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
|
|
arm_supply_fparegset (regcache, &fparegset);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
/* Don't know what kind of register request this is; just ignore it. */
|
|
break;
|
|
}
|
|
}
|
|
|
|
static struct core_fns arm_netbsd_core_fns =
|
|
{
|
|
bfd_target_unknown_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_core_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
static struct core_fns arm_netbsd_elfcore_fns =
|
|
{
|
|
bfd_target_elf_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_elfcore_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
void
|
|
_initialize_arm_netbsd_nat (void)
|
|
{
|
|
struct target_ops *t;
|
|
|
|
t = inf_ptrace_target ();
|
|
t->to_fetch_registers = armnbsd_fetch_registers;
|
|
t->to_store_registers = armnbsd_store_registers;
|
|
add_target (t);
|
|
|
|
deprecated_add_core_fns (&arm_netbsd_core_fns);
|
|
deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
|
|
}
|