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d87bef3a7b
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
502 lines
15 KiB
C
502 lines
15 KiB
C
/* Print VAX instructions.
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Copyright (C) 1995-2023 Free Software Foundation, Inc.
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Contributed by Pauline Middelink <middelin@polyware.iaf.nl>
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include <setjmp.h>
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#include <string.h>
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#include "opcode/vax.h"
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#include "disassemble.h"
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static char *reg_names[] =
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{
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "ap", "fp", "sp", "pc"
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};
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/* Definitions for the function entry mask bits. */
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static char *entry_mask_bit[] =
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{
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/* Registers 0 and 1 shall not be saved, since they're used to pass back
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a function's result to its caller... */
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"~r0~", "~r1~",
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/* Registers 2 .. 11 are normal registers. */
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"r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11",
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/* Registers 12 and 13 are argument and frame pointer and must not
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be saved by using the entry mask. */
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"~ap~", "~fp~",
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/* Bits 14 and 15 control integer and decimal overflow. */
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"IntOvfl", "DecOvfl",
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};
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/* Sign-extend an (unsigned char). */
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#define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
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/* Get a 1 byte signed integer. */
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#define NEXTBYTE(p) \
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(p += 1, FETCH_DATA (info, p), \
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COERCE_SIGNED_CHAR(p[-1]))
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/* Get a 2 byte signed integer. */
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#define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000))
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#define NEXTWORD(p) \
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(p += 2, FETCH_DATA (info, p), \
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COERCE16 ((p[-1] << 8) + p[-2]))
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/* Get a 4 byte signed integer. */
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#define COERCE32(x) ((int) (((x) ^ 0x80000000) - 0x80000000))
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#define NEXTLONG(p) \
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(p += 4, FETCH_DATA (info, p), \
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(COERCE32 (((((((unsigned) p[-1] << 8) + p[-2]) << 8) + p[-3]) << 8) + p[-4])))
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/* Maximum length of an instruction. */
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#define MAXLEN 25
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struct private
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{
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/* Points to first byte not fetched. */
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bfd_byte * max_fetched;
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bfd_byte the_buffer[MAXLEN];
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bfd_vma insn_start;
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OPCODES_SIGJMP_BUF bailout;
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};
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/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
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to ADDR (exclusive) are valid. Returns 1 for success, longjmps
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on error. */
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#define FETCH_DATA(info, addr) \
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((addr) <= ((struct private *)(info->private_data))->max_fetched \
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? 1 : fetch_data ((info), (addr)))
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static int
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fetch_data (struct disassemble_info *info, bfd_byte *addr)
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{
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int status;
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struct private *priv = (struct private *) info->private_data;
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bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
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status = (*info->read_memory_func) (start,
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priv->max_fetched,
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addr - priv->max_fetched,
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info);
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if (status != 0)
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{
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(*info->memory_error_func) (status, start, info);
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OPCODES_SIGLONGJMP (priv->bailout, 1);
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}
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else
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priv->max_fetched = addr;
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return 1;
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}
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/* Entry mask handling. */
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static unsigned int entry_addr_occupied_slots = 0;
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static unsigned int entry_addr_total_slots = 0;
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static bfd_vma * entry_addr = NULL;
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/* Parse the VAX specific disassembler options. These contain function
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entry addresses, which can be useful to disassemble ROM images, since
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there's no symbol table. Returns TRUE upon success, FALSE otherwise. */
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static bool
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parse_disassembler_options (const char *options)
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{
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const char * entry_switch = "entry:";
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while ((options = strstr (options, entry_switch)))
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{
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options += strlen (entry_switch);
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/* The greater-than part of the test below is paranoia. */
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if (entry_addr_occupied_slots >= entry_addr_total_slots)
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{
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/* A guesstimate of the number of entries we will have to create. */
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entry_addr_total_slots
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+= 1 + strlen (options) / (strlen (entry_switch) + 5);
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entry_addr = realloc (entry_addr, sizeof (bfd_vma)
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* entry_addr_total_slots);
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}
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if (entry_addr == NULL)
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return false;
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entry_addr[entry_addr_occupied_slots] = bfd_scan_vma (options, NULL, 0);
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entry_addr_occupied_slots ++;
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}
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return true;
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}
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#if 0 /* FIXME: Ideally the disassembler should have target specific
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initialisation and termination function pointers. Then
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parse_disassembler_options could be the init function and
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free_entry_array (below) could be the termination routine.
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Until then there is no way for the disassembler to tell us
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that it has finished and that we no longer need the entry
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array, so this routine is suppressed for now. It does mean
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that we leak memory, but only to the extent that we do not
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free it just before the disassembler is about to terminate
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anyway. */
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/* Free memory allocated to our entry array. */
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static void
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free_entry_array (void)
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{
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if (entry_addr)
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{
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free (entry_addr);
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entry_addr = NULL;
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entry_addr_occupied_slots = entry_addr_total_slots = 0;
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}
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}
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#endif
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/* Check if the given address is a known function entry point. This is
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the case if there is a symbol of the function type at this address.
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We also check for synthetic symbols as these are used for PLT entries
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(weak undefined symbols may not have the function type set). Finally
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the address may have been forced to be treated as an entry point. The
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latter helps in disassembling ROM images, because there's no symbol
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table at all. Forced entry points can be given by supplying several
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-M options to objdump: -M entry:0xffbb7730. */
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static bool
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is_function_entry (struct disassemble_info *info, bfd_vma addr)
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{
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unsigned int i;
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/* Check if there's a function or PLT symbol at our address. */
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if (info->symbols
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&& info->symbols[0]
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&& (info->symbols[0]->flags & (BSF_FUNCTION | BSF_SYNTHETIC))
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&& addr == bfd_asymbol_value (info->symbols[0]))
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return true;
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/* Check for forced function entry address. */
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for (i = entry_addr_occupied_slots; i--;)
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if (entry_addr[i] == addr)
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return true;
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return false;
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}
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/* Check if the given address is the last longword of a PLT entry.
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This longword is data and depending on the value it may interfere
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with disassembly of further PLT entries. We make use of the fact
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PLT symbols are marked BSF_SYNTHETIC. */
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static bool
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is_plt_tail (struct disassemble_info *info, bfd_vma addr)
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{
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if (info->symbols
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&& info->symbols[0]
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&& (info->symbols[0]->flags & BSF_SYNTHETIC)
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&& addr == bfd_asymbol_value (info->symbols[0]) + 8)
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return true;
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return false;
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}
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static int
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print_insn_mode (const char *d,
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int size,
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unsigned char *p0,
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bfd_vma addr, /* PC for this arg to be relative to. */
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disassemble_info *info)
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{
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unsigned char *p = p0;
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unsigned char mode, reg;
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/* Fetch and interpret mode byte. */
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mode = (unsigned char) NEXTBYTE (p);
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reg = mode & 0xF;
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switch (mode & 0xF0)
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{
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case 0x00:
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case 0x10:
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case 0x20:
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case 0x30: /* Literal mode $number. */
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if (d[1] == 'd' || d[1] == 'f' || d[1] == 'g' || d[1] == 'h')
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(*info->fprintf_func) (info->stream, "$0x%x [%c-float]", mode, d[1]);
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else
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(*info->fprintf_func) (info->stream, "$0x%x", mode);
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break;
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case 0x40: /* Index: base-addr[Rn] */
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{
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unsigned char *q = p0 + 1;
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unsigned char nextmode = NEXTBYTE (q);
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if (nextmode < 0x60 || nextmode == 0x8f)
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/* Literal, index, register, or immediate is invalid. In
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particular don't recurse into another index mode which
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might overflow the_buffer. */
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(*info->fprintf_func) (info->stream, "[invalid base]");
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else
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p += print_insn_mode (d, size, p0 + 1, addr + 1, info);
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(*info->fprintf_func) (info->stream, "[%s]", reg_names[reg]);
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}
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break;
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case 0x50: /* Register: Rn */
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(*info->fprintf_func) (info->stream, "%s", reg_names[reg]);
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break;
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case 0x60: /* Register deferred: (Rn) */
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(*info->fprintf_func) (info->stream, "(%s)", reg_names[reg]);
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break;
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case 0x70: /* Autodecrement: -(Rn) */
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(*info->fprintf_func) (info->stream, "-(%s)", reg_names[reg]);
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break;
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case 0x80: /* Autoincrement: (Rn)+ */
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if (reg == 0xF)
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{ /* Immediate? */
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int i;
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FETCH_DATA (info, p + size);
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(*info->fprintf_func) (info->stream, "$0x");
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if (d[1] == 'd' || d[1] == 'f' || d[1] == 'g' || d[1] == 'h')
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{
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int float_word;
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float_word = p[0] | (p[1] << 8);
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if ((d[1] == 'd' || d[1] == 'f')
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&& (float_word & 0xff80) == 0x8000)
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{
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(*info->fprintf_func) (info->stream, "[invalid %c-float]",
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d[1]);
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}
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else
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{
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for (i = 0; i < size; i++)
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(*info->fprintf_func) (info->stream, "%02x",
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p[size - i - 1]);
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(*info->fprintf_func) (info->stream, " [%c-float]", d[1]);
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}
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}
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else
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{
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for (i = 0; i < size; i++)
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(*info->fprintf_func) (info->stream, "%02x", p[size - i - 1]);
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}
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p += size;
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}
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else
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(*info->fprintf_func) (info->stream, "(%s)+", reg_names[reg]);
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break;
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case 0x90: /* Autoincrement deferred: @(Rn)+ */
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if (reg == 0xF)
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(*info->fprintf_func) (info->stream, "*0x%x", NEXTLONG (p));
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else
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(*info->fprintf_func) (info->stream, "@(%s)+", reg_names[reg]);
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break;
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case 0xB0: /* Displacement byte deferred: *displ(Rn). */
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(*info->fprintf_func) (info->stream, "*");
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/* Fall through. */
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case 0xA0: /* Displacement byte: displ(Rn). */
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if (reg == 0xF)
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(*info->print_address_func) (addr + 2 + NEXTBYTE (p), info);
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else
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(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTBYTE (p),
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reg_names[reg]);
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break;
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case 0xD0: /* Displacement word deferred: *displ(Rn). */
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(*info->fprintf_func) (info->stream, "*");
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/* Fall through. */
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case 0xC0: /* Displacement word: displ(Rn). */
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if (reg == 0xF)
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(*info->print_address_func) (addr + 3 + NEXTWORD (p), info);
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else
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(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTWORD (p),
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reg_names[reg]);
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break;
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case 0xF0: /* Displacement long deferred: *displ(Rn). */
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(*info->fprintf_func) (info->stream, "*");
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/* Fall through. */
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case 0xE0: /* Displacement long: displ(Rn). */
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if (reg == 0xF)
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(*info->print_address_func) (addr + 5 + NEXTLONG (p), info);
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else
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(*info->fprintf_func) (info->stream, "0x%x(%s)", NEXTLONG (p),
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reg_names[reg]);
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break;
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}
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return p - p0;
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}
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/* Returns number of bytes "eaten" by the operand, or return -1 if an
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invalid operand was found, or -2 if an opcode tabel error was
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found. */
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static int
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print_insn_arg (const char *d,
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unsigned char *p0,
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bfd_vma addr, /* PC for this arg to be relative to. */
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disassemble_info *info)
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{
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int arg_len;
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/* Check validity of addressing length. */
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switch (d[1])
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{
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case 'b' : arg_len = 1; break;
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case 'd' : arg_len = 8; break;
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case 'f' : arg_len = 4; break;
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case 'g' : arg_len = 8; break;
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case 'h' : arg_len = 16; break;
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case 'l' : arg_len = 4; break;
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case 'o' : arg_len = 16; break;
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case 'w' : arg_len = 2; break;
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case 'q' : arg_len = 8; break;
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default : abort ();
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}
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/* Branches have no mode byte. */
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if (d[0] == 'b')
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{
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unsigned char *p = p0;
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if (arg_len == 1)
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(*info->print_address_func) (addr + 1 + NEXTBYTE (p), info);
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else
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(*info->print_address_func) (addr + 2 + NEXTWORD (p), info);
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return p - p0;
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}
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return print_insn_mode (d, arg_len, p0, addr, info);
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}
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/* Print the vax instruction at address MEMADDR in debugged memory,
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on INFO->STREAM. Returns length of the instruction, in bytes. */
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int
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print_insn_vax (bfd_vma memaddr, disassemble_info *info)
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{
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static bool parsed_disassembler_options = false;
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const struct vot *votp;
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const char *argp;
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unsigned char *arg;
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struct private priv;
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bfd_byte *buffer = priv.the_buffer;
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info->private_data = & priv;
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priv.max_fetched = priv.the_buffer;
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priv.insn_start = memaddr;
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if (! parsed_disassembler_options
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&& info->disassembler_options != NULL)
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{
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parse_disassembler_options (info->disassembler_options);
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/* To avoid repeated parsing of these options. */
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parsed_disassembler_options = true;
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}
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if (OPCODES_SIGSETJMP (priv.bailout) != 0)
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/* Error return. */
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return -1;
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argp = NULL;
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/* Check if the info buffer has more than one byte left since
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the last opcode might be a single byte with no argument data. */
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if (info->buffer_length - (memaddr - info->buffer_vma) > 1
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&& (info->stop_vma == 0 || memaddr < (info->stop_vma - 1)))
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{
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FETCH_DATA (info, buffer + 2);
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}
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else
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{
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FETCH_DATA (info, buffer + 1);
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buffer[1] = 0;
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}
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/* Decode function entry mask. */
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if (is_function_entry (info, memaddr))
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{
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int i = 0;
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int register_mask = buffer[1] << 8 | buffer[0];
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(*info->fprintf_func) (info->stream, ".word 0x%04x # Entry mask: <",
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register_mask);
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for (i = 15; i >= 0; i--)
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if (register_mask & (1 << i))
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(*info->fprintf_func) (info->stream, " %s", entry_mask_bit[i]);
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(*info->fprintf_func) (info->stream, " >");
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return 2;
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}
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/* Decode PLT entry offset longword. */
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if (is_plt_tail (info, memaddr))
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{
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int offset;
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FETCH_DATA (info, buffer + 4);
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offset = ((unsigned) buffer[3] << 24 | buffer[2] << 16
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| buffer[1] << 8 | buffer[0]);
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(*info->fprintf_func) (info->stream, ".long 0x%08x", offset);
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return 4;
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}
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for (votp = &votstrs[0]; votp->name[0]; votp++)
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{
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vax_opcodeT opcode = votp->detail.code;
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/* 2 byte codes match 2 buffer pos. */
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if ((bfd_byte) opcode == buffer[0]
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&& (opcode >> 8 == 0 || opcode >> 8 == buffer[1]))
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{
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argp = votp->detail.args;
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break;
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}
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}
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if (argp == NULL)
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{
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/* Handle undefined instructions. */
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(*info->fprintf_func) (info->stream, ".word 0x%x",
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(buffer[0] << 8) + buffer[1]);
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return 2;
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}
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/* Point at first byte of argument data, and at descriptor for first
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argument. */
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arg = buffer + ((votp->detail.code >> 8) ? 2 : 1);
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/* Make sure we have it in mem */
|
|
FETCH_DATA (info, arg);
|
|
|
|
(*info->fprintf_func) (info->stream, "%s", votp->name);
|
|
if (*argp)
|
|
(*info->fprintf_func) (info->stream, " ");
|
|
|
|
while (*argp)
|
|
{
|
|
arg += print_insn_arg (argp, arg, memaddr + (arg - buffer), info);
|
|
argp += 2;
|
|
if (*argp)
|
|
(*info->fprintf_func) (info->stream, ",");
|
|
}
|
|
|
|
return arg - buffer;
|
|
}
|
|
|