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f2ea0907de
numbers to enumeration values. * sh-tdep.c: Accomodate above change. (SH_NUM_REGS): Rename from SH_DEFAULT_NUM_REGS. (NUM_PSEUDO_REGS_SH_MEDIA): Remove (sh5 only). (NUM_PSEUDO_REGS_SH_COMPACT): Remove (sh5 only). (IS_ADD_IMM_SP): Rename from IS_ADD_SP. (IS_FPUSH): Rename from IS_FMOV. (sh_extract_struct_value_address): Remove useless comment. (sh_dsp_register_sim_regno): Use register values from sh-tdep.h instead of own local values. (sh_dump_tdep): Remove. (_initialize_sh_tdep): Accomodate removing sh_dump_tdep. * sh3-rom.c (sh3_supply_register): Accomodate sh-tdep.h changes.
78 lines
2.1 KiB
C
78 lines
2.1 KiB
C
/* Target-specific definition for a Hitachi Super-H.
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Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
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Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef SH_TDEP_H
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#define SH_TDEP_H
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/* Contributed by Steve Chamberlain sac@cygnus.com */
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/* Registers for all SH variants. Used also by sh3-rom.c. */
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enum
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{
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R0_REGNUM = 0,
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STRUCT_RETURN_REGNUM = 2,
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ARG0_REGNUM = 4,
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ARGLAST_REGNUM = 7,
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FP_REGNUM = 14,
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PR_REGNUM = 17,
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GBR_REGNUM = 18,
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VBR_REGNUM = 19,
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MACH_REGNUM = 20,
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MACL_REGNUM = 21,
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SR_REGNUM = 22,
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FPUL_REGNUM = 23,
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/* Floating point registers */
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FPSCR_REGNUM = 24,
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FLOAT_ARG0_REGNUM = 29,
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FLOAT_ARGLAST_REGNUM = 36,
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FP_LAST_REGNUM = 40,
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/* sh3,sh4 registers */
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SSR_REGNUM = 41,
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SPC_REGNUM = 42,
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/* DSP registers */
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DSR_REGNUM = 24,
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A0G_REGNUM = 25,
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A0_REGNUM = 26,
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A1G_REGNUM = 27,
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A1_REGNUM = 28,
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M0_REGNUM = 29,
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M1_REGNUM = 30,
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X0_REGNUM = 31,
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X1_REGNUM = 32,
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Y0_REGNUM = 33,
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Y1_REGNUM = 34,
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MOD_REGNUM = 40,
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RS_REGNUM = 43,
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RE_REGNUM = 44,
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R0_BANK_REGNUM = 51,
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R7_BANK_REGNUM = 58,
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/* Floating point pseudo registers */
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DR0_REGNUM = 59,
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DR_LAST_REGNUM = 66,
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FV0_REGNUM = 67,
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FV_LAST_REGNUM = 70
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};
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extern gdbarch_init_ftype sh64_gdbarch_init;
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extern void sh64_show_regs (void);
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#endif /* SH_TDEP_H */
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