mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-18 06:43:36 +08:00
ea3352172e
The current implementation of the fcc register is referenced to the
user_fp_state structure of the kernel uapi [1].
struct user_fp_state {
uint64_t fpr[32];
uint64_t fcc;
uint32_t fcsr;
};
But it is mistakenly defined as a 64-bit fputype register, resulting
in a confusing output of "info register".
(gdb) info register
...
fcc {f = 0x0, d = 0x0} {f = 0, d = 0}
...
According to "Condition Flag Register" in "LoongArch Reference Manual"
[2], there are 8 condition flag registers of size 1. Use 8 registers of
uint8 to make it easier for users to view the fcc register groups.
(gdb) info register
...
fcc0 0x1 1
fcc1 0x0 0
fcc2 0x0 0
fcc3 0x0 0
fcc4 0x0 0
fcc5 0x0 0
fcc6 0x0 0
fcc7 0x0 0
...
[1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/loongarch/include/uapi/asm/ptrace.h
[2] https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#_condition_flag_register
Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn>
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
63 lines
3.6 KiB
C
63 lines
3.6 KiB
C
/* THIS FILE IS GENERATED. -*- buffer-read-only: t -*- vi:set ro:
|
|
Original: fpu.xml */
|
|
|
|
#include "gdbsupport/tdesc.h"
|
|
|
|
static int
|
|
create_feature_loongarch_fpu (struct target_desc *result, long regnum)
|
|
{
|
|
struct tdesc_feature *feature;
|
|
|
|
feature = tdesc_create_feature (result, "org.gnu.gdb.loongarch.fpu");
|
|
tdesc_type_with_fields *type_with_fields;
|
|
type_with_fields = tdesc_create_union (feature, "fputype");
|
|
tdesc_type *field_type;
|
|
field_type = tdesc_named_type (feature, "ieee_single");
|
|
tdesc_add_field (type_with_fields, "f", field_type);
|
|
field_type = tdesc_named_type (feature, "ieee_double");
|
|
tdesc_add_field (type_with_fields, "d", field_type);
|
|
|
|
tdesc_create_reg (feature, "f0", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f1", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f2", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f3", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f4", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f5", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f6", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f7", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f8", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f9", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f10", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f11", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f12", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f13", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f14", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f15", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f16", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f17", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f18", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f19", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f20", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f21", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f22", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f23", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f24", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f25", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f26", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f27", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f28", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f29", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f30", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "f31", regnum++, 1, "float", 64, "fputype");
|
|
tdesc_create_reg (feature, "fcc0", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcc1", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcc2", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcc3", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcc4", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcc5", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcc6", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcc7", regnum++, 1, "float", 8, "uint8");
|
|
tdesc_create_reg (feature, "fcsr", regnum++, 1, "float", 32, "uint32");
|
|
return regnum;
|
|
}
|