mirror of
https://sourceware.org/git/binutils-gdb.git
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4a94e36819
This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
58 lines
2.4 KiB
XML
58 lines
2.4 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2007-2022 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.power.altivec">
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<vector id="v4f" type="ieee_single" count="4"/>
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<vector id="v4i32" type="int32" count="4"/>
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<vector id="v8i16" type="int16" count="8"/>
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<vector id="v16i8" type="int8" count="16"/>
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<union id="vec128">
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<field name="uint128" type="uint128"/>
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<field name="v4_float" type="v4f"/>
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<field name="v4_int32" type="v4i32"/>
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<field name="v8_int16" type="v8i16"/>
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<field name="v16_int8" type="v16i8"/>
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</union>
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<reg name="vr0" bitsize="128" type="vec128"/>
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<reg name="vr1" bitsize="128" type="vec128"/>
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<reg name="vr2" bitsize="128" type="vec128"/>
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<reg name="vr3" bitsize="128" type="vec128"/>
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<reg name="vr4" bitsize="128" type="vec128"/>
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<reg name="vr5" bitsize="128" type="vec128"/>
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<reg name="vr6" bitsize="128" type="vec128"/>
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<reg name="vr7" bitsize="128" type="vec128"/>
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<reg name="vr8" bitsize="128" type="vec128"/>
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<reg name="vr9" bitsize="128" type="vec128"/>
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<reg name="vr10" bitsize="128" type="vec128"/>
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<reg name="vr11" bitsize="128" type="vec128"/>
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<reg name="vr12" bitsize="128" type="vec128"/>
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<reg name="vr13" bitsize="128" type="vec128"/>
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<reg name="vr14" bitsize="128" type="vec128"/>
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<reg name="vr15" bitsize="128" type="vec128"/>
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<reg name="vr16" bitsize="128" type="vec128"/>
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<reg name="vr17" bitsize="128" type="vec128"/>
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<reg name="vr18" bitsize="128" type="vec128"/>
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<reg name="vr19" bitsize="128" type="vec128"/>
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<reg name="vr20" bitsize="128" type="vec128"/>
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<reg name="vr21" bitsize="128" type="vec128"/>
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<reg name="vr22" bitsize="128" type="vec128"/>
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<reg name="vr23" bitsize="128" type="vec128"/>
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<reg name="vr24" bitsize="128" type="vec128"/>
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<reg name="vr25" bitsize="128" type="vec128"/>
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<reg name="vr26" bitsize="128" type="vec128"/>
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<reg name="vr27" bitsize="128" type="vec128"/>
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<reg name="vr28" bitsize="128" type="vec128"/>
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<reg name="vr29" bitsize="128" type="vec128"/>
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<reg name="vr30" bitsize="128" type="vec128"/>
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<reg name="vr31" bitsize="128" type="vec128"/>
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<reg name="vscr" bitsize="32" group="vector"/>
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<reg name="vrsave" bitsize="32" group="vector"/>
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</feature>
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