binutils-gdb/ld/testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od
Maciej W. Rozycki 54806ffa85 MIPS/BFD: Handle branches in PLT compression selection
Complement:

commit 1bbce13264
Author: Maciej W. Rozycki <macro@linux-mips.org>
Date:   Mon Jun 24 23:55:46 2013 +0000

<https://sourceware.org/ml/binutils/2013-06/msg00077.html>, ("MIPS:
Compressed PLT/stubs support"), and also choose between regular and
compressed PLT entries as appropriate for any branches referring.

	bfd/
	* elfxx-mips.c (mips_elf_calculate_relocation): Handle branches
	in PLT compression selection.
	(_bfd_mips_elf_check_relocs): Likewise.

	ld/
	* testsuite/ld-mips-elf/compressed-plt-1.s: Add branch support.
	* testsuite/ld-mips-elf/compressed-plt-1a.s: Likewise.
	* testsuite/ld-mips-elf/compressed-plt-1b.s: Likewise.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.od: New
	test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-branch.rd: New
	test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-bronly.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-mips16-branch.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-bronly.rd:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.od:
	New test.
	* testsuite/ld-mips-elf/compressed-plt-1-o32-umips-branch.rd:
	New test.
	* testsuite/ld-mips-elf/mips-elf.exp: Run the new tests.
2016-07-26 20:00:48 +01:00

70 lines
1.7 KiB
Plaintext

.* file format .*
Disassembly of section \.plt:
# Only _bc (branch from compressed code) functions should have a
# microMIPS PLT.
10100000 <_PROCEDURE_LINKAGE_TABLE_>:
.*: 3c1c1020 lui \$28,0x1020
.*: 8f990000 lw \$25,0\(\$28\)
.*: 279c0000 addiu \$28,\$28,0
.*: 031cc023 subu \$24,\$24,\$28
.*: 03e07825 move \$15,\$31
.*: 0018c082 srl \$24,\$24,0x2
.*: 0320f809 jalr \$25
.*: 2718fffe addiu \$24,\$24,-2
10100020 <f_bu_bc@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df90008 lw \$25,8\(\$15\)
.*: 03200008 jr \$25
.*: 25f80008 addiu \$24,\$15,8
10100030 <f_bu@plt>:
.*: 3c0f1020 lui \$15,0x1020
.*: 8df9000c lw \$25,12\(\$15\)
.*: 03200008 jr \$25
.*: 25f8000c addiu \$24,\$15,12
10100040 <f_bu_bc@micromipsplt>:
.*: 7903 fff2 addiu \$2,\$pc,1048520
# ^ 0x10200008
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
1010004c <f_bc@micromipsplt>:
.*: 7903 fff1 addiu \$2,\$pc,1048516
# ^ 0x10200010
.*: ff22 0000 lw \$25,0\(\$2\)
.*: 4599 jr \$25
.*: 0f02 move \$24,\$2
Disassembly of section \.text\.a:
10101000 <testc>:
.*: 4060 f824 bal 1010004c <f_bc@micromipsplt>
.*: 0000 0000 nop
.*: 9400 f820 b 1010004c <f_bc@micromipsplt>
.*: 0c00 nop
.*: 4060 f817 bal 10100040 <f_bu_bc@micromipsplt>
.*: 0000 0000 nop
.*: 9400 f813 b 10100040 <f_bu_bc@micromipsplt>
.*: 0c00 nop
.*: 459f jr \$31
Disassembly of section \.text\.b:
10102000 <testu>:
.*: 0411f80b bal 10100030 <f_bu@plt>
.*: 00000000 nop
.*: 1000f809 b 10100030 <f_bu@plt>
.*: 00000000 nop
.*: 0411f803 bal 10100020 <f_bu_bc@plt>
.*: 00000000 nop
.*: 1000f801 b 10100020 <f_bu_bc@plt>
.*: 00000000 nop
.*: 03e00008 jr \$31