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aebf9be708
PR ld/19455 * elf32-arm.c (elf32_arm_create_dynamic_sections): Set the ELF class of the linker stub bfd. (elf32_arm_check_relocs): Skip check for pic format after processing a vxWorks R_ARM_ABS12 reloc. * elflink.c (bfd_elf_final_link): Check for ELFCLASSNONE when reporting a class mismatch. * testsuite/ld-arm/vxworks1-lib.dd: Update for current disassmebler output. * testsuite/ld-arm/vxworks1-lib.rd: Likewise. * testsuite/ld-arm/vxworks1.dd: Likewise. * testsuite/ld-arm/vxworks1.rd: Likewise. * testsuite/ld-arm/vxworks1.ld: Set the output format.
42 lines
1.2 KiB
Plaintext
42 lines
1.2 KiB
Plaintext
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.*: file format .*
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Disassembly of section \.plt:
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00080800 <_PROCEDURE_LINKAGE_TABLE_>:
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80800: e59fc000 ldr ip, \[pc] ; 80808 <.*>
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80804: e79cf009 ldr pc, \[ip, r9\]
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80808: 0000000c .word 0x0000000c
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8080c: e59fc000 ldr ip, \[pc] ; 80814 <.*>
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80810: e599f008 ldr pc, \[r9, #8\]
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80814: 00000000 .word 0x00000000
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80818: e59fc000 ldr ip, \[pc] ; 80820 <.*>
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8081c: e79cf009 ldr pc, \[ip, r9\]
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80820: 00000010 .word 0x00000010
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80824: e59fc000 ldr ip, \[pc] ; 8082c <.*>
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80828: e599f008 ldr pc, \[r9, #8\]
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8082c: 0000000c .word 0x0000000c
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Disassembly of section \.text:
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00080c00 <foo>:
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80c00: e92dc200 push {r9, lr, pc}
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80c04: e59f9024 ldr r9, \[pc, #36\] ; 80c30 <.*>
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80c08: e5999000 ldr r9, \[r9\]
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80c0c: e5999000 ldr r9, \[r9\]
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80c10: e59f001c ldr r0, \[pc, #28\] ; 80c34 <.*>
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80c14: e7991000 ldr r1, \[r9, r0\]
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80c18: e2811001 add r1, r1, #1
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80c1c: e7891000 str r1, \[r9, r0\]
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80c20: eb000004 bl 80c38 <slocal>
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80c24: ebfffefb bl 80818 <.*>
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80c28: ebfffef4 bl 80800 <.*>
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80c2c: e8bd8200 pop {r9, pc}
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80c30: 00000000 .word 0x00000000
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80c34: 00000014 .word 0x00000014
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00080c38 <slocal>:
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80c38: e1a0f00e mov pc, lr
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00080c3c <sglobal>:
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80c3c: e1a0f00e mov pc, lr
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