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437 lines
12 KiB
C
437 lines
12 KiB
C
/* Target-dependent code for GNU/Linux on CSKY.
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Copyright (C) 2012-2023 Free Software Foundation, Inc.
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Contributed by C-SKY Microsystems and Mentor Graphics.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "osabi.h"
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#include "glibc-tdep.h"
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#include "linux-tdep.h"
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#include "gdbarch.h"
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#include "solib-svr4.h"
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#include "regset.h"
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#include "trad-frame.h"
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#include "tramp-frame.h"
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#include "csky-tdep.h"
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/* Functions, definitions, and data structures for C-Sky core file debug. */
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/* General regset pc, r1, r0, psr, r2-r31 for CK810. */
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#define SIZEOF_CSKY_GREGSET 34*4
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/* Float regset fesr fsr fr0-fr31 for CK810. */
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#define SIZEOF_CSKY_FREGSET 34*4
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/* Float regset vr0~vr15 fr15~fr31, reserved for CK810 when kernel 4.x. */
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#define SIZEOF_CSKY_FREGSET_K4X 400
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/* Offset mapping table from core_section to regcache of general
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registers for ck810. */
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static const int csky_gregset_offset[] =
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{
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72, 1, 0, 89, 2, /* pc, r1, r0, psr, r2. */
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3, 4, 5, 6, 7, /* r3 ~ r32. */
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8, 9, 10, 11, 12,
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13, 14, 15, 16, 17,
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18, 19, 20, 21, 22,
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23, 24, 25, 26, 27,
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28, 29, 30, 31
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};
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/* Offset mapping table from core_section to regcache of float
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registers for ck810. */
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static const int csky_fregset_offset[] =
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{
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122, 123, 40, 41, 42, /* fcr, fesr, fr0 ~ fr2. */
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43, 44, 45, 46, 47, /* fr3 ~ fr15. */
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48, 49, 50, 51, 52,
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53, 54, 55
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};
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/* Implement the supply_regset hook for GP registers in core files. */
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static void
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csky_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *regs, size_t len)
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{
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int i, gregset_num;
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const gdb_byte *gregs = (const gdb_byte *) regs ;
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gdb_assert (len >= SIZEOF_CSKY_GREGSET);
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gregset_num = ARRAY_SIZE (csky_gregset_offset);
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for (i = 0; i < gregset_num; i++)
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{
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if ((regnum == csky_gregset_offset[i] || regnum == -1)
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&& csky_gregset_offset[i] != -1)
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regcache->raw_supply (csky_gregset_offset[i], gregs + 4 * i);
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}
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}
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/* Implement the collect_regset hook for GP registers in core files. */
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static void
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csky_collect_gregset (const struct regset *regset,
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const struct regcache *regcache,
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int regnum, void *gregs_buf, size_t len)
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{
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int regno, gregset_num;
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gdb_byte *gregs = (gdb_byte *) gregs_buf ;
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gdb_assert (len >= SIZEOF_CSKY_GREGSET);
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gregset_num = ARRAY_SIZE (csky_gregset_offset);
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for (regno = 0; regno < gregset_num; regno++)
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{
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if ((regnum == csky_gregset_offset[regno] || regnum == -1)
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&& csky_gregset_offset[regno] != -1)
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regcache->raw_collect (regno,
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gregs + 4 + csky_gregset_offset[regno]);
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}
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}
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/* Implement the supply_regset hook for FP registers in core files. */
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static void
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csky_supply_fregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *regs, size_t len)
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{
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int i;
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int offset = 0;
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struct gdbarch *gdbarch = regcache->arch ();
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const gdb_byte *fregs = (const gdb_byte *) regs;
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int fregset_num = ARRAY_SIZE (csky_fregset_offset);
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gdb_assert (len >= SIZEOF_CSKY_FREGSET);
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if (len == SIZEOF_CSKY_FREGSET)
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{
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for (i = 0; i < fregset_num; i++)
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{
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if ((regnum == csky_fregset_offset[i] || regnum == -1)
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&& csky_fregset_offset[i] != -1)
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{
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int num = csky_fregset_offset[i];
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offset += register_size (gdbarch, num);
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regcache->raw_supply (csky_fregset_offset[i], fregs + offset);
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}
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}
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}
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else if (len == SIZEOF_CSKY_FREGSET_K4X)
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{
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/* When kernel version >= 4.x, .reg2 size will be 400.
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Contents is {
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unsigned long vr[96];
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unsigned long fcr;
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unsigned long fesr;
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unsigned long fid;
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unsigned long reserved;
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}
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VR[96] means: (vr0~vr15) + (fr16~fr31), each Vector register is
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128-bits, each Float register is 64 bits, the total size is
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(4*96).
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In addition, for fr0~fr15, each FRx is the lower 64 bits of the
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corresponding VRx. So fr0~fr15 and vr0~vr15 regisetrs use the same
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offset. */
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int fcr_regno[] = {122, 123, 121}; /* fcr, fesr, fid. */
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/* Supply vr0~vr15. */
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for (i = 0; i < 16; i ++)
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{
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if (*gdbarch_register_name (gdbarch, (CSKY_VR0_REGNUM + i)) != '\0')
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{
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offset = 16 * i;
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regcache->raw_supply (CSKY_VR0_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fr0~fr15. */
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for (i = 0; i < 16; i ++)
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{
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if (*gdbarch_register_name (gdbarch, (CSKY_FR0_REGNUM + i)) != '\0')
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{
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offset = 16 * i;
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regcache->raw_supply (CSKY_FR0_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fr16~fr31. */
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for (i = 0; i < 16; i ++)
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{
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if (*gdbarch_register_name (gdbarch, (CSKY_FR16_REGNUM + i)) != '\0')
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{
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offset = (16 * 16) + (8 * i);
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regcache->raw_supply (CSKY_FR16_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fcr, fesr, fid. */
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for (i = 0; i < 3; i ++)
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{
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if (*gdbarch_register_name (gdbarch, fcr_regno[i]) != '\0')
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{
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offset = (16 * 16) + (16 * 8) + (4 * i);
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regcache->raw_supply (fcr_regno[i], fregs + offset);
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}
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}
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}
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else
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{
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warning (_("Unknow size %s of section .reg2, can not get value"
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" of float registers."), pulongest (len));
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}
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}
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/* Implement the collect_regset hook for FP registers in core files. */
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static void
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csky_collect_fregset (const struct regset *regset,
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const struct regcache *regcache,
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int regnum, void *fregs_buf, size_t len)
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{
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int regno;
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struct gdbarch *gdbarch = regcache->arch ();
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gdb_byte *fregs = (gdb_byte *) fregs_buf ;
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int fregset_num = ARRAY_SIZE (csky_fregset_offset);
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int offset = 0;
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gdb_assert (len >= SIZEOF_CSKY_FREGSET);
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if (len == SIZEOF_CSKY_FREGSET)
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{
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for (regno = 0; regno < fregset_num; regno++)
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{
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if ((regnum == csky_fregset_offset[regno] || regnum == -1)
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&& csky_fregset_offset[regno] != -1)
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{
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offset += register_size (gdbarch, csky_fregset_offset[regno]);
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regcache->raw_collect (regno, fregs + offset);
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}
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}
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}
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else if (len == SIZEOF_CSKY_FREGSET_K4X)
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{
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/* When kernel version >= 4.x, .reg2 size will be 400.
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Contents is {
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unsigned long vr[96];
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unsigned long fcr;
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unsigned long fesr;
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unsigned long fid;
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unsigned long reserved;
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}
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VR[96] means: (vr0~vr15) + (fr16~fr31), each Vector register is$
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128-bits, each Float register is 64 bits, the total size is$
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(4*96).$
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In addition, for fr0~fr15, each FRx is the lower 64 bits of the$
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corresponding VRx. So fr0~fr15 and vr0~vr15 regisetrs use the same$
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offset. */
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int i = 0;
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int fcr_regno[] = {122, 123, 121}; /* fcr, fesr, fid. */
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/* Supply vr0~vr15. */
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for (i = 0; i < 16; i ++)
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{
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if (*gdbarch_register_name (gdbarch, (CSKY_VR0_REGNUM + i)) != '\0')
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{
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offset = 16 * i;
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regcache ->raw_collect (CSKY_VR0_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fr16~fr31. */
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for (i = 0; i < 16; i ++)
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{
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if (*gdbarch_register_name (gdbarch, (CSKY_FR16_REGNUM + i)) != '\0')
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{
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offset = (16 * 16) + (8 * i);
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regcache ->raw_collect (CSKY_FR16_REGNUM + i, fregs + offset);
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}
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}
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/* Supply fcr, fesr, fid. */
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for (i = 0; i < 3; i ++)
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{
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if (*gdbarch_register_name (gdbarch, fcr_regno[i]) != '\0')
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{
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offset = (16 * 16) + (16 * 8) + (4 * i);
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regcache ->raw_collect (fcr_regno[i], fregs + offset);
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}
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}
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}
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else
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{
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warning (_("Unknow size %s of section .reg2, will not set value"
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" of float registers."), pulongest (len));
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}
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}
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static const struct regset csky_regset_general =
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{
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NULL,
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csky_supply_gregset,
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csky_collect_gregset
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};
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static const struct regset csky_regset_float =
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{
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NULL,
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csky_supply_fregset,
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csky_collect_fregset,
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/* Allow .reg2 to have a different size, and the size of .reg2 should
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always be bigger than SIZEOF_CSKY_FREGSET. */
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1
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};
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/* Iterate over core file register note sections. */
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static void
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csky_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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cb (".reg", sizeof (csky_gregset_offset), sizeof (csky_gregset_offset),
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&csky_regset_general, NULL, cb_data);
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cb (".reg2", sizeof (csky_fregset_offset), sizeof (csky_fregset_offset),
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&csky_regset_float, NULL, cb_data);
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}
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static void
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csky_linux_rt_sigreturn_init (const struct tramp_frame *self,
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frame_info_ptr this_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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int i;
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CORE_ADDR sp = get_frame_register_unsigned (this_frame, 14);
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CORE_ADDR base = sp + CSKY_SIGINFO_OFFSET + CSKY_SIGINFO_SIZE
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+ CSKY_UCONTEXT_SIGCONTEXT
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+ CSKY_SIGCONTEXT_SC_USP
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+ CSKY_SIGCONTEXT_SC_A0;
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/* Set addrs of R0 ~ R13. */
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for (i = 0; i < 14; i++)
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trad_frame_set_reg_addr (this_cache, i, base + i * 4);
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/* Set addrs of SP(R14) and R15. */
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trad_frame_set_reg_addr (this_cache, 14, base - 4);
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trad_frame_set_reg_addr (this_cache, 15, base + 4 * 14);
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/* Set addrs of R16 ~ R31. */
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for (i = 15; i < 31; i++)
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trad_frame_set_reg_addr (this_cache, i, base + i * 4);
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/* Set addrs of PSR and PC. */
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trad_frame_set_reg_addr (this_cache, 89, base + 4 * 33);
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trad_frame_set_reg_addr (this_cache, 72, base + 4 * 34);
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trad_frame_set_id (this_cache, frame_id_build (sp, func));
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}
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static struct tramp_frame
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csky_linux_rt_sigreturn_tramp_frame = {
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SIGTRAMP_FRAME,
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4,
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{
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{ CSKY_MOVI_R7_173, ULONGEST_MAX },
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{ CSKY_TRAP_0, ULONGEST_MAX },
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{ TRAMP_SENTINEL_INSN }
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},
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csky_linux_rt_sigreturn_init
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};
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static void
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csky_linux_rt_sigreturn_init_pt_regs (const struct tramp_frame *self,
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frame_info_ptr this_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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int i;
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CORE_ADDR sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
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CORE_ADDR base = sp + CSKY_SIGINFO_OFFSET + CSKY_SIGINFO_SIZE
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+ CSKY_UCONTEXT_SIGCONTEXT
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+ CSKY_SIGCONTEXT_PT_REGS_TLS;
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/* LR */
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trad_frame_set_reg_addr (this_cache, CSKY_R15_REGNUM, base);
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/* PC */
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trad_frame_set_reg_addr (this_cache, CSKY_PC_REGNUM, base + 4);
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/* PSR */
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trad_frame_set_reg_addr (this_cache, CSKY_CR0_REGNUM, base + 8);
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/* SP */
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trad_frame_set_reg_addr (this_cache, CSKY_SP_REGNUM, base + 12);
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/* Set addrs of R0 ~ R13. */
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for (i = 0; i < 14; i++)
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trad_frame_set_reg_addr (this_cache, i, base + i * 4 + 20);
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trad_frame_set_id (this_cache, frame_id_build (sp, func));
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}
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static struct tramp_frame
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csky_linux_rt_sigreturn_tramp_frame_kernel_4x = {
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SIGTRAMP_FRAME,
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4,
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{
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{ CSKY_MOVI_R7_139, ULONGEST_MAX },
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{ CSKY_TRAP_0, ULONGEST_MAX },
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{ TRAMP_SENTINEL_INSN }
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},
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csky_linux_rt_sigreturn_init_pt_regs
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};
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/* Hook function for gdbarch_register_osabi. */
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static void
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csky_linux_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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linux_init_abi (info, gdbarch, 0);
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/* Shared library handling. */
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set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
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set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
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set_solib_svr4_fetch_link_map_offsets (gdbarch,
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linux_ilp32_fetch_link_map_offsets);
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/* Enable TLS support. */
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set_gdbarch_fetch_tls_load_module_address (gdbarch,
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svr4_fetch_objfile_link_map);
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/* Core file support. */
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set_gdbarch_iterate_over_regset_sections (
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gdbarch, csky_linux_iterate_over_regset_sections);
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/* Append tramp frame unwinder for SIGNAL. */
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tramp_frame_prepend_unwinder (gdbarch,
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&csky_linux_rt_sigreturn_tramp_frame);
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tramp_frame_prepend_unwinder (gdbarch,
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&csky_linux_rt_sigreturn_tramp_frame_kernel_4x);
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}
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void _initialize_csky_linux_tdep ();
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void
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_initialize_csky_linux_tdep ()
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{
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gdbarch_register_osabi (bfd_arch_csky, 0, GDB_OSABI_LINUX,
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csky_linux_init_abi);
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}
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