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0aa13feeeb
It must get boring translating all the variants we have of unrecognized/unsupported/invalid/unexpected reloc number. This patch cuts down on the number of variations. * aoutx.h, * coff-alpha.c, * coff-i860.c, * coff-m68k.c, * coff-mcore.c, * coff-ppc.c, * coff-rs6000.c, * coff-sh.c, * coff-tic4x.c, * coff-tic54x.c, * coff-tic80.c, * coff-w65.c, * elf-bfd.h, * elf-m10300.c, * elf.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-i370.c, * elf32-i386.c, * elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xgate.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-mips.c, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * reloc.c: Standardize unrecognized/unsupported reloc message.
293 lines
10 KiB
C
293 lines
10 KiB
C
/* BFD back-end for TMS320C4X coff binaries.
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Copyright (C) 1996-2018 Free Software Foundation, Inc.
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Contributed by Michael Hayes (m.hayes@elec.canterbury.ac.nz)
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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#include "bfdlink.h"
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#include "coff/tic4x.h"
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#include "coff/internal.h"
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#include "libcoff.h"
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#undef F_LSYMS
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#define F_LSYMS F_LSYMS_TICOFF
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static reloc_howto_type *
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coff_tic4x_rtype_to_howto (bfd *, asection *, struct internal_reloc *,
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struct coff_link_hash_entry *,
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struct internal_syment *, bfd_vma *);
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static void
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tic4x_reloc_processing (arelent *, struct internal_reloc *,
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asymbol **, bfd *, asection *);
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/* Replace the stock _bfd_coff_is_local_label_name to recognize TI COFF local
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labels. */
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static bfd_boolean
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ticoff_bfd_is_local_label_name (bfd *abfd ATTRIBUTE_UNUSED,
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const char *name)
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{
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if (TICOFF_LOCAL_LABEL_P(name))
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return TRUE;
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return FALSE;
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}
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#define coff_bfd_is_local_label_name ticoff_bfd_is_local_label_name
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#define RELOC_PROCESSING(RELENT,RELOC,SYMS,ABFD,SECT)\
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tic4x_reloc_processing (RELENT,RELOC,SYMS,ABFD,SECT)
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/* Customize coffcode.h; the default coff_ functions are set up to use
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COFF2; coff_bad_format_hook uses BADMAG, so set that for COFF2.
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The COFF1 and COFF0 vectors use custom _bad_format_hook procs
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instead of setting BADMAG. */
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#define BADMAG(x) COFF2_BADMAG(x)
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#undef coff_rtype_to_howto
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#define coff_rtype_to_howto coff_tic4x_rtype_to_howto
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#ifndef bfd_pe_print_pdata
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#define bfd_pe_print_pdata NULL
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#endif
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#include "coffcode.h"
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static bfd_reloc_status_type
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tic4x_relocation (bfd *abfd ATTRIBUTE_UNUSED,
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arelent *reloc_entry,
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asymbol *symbol ATTRIBUTE_UNUSED,
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void * data ATTRIBUTE_UNUSED,
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asection *input_section,
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bfd *output_bfd,
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char **error_message ATTRIBUTE_UNUSED)
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{
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if (output_bfd != (bfd *) NULL)
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{
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/* This is a partial relocation, and we want to apply the
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relocation to the reloc entry rather than the raw data.
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Modify the reloc inplace to reflect what we now know. */
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reloc_entry->address += input_section->output_offset;
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return bfd_reloc_ok;
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}
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return bfd_reloc_continue;
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}
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reloc_howto_type tic4x_howto_table[] =
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{
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HOWTO(R_RELWORD, 0, 2, 16, FALSE, 0, complain_overflow_signed, tic4x_relocation, "RELWORD", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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HOWTO(R_REL24, 0, 2, 24, FALSE, 0, complain_overflow_bitfield, tic4x_relocation, "REL24", TRUE, 0x00ffffff, 0x00ffffff, FALSE),
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HOWTO(R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_dont, tic4x_relocation, "RELLONG", TRUE, 0xffffffff, 0xffffffff, FALSE),
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HOWTO(R_PCRWORD, 0, 2, 16, TRUE, 0, complain_overflow_signed, tic4x_relocation, "PCRWORD", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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HOWTO(R_PCR24, 0, 2, 24, TRUE, 0, complain_overflow_signed, tic4x_relocation, "PCR24", TRUE, 0x00ffffff, 0x00ffffff, FALSE),
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HOWTO(R_PARTLS16, 0, 2, 16, FALSE, 0, complain_overflow_dont, tic4x_relocation, "PARTLS16", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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HOWTO(R_PARTMS8, 16, 2, 16, FALSE, 0, complain_overflow_dont, tic4x_relocation, "PARTMS8", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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HOWTO(R_RELWORD, 0, 2, 16, FALSE, 0, complain_overflow_signed, tic4x_relocation, "ARELWORD", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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HOWTO(R_REL24, 0, 2, 24, FALSE, 0, complain_overflow_signed, tic4x_relocation, "AREL24", TRUE, 0x00ffffff, 0x00ffffff, FALSE),
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HOWTO(R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_signed, tic4x_relocation, "ARELLONG", TRUE, 0xffffffff, 0xffffffff, FALSE),
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HOWTO(R_PCRWORD, 0, 2, 16, TRUE, 0, complain_overflow_signed, tic4x_relocation, "APCRWORD", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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HOWTO(R_PCR24, 0, 2, 24, TRUE, 0, complain_overflow_signed, tic4x_relocation, "APCR24", TRUE, 0x00ffffff, 0x00ffffff, FALSE),
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HOWTO(R_PARTLS16, 0, 2, 16, FALSE, 0, complain_overflow_dont, tic4x_relocation, "APARTLS16", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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HOWTO(R_PARTMS8, 16, 2, 16, FALSE, 0, complain_overflow_dont, tic4x_relocation, "APARTMS8", TRUE, 0x0000ffff, 0x0000ffff, FALSE),
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};
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#define HOWTO_SIZE (sizeof(tic4x_howto_table) / sizeof(tic4x_howto_table[0]))
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#undef coff_bfd_reloc_type_lookup
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#define coff_bfd_reloc_type_lookup tic4x_coff_reloc_type_lookup
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#undef coff_bfd_reloc_name_lookup
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#define coff_bfd_reloc_name_lookup tic4x_coff_reloc_name_lookup
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/* For the case statement use the code values used tc_gen_reloc (defined in
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bfd/reloc.c) to map to the howto table entries. */
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static reloc_howto_type *
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tic4x_coff_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
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bfd_reloc_code_real_type code)
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{
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unsigned int type;
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unsigned int i;
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switch (code)
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{
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case BFD_RELOC_32: type = R_RELLONG; break;
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case BFD_RELOC_24: type = R_REL24; break;
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case BFD_RELOC_16: type = R_RELWORD; break;
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case BFD_RELOC_24_PCREL: type = R_PCR24; break;
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case BFD_RELOC_16_PCREL: type = R_PCRWORD; break;
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case BFD_RELOC_HI16: type = R_PARTMS8; break;
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case BFD_RELOC_LO16: type = R_PARTLS16; break;
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default:
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return NULL;
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}
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for (i = 0; i < HOWTO_SIZE; i++)
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{
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if (tic4x_howto_table[i].type == type)
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return tic4x_howto_table + i;
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}
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return NULL;
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}
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static reloc_howto_type *
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tic4x_coff_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
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const char *r_name)
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{
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unsigned int i;
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for (i = 0;
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i < sizeof (tic4x_howto_table) / sizeof (tic4x_howto_table[0]);
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i++)
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if (tic4x_howto_table[i].name != NULL
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&& strcasecmp (tic4x_howto_table[i].name, r_name) == 0)
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return &tic4x_howto_table[i];
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return NULL;
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}
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/* Code to turn a r_type into a howto ptr, uses the above howto table.
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Called after some initial checking by the tic4x_rtype_to_howto fn
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below. */
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static void
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tic4x_lookup_howto (bfd *abfd,
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arelent *internal,
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struct internal_reloc *dst)
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{
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unsigned int i;
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int bank = (dst->r_symndx == -1) ? HOWTO_BANK : 0;
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for (i = 0; i < HOWTO_SIZE; i++)
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{
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if (tic4x_howto_table[i].type == dst->r_type)
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{
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internal->howto = tic4x_howto_table + i + bank;
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return;
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}
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}
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_bfd_error_handler (_("%pB: unsupported relocation type %#x"),
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abfd, (unsigned int) dst->r_type);
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abort();
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}
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static reloc_howto_type *
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coff_tic4x_rtype_to_howto (bfd *abfd,
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asection *sec,
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struct internal_reloc *rel,
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struct coff_link_hash_entry *h ATTRIBUTE_UNUSED,
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struct internal_syment *sym ATTRIBUTE_UNUSED,
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bfd_vma *addendp)
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{
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arelent genrel;
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if (rel->r_symndx == -1 && addendp != NULL)
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/* This is a TI "internal relocation", which means that the relocation
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amount is the amount by which the current section is being relocated
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in the output section. */
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*addendp = (sec->output_section->vma + sec->output_offset) - sec->vma;
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tic4x_lookup_howto (abfd, &genrel, rel);
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return genrel.howto;
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}
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static void
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tic4x_reloc_processing (arelent *relent,
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struct internal_reloc *reloc,
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asymbol **symbols,
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bfd *abfd,
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asection *section)
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{
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asymbol *ptr;
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relent->address = reloc->r_vaddr;
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if (reloc->r_symndx != -1)
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{
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if (reloc->r_symndx < 0 || reloc->r_symndx >= obj_conv_table_size (abfd))
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{
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_bfd_error_handler
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/* xgettext: c-format */
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(_("%pB: warning: illegal symbol index %ld in relocs"),
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abfd, reloc->r_symndx);
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relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
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ptr = NULL;
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}
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else
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{
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relent->sym_ptr_ptr = (symbols
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+ obj_convert (abfd)[reloc->r_symndx]);
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ptr = *(relent->sym_ptr_ptr);
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}
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}
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else
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{
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relent->sym_ptr_ptr = section->symbol_ptr_ptr;
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ptr = *(relent->sym_ptr_ptr);
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}
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/* The symbols definitions that we have read in have been relocated
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as if their sections started at 0. But the offsets refering to
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the symbols in the raw data have not been modified, so we have to
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have a negative addend to compensate.
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Note that symbols which used to be common must be left alone. */
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/* Calculate any reloc addend by looking at the symbol. */
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CALC_ADDEND (abfd, ptr, *reloc, relent);
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relent->address -= section->vma;
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/* !! relent->section = (asection *) NULL; */
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/* Fill in the relent->howto field from reloc->r_type. */
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tic4x_lookup_howto (abfd, relent, reloc);
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}
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/* TI COFF v0, DOS tools (little-endian headers). */
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CREATE_LITTLE_COFF_TARGET_VEC(tic4x_coff0_vec, "coff0-tic4x",
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0, SEC_CODE | SEC_READONLY, '_',
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NULL, &ticoff0_swap_table);
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/* TI COFF v0, SPARC tools (big-endian headers). */
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CREATE_BIGHDR_COFF_TARGET_VEC(tic4x_coff0_beh_vec, "coff0-beh-tic4x",
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0, SEC_CODE | SEC_READONLY, '_',
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&tic4x_coff0_vec, &ticoff0_swap_table);
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/* TI COFF v1, DOS tools (little-endian headers). */
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CREATE_LITTLE_COFF_TARGET_VEC(tic4x_coff1_vec, "coff1-tic4x",
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0, SEC_CODE | SEC_READONLY, '_',
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&tic4x_coff0_beh_vec, &ticoff1_swap_table);
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/* TI COFF v1, SPARC tools (big-endian headers). */
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CREATE_BIGHDR_COFF_TARGET_VEC(tic4x_coff1_beh_vec, "coff1-beh-tic4x",
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0, SEC_CODE | SEC_READONLY, '_',
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&tic4x_coff1_vec, &ticoff1_swap_table);
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/* TI COFF v2, TI DOS tools output (little-endian headers). */
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CREATE_LITTLE_COFF_TARGET_VEC(tic4x_coff2_vec, "coff2-tic4x",
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0, SEC_CODE | SEC_READONLY, '_',
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&tic4x_coff1_beh_vec, COFF_SWAP_TABLE);
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/* TI COFF v2, TI SPARC tools output (big-endian headers). */
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CREATE_BIGHDR_COFF_TARGET_VEC(tic4x_coff2_beh_vec, "coff2-beh-tic4x",
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0, SEC_CODE | SEC_READONLY, '_',
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&tic4x_coff2_vec, COFF_SWAP_TABLE);
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