mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-24 10:35:12 +08:00
28439f5ef7
(core_file_thread_alive): Rename to... (core_thread_alive): ... this. (core_pid_to_str): Try gdbarch_core_pid_to_str first. (init_core_ops): Adjust. (coreops_suppress_target): Delete. (_initialize_corelow): Unconditionally add core_ops. * procfs.c: Include "inf-child.h". (procfs_ops): Delete. (init_procfs_ops): Delete. Reimplement as... (procfs_target): ... this, inheriting from inf-child. (procfs_attach, procfs_detach, procfs_fetch_registers): Adjust. (procfs_prepare_to_store): Delete. (procfs_store_registers, procfs_resume): Adjust. (procfs_open): Delete. (procfs_suppress_run): Delete. (procfs_can_run): Delete. (procfs_mourn_inferior): Adjust. (procfs_init_inferior): Add target_ops parameter. Adjust. (procfs_create_inferior): Don't pass procfs_init_inferior to fork_inferior. Instead call it after fork_inferior returns. (procfs_find_new_threads): Adjust. (_initialize_procfs): Adjust to use procfs_target instead of init_procfs_ops. * sol-thread.c (orig_core_ops, sol_core_ops): Delete. (lwp_to_thread): Use target_thread_alive. (sol_thread_open): Delete. (sol_thread_attach): Delete. (sol_thread_detach, sol_thread_resume, sol_thread_wait) (sol_thread_fetch_registers, sol_thread_store_registers): Adjust to use find_target_beneath. (sol_thread_prepare_to_store, sol_thread_xfer_memory): Delete. (sol_thread_xfer_partial): Adjust to use find_target_beneath. (sol_thread_files_info, sol_thread_kill_inferior): Delete. (check_for_thread_db): New. (sol_thread_notice_signals, sol_thread_create_inferior): Delete. (sol_thread_new_objfile): Call check_for_thread_db. (sol_thread_mourn_inferior): Adjust to use find_target_beneath. (sol_thread_can_run): Delete. (sol_thread_alive): Adjust to use find_target_beneath. (sol_thread_stop): Delete. (rw_common): Use target_write_memory or target_read_memory. (ps_lgetregs, ps_lgetfpregs): Use target_fetch_registers. (ps_lsetregs, ps_lsetfpregs): Use target_store_registers. (solaris_pid_to_str): Remove check for libthread_db initialization failing. (sol_find_new_threads): Remove check for libthread_db initialization failing, or for an invalid inferior_ptid. Adjust to use find_target_beneath. (sol_core_open, sol_core_close, sol_core_detach, sol_core_files_info, sol_find_memory_regions, sol_make_note_section, ignore): Delete. (init_sol_thread_ops): Make it a thread_stratum target. Remove unneeded callback settings. (init_sol_core_ops): Delete. (_initialize_sol_thread): No longer call init_sol_core_ops, set procfs_suppress_run, or hack with core_ops. * target.h (struct target_ops): Add a target_ops * parameter to to_resume, to_fetch_registers, to_store_registers, to_thread_alive and to_find_new_threads. (target_fetch_registers, target_store_registers) (target_thread_alive, target_find_new_threads): Redeclare as function. * target.c (update_current_target): Do not inherit or de_fault to_resume, to_fetch_registers, to_store_registers, to_thread_alive, to_find_new_threads. (target_resume): Adjust. (target_thread_alive, target_find_new_threads): New. (debug_to_resume, debug_to_fetch_registers): Delete. (target_fetch_registers): New. (debug_to_store_registers): Delete. (target_store_registers): New. (debug_to_thread_alive, debug_to_find_new_threads): Delete. (setup_target_debug): Adjust. * gdbcore.h (core_ops): Delete declaration. * inf-ptrace.c, linux-nat.c, remote.c, amd64-linux-nat.c, inf-child.c, linux-thread-db.c, bsd-uthread.c, inf-ttrace.c, i386-sol2-tdep.c, darwin-nat.c, gnu-nat.c, go32-nat.c, hpux-thread.c, i386-linux-nat.c, i386fbsd-nat.c, monitor.c, nto-procfs.c, remote-m32r-sdi.c, remote-mips.c, windows-nat.c, alphabsd-nat.c, amd64bsd-nat.c, arm-linux-nat.c, armnbsd-nat.c, bsd-kvm.c, hppa-hpux-nat.c, hppa-linux-nat.c, hppabsd-nat.c, hppanbsd-nat.c, i386-darwin-nat.c, i386bsd-nat.c, ia64-linux-nat.c, m32r-linux-nat.c, m68kbsd-nat.c, m68klinux-nat.c, m88kbsd-nat.c, mips-linux-nat.c, mips64obsd-nat.c, mipsnbsd-nat.c, ppc-linux-nat.c, ppcnbsd-nat.c, ppcobsd-nat.c, remote-sim.c, rs6000-nat.c, s390-nat.c, shnbsd-nat.c, sparc-nat.c, sparc-nat.h, spu-linux-nat.c, vaxbsd-nat.c, xtensa-linux-nat.c: Adjust to target_ops changes. * gdbarch.sh (core_pid_to_str): New gdbarch callback. * gdbarch.h, gdbarch.c: Regenerate. * sol2-tdep.c: Include "inferior.h". (sol2_core_pid_to_str): New. * sol2-tdep.h (sol2_core_pid_to_str): Declare. * amd64-sol2-tdep.c (amd64_sol2_init_abi): Set it. * sparc-sol2-tdep.c (sparc32_sol2_init_abi): Set it. * sparc64-sol2-tdep.c (sparc64_sol2_init_abi): Set it. * i386-sol2-tdep.c (i386_sol2_init_abi): Set it.
505 lines
12 KiB
C
505 lines
12 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright (C) 1988, 1989, 1991, 1992, 1994, 1996, 1999, 2002, 2004, 2007,
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2008, 2009 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include "gdb_string.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "arm-tdep.h"
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#include "inf-ptrace.h"
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extern int arm_apcs_32;
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static void
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arm_supply_gregset (struct regcache *regcache, struct reg *gregset)
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{
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int regno;
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CORE_ADDR r_pc;
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/* Integer registers. */
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_supply (regcache, regno, (char *) &gregset->r[regno]);
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &gregset->r_sp);
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &gregset->r_lr);
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/* This is ok: we're running native... */
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r_pc = gdbarch_addr_bits_remove (get_regcache_arch (regcache), gregset->r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM, (char *) &r_pc);
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &gregset->r_pc);
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}
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static void
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arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset)
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{
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_raw_supply (regcache, regno,
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(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &fparegset->fpr_fpsr);
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}
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static void
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fetch_register (struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general register"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_supply (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_supply (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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/* This is ok: we're running native... */
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(get_regcache_arch (regcache),
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inferior_registers.r_pc);
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regcache_raw_supply (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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regcache_raw_supply (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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}
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static void
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fetch_regs (struct regcache *regcache)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_gregset (regcache, &inferior_registers);
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}
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static void
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fetch_fp_register (struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point register"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_raw_supply (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_raw_supply (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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}
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static void
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fetch_fp_regs (struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_fparegset (regcache, &inferior_fp_registers);
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}
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static void
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armnbsd_fetch_registers (struct target_ops *ops,
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struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regcache, regno);
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else
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fetch_fp_register (regcache, regno);
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}
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else
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{
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fetch_regs (regcache);
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fetch_fp_regs (regcache);
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}
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}
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static void
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store_register (const struct regcache *regcache, int regno)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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inferior_registers.r_pc ^= gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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struct reg inferior_registers;
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_registers.r[regno]);
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regcache_raw_collect (regcache, ARM_SP_REGNUM,
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(char *) &inferior_registers.r_sp);
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regcache_raw_collect (regcache, ARM_LR_REGNUM,
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(char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache_raw_collect (regcache, ARM_PC_REGNUM,
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(char *) &pc_val);
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regcache_raw_collect (regcache, ARM_PS_REGNUM,
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(char *) &psr_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to store general registers"));
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}
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static void
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store_fp_register (const struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point registers"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache_raw_collect (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_fp_regs (const struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache_raw_collect (regcache, regno,
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(char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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regcache_raw_collect (regcache, ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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ret = ptrace (PT_SETFPREGS, PIDGET (inferior_ptid),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to store floating-point registers"));
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}
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static void
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armnbsd_store_registers (struct target_ops *ops,
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struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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store_register (regcache, regno);
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else
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store_fp_register (regcache, regno);
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}
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else
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{
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store_regs (regcache);
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store_fp_regs (regcache);
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}
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}
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struct md_core
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|
{
|
|
struct reg intreg;
|
|
struct fpreg freg;
|
|
};
|
|
|
|
static void
|
|
fetch_core_registers (struct regcache *regcache,
|
|
char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR ignore)
|
|
{
|
|
struct md_core *core_reg = (struct md_core *) core_reg_sect;
|
|
int regno;
|
|
CORE_ADDR r_pc;
|
|
|
|
arm_supply_gregset (regcache, &core_reg->intreg);
|
|
arm_supply_fparegset (regcache, &core_reg->freg);
|
|
}
|
|
|
|
static void
|
|
fetch_elfcore_registers (struct regcache *regcache,
|
|
char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR ignore)
|
|
{
|
|
struct reg gregset;
|
|
struct fpreg fparegset;
|
|
|
|
switch (which)
|
|
{
|
|
case 0: /* Integer registers. */
|
|
if (core_reg_size != sizeof (struct reg))
|
|
warning (_("wrong size of register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&gregset, core_reg_sect, sizeof (gregset));
|
|
arm_supply_gregset (regcache, &gregset);
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
if (core_reg_size != sizeof (struct fpreg))
|
|
warning (_("wrong size of FPA register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
|
|
arm_supply_fparegset (regcache, &fparegset);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
/* Don't know what kind of register request this is; just ignore it. */
|
|
break;
|
|
}
|
|
}
|
|
|
|
static struct core_fns arm_netbsd_core_fns =
|
|
{
|
|
bfd_target_unknown_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_core_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
static struct core_fns arm_netbsd_elfcore_fns =
|
|
{
|
|
bfd_target_elf_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_elfcore_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
void
|
|
_initialize_arm_netbsd_nat (void)
|
|
{
|
|
struct target_ops *t;
|
|
|
|
t = inf_ptrace_target ();
|
|
t->to_fetch_registers = armnbsd_fetch_registers;
|
|
t->to_store_registers = armnbsd_store_registers;
|
|
add_target (t);
|
|
|
|
deprecated_add_core_fns (&arm_netbsd_core_fns);
|
|
deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
|
|
}
|