mirror of
https://sourceware.org/git/binutils-gdb.git
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493 lines
16 KiB
C++
493 lines
16 KiB
C++
/* Target-dependent code for the i386.
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Copyright (C) 2001-2023 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef I386_TDEP_H
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#define I386_TDEP_H
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#include "gdbarch.h"
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#include "infrun.h"
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#include "expression.h"
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#include "gdbsupport/x86-xstate.h"
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class frame_info_ptr;
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struct gdbarch;
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struct reggroup;
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struct regset;
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struct regcache;
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/* GDB's i386 target supports both the 32-bit Intel Architecture
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(IA-32) and the 64-bit AMD x86-64 architecture. Internally it uses
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a similar register layout for both.
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- General purpose registers
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- FPU data registers
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- FPU control registers
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- SSE data registers
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- SSE control register
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The general purpose registers for the x86-64 architecture are quite
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different from IA-32. Therefore, gdbarch_fp0_regnum
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determines the register number at which the FPU data registers
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start. The number of FPU data and control registers is the same
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for both architectures. The number of SSE registers however,
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differs and is determined by the num_xmm_regs member of `struct
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gdbarch_tdep'. */
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/* Convention for returning structures. */
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enum struct_return
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{
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pcc_struct_return, /* Return "short" structures in memory. */
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reg_struct_return /* Return "short" structures in registers. */
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};
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/* i386 architecture specific information. */
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struct i386_gdbarch_tdep : gdbarch_tdep_base
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{
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/* General-purpose registers. */
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int *gregset_reg_offset = 0;
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int gregset_num_regs = 0;
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size_t sizeof_gregset = 0;
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/* Floating-point registers. */
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size_t sizeof_fpregset = 0;
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/* Register number for %st(0). The register numbers for the other
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registers follow from this one. Set this to -1 to indicate the
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absence of an FPU. */
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int st0_regnum = 0;
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/* Number of MMX registers. */
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int num_mmx_regs = 0;
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/* Register number for %mm0. Set this to -1 to indicate the absence
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of MMX support. */
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int mm0_regnum = 0;
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/* Number of pseudo YMM registers. */
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int num_ymm_regs = 0;
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/* Register number for %ymm0. Set this to -1 to indicate the absence
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of pseudo YMM register support. */
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int ymm0_regnum = 0;
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/* Number of AVX512 OpMask registers (K-registers) */
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int num_k_regs = 0;
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/* Register number for %k0. Set this to -1 to indicate the absence
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of AVX512 OpMask register support. */
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int k0_regnum = 0;
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/* Number of pseudo ZMM registers ($zmm0-$zmm31). */
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int num_zmm_regs = 0;
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/* Register number for %zmm0. Set this to -1 to indicate the absence
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of pseudo ZMM register support. */
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int zmm0_regnum = 0;
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/* Number of byte registers. */
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int num_byte_regs = 0;
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/* Register pseudo number for %al. */
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int al_regnum = 0;
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/* Number of pseudo word registers. */
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int num_word_regs = 0;
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/* Register number for %ax. */
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int ax_regnum = 0;
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/* Number of pseudo dword registers. */
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int num_dword_regs = 0;
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/* Register number for %eax. Set this to -1 to indicate the absence
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of pseudo dword register support. */
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int eax_regnum = 0;
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/* Number of core registers. */
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int num_core_regs = 0;
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/* Number of SSE registers. */
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int num_xmm_regs = 0;
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/* Number of SSE registers added in AVX512. */
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int num_xmm_avx512_regs = 0;
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/* Register number of XMM16, the first XMM register added in AVX512. */
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int xmm16_regnum = 0;
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/* Number of YMM registers added in AVX512. */
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int num_ymm_avx512_regs = 0;
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/* Register number of YMM16, the first YMM register added in AVX512. */
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int ymm16_regnum = 0;
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/* Bits of the extended control register 0 (the XFEATURE_ENABLED_MASK
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register), excluding the x87 bit, which are supported by this GDB. */
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uint64_t xcr0 = 0;
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/* Offset of XCR0 in XSAVE extended state. */
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int xsave_xcr0_offset = 0;
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/* Layout of the XSAVE area extended region. */
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x86_xsave_layout xsave_layout;
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/* Register names. */
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const char * const *register_names = nullptr;
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/* Register number for %ymm0h. Set this to -1 to indicate the absence
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of upper YMM register support. */
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int ymm0h_regnum = 0;
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/* Upper YMM register names. Only used for tdesc_numbered_register. */
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const char * const *ymmh_register_names = nullptr;
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/* Register number for %ymm16h. Set this to -1 to indicate the absence
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of support for YMM16-31. */
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int ymm16h_regnum = 0;
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/* YMM16-31 register names. Only used for tdesc_numbered_register. */
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const char * const *ymm16h_register_names = nullptr;
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/* Register number for %bnd0r. Set this to -1 to indicate the absence
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bound registers. */
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int bnd0r_regnum = 0;
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/* Register number for pseudo register %bnd0. Set this to -1 to indicate the absence
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bound registers. */
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int bnd0_regnum = 0;
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/* Register number for %bndcfgu. Set this to -1 to indicate the absence
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bound control registers. */
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int bndcfgu_regnum = 0;
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/* MPX register names. Only used for tdesc_numbered_register. */
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const char * const *mpx_register_names = nullptr;
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/* Register number for %zmm0h. Set this to -1 to indicate the absence
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of ZMM_HI256 register support. */
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int zmm0h_regnum = 0;
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/* OpMask register names. */
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const char * const *k_register_names = nullptr;
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/* ZMM register names. Only used for tdesc_numbered_register. */
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const char * const *zmmh_register_names = nullptr;
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/* XMM16-31 register names. Only used for tdesc_numbered_register. */
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const char * const *xmm_avx512_register_names = nullptr;
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/* YMM16-31 register names. Only used for tdesc_numbered_register. */
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const char * const *ymm_avx512_register_names = nullptr;
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/* Number of PKEYS registers. */
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int num_pkeys_regs = 0;
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/* Register number for PKRU register. */
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int pkru_regnum = 0;
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/* PKEYS register names. */
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const char * const *pkeys_register_names = nullptr;
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/* Register number for %fsbase. Set this to -1 to indicate the
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absence of segment base registers. */
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int fsbase_regnum = 0;
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/* Target description. */
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const struct target_desc *tdesc = nullptr;
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/* Register group function. */
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gdbarch_register_reggroup_p_ftype *register_reggroup_p = nullptr;
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/* Offset of saved PC in jmp_buf. */
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int jb_pc_offset = 0;
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/* Convention for returning structures. */
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enum struct_return struct_return {};
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/* Address range where sigtramp lives. */
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CORE_ADDR sigtramp_start = 0;
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CORE_ADDR sigtramp_end = 0;
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/* Detect sigtramp. */
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int (*sigtramp_p) (frame_info_ptr) = nullptr;
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/* Get address of sigcontext for sigtramp. */
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CORE_ADDR (*sigcontext_addr) (frame_info_ptr) = nullptr;
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/* Offset of registers in `struct sigcontext'. */
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int *sc_reg_offset = 0;
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int sc_num_regs = 0;
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/* Offset of saved PC and SP in `struct sigcontext'. Usage of these
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is deprecated, please use `sc_reg_offset' instead. */
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int sc_pc_offset = 0;
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int sc_sp_offset = 0;
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/* ISA-specific data types. */
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struct type *i386_mmx_type = nullptr;
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struct type *i386_ymm_type = nullptr;
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struct type *i386_zmm_type = nullptr;
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struct type *i387_ext_type = nullptr;
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struct type *i386_bnd_type = nullptr;
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/* Process record/replay target. */
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/* The map for registers because the AMD64's registers order
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in GDB is not same as I386 instructions. */
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const int *record_regmap = nullptr;
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/* Parse intx80 args. */
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int (*i386_intx80_record) (struct regcache *regcache) = nullptr;
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/* Parse sysenter args. */
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int (*i386_sysenter_record) (struct regcache *regcache) = nullptr;
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/* Parse syscall args. */
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int (*i386_syscall_record) (struct regcache *regcache) = nullptr;
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/* Regsets. */
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const struct regset *fpregset = nullptr;
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};
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/* Floating-point registers. */
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/* All FPU control registers (except for FIOFF and FOOFF) are 16-bit
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(at most) in the FPU, but are zero-extended to 32 bits in GDB's
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register cache. */
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/* Return non-zero if REGNUM matches the FP register and the FP
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register set is active. */
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extern int i386_fp_regnum_p (struct gdbarch *, int);
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extern int i386_fpc_regnum_p (struct gdbarch *, int);
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/* Register numbers of various important registers. */
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enum i386_regnum
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{
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I386_EAX_REGNUM, /* %eax */
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I386_ECX_REGNUM, /* %ecx */
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I386_EDX_REGNUM, /* %edx */
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I386_EBX_REGNUM, /* %ebx */
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I386_ESP_REGNUM, /* %esp */
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I386_EBP_REGNUM, /* %ebp */
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I386_ESI_REGNUM, /* %esi */
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I386_EDI_REGNUM, /* %edi */
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I386_EIP_REGNUM, /* %eip */
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I386_EFLAGS_REGNUM, /* %eflags */
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I386_CS_REGNUM, /* %cs */
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I386_SS_REGNUM, /* %ss */
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I386_DS_REGNUM, /* %ds */
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I386_ES_REGNUM, /* %es */
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I386_FS_REGNUM, /* %fs */
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I386_GS_REGNUM, /* %gs */
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I386_ST0_REGNUM, /* %st(0) */
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I386_MXCSR_REGNUM = 40, /* %mxcsr */
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I386_YMM0H_REGNUM, /* %ymm0h */
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I386_YMM7H_REGNUM = I386_YMM0H_REGNUM + 7,
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I386_BND0R_REGNUM,
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I386_BND3R_REGNUM = I386_BND0R_REGNUM + 3,
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I386_BNDCFGU_REGNUM,
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I386_BNDSTATUS_REGNUM,
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I386_K0_REGNUM, /* %k0 */
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I386_K7_REGNUM = I386_K0_REGNUM + 7,
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I386_ZMM0H_REGNUM, /* %zmm0h */
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I386_ZMM7H_REGNUM = I386_ZMM0H_REGNUM + 7,
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I386_PKRU_REGNUM,
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I386_FSBASE_REGNUM,
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I386_GSBASE_REGNUM
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};
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/* Register numbers of RECORD_REGMAP. */
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enum record_i386_regnum
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{
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X86_RECORD_REAX_REGNUM,
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X86_RECORD_RECX_REGNUM,
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X86_RECORD_REDX_REGNUM,
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X86_RECORD_REBX_REGNUM,
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X86_RECORD_RESP_REGNUM,
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X86_RECORD_REBP_REGNUM,
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X86_RECORD_RESI_REGNUM,
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X86_RECORD_REDI_REGNUM,
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X86_RECORD_R8_REGNUM,
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X86_RECORD_R9_REGNUM,
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X86_RECORD_R10_REGNUM,
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X86_RECORD_R11_REGNUM,
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X86_RECORD_R12_REGNUM,
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X86_RECORD_R13_REGNUM,
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X86_RECORD_R14_REGNUM,
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X86_RECORD_R15_REGNUM,
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X86_RECORD_REIP_REGNUM,
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X86_RECORD_EFLAGS_REGNUM,
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X86_RECORD_CS_REGNUM,
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X86_RECORD_SS_REGNUM,
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X86_RECORD_DS_REGNUM,
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X86_RECORD_ES_REGNUM,
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X86_RECORD_FS_REGNUM,
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X86_RECORD_GS_REGNUM,
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};
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#define I386_NUM_GREGS 16
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#define I386_NUM_XREGS 9
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#define I386_SSE_NUM_REGS (I386_MXCSR_REGNUM + 1)
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#define I386_AVX_NUM_REGS (I386_YMM7H_REGNUM + 1)
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#define I386_MPX_NUM_REGS (I386_BNDSTATUS_REGNUM + 1)
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#define I386_AVX512_NUM_REGS (I386_ZMM7H_REGNUM + 1)
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#define I386_PKEYS_NUM_REGS (I386_PKRU_REGNUM + 1)
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#define I386_NUM_REGS (I386_GSBASE_REGNUM + 1)
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/* Size of the largest register. */
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#define I386_MAX_REGISTER_SIZE 64
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/* Types for i386-specific registers. */
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extern struct type *i387_ext_type (struct gdbarch *gdbarch);
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/* Checks of different registers. */
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extern int i386_byte_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_word_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_dword_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_xmm_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_xmm_avx512_regnum_p (struct gdbarch * gdbarch, int regnum);
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extern int i386_ymm_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_ymm_avx512_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_bnd_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_k_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_zmm_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern int i386_zmmh_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern bool i386_pkru_regnum_p (struct gdbarch *gdbarch, int regnum);
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extern const char *i386_pseudo_register_name (struct gdbarch *gdbarch,
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int regnum);
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extern struct type *i386_pseudo_register_type (struct gdbarch *gdbarch,
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int regnum);
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extern void i386_pseudo_register_read_into_value (struct gdbarch *gdbarch,
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readable_regcache *regcache,
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int regnum,
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struct value *result);
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extern void i386_pseudo_register_write (struct gdbarch *gdbarch,
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struct regcache *regcache,
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int regnum, const gdb_byte *buf);
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extern int i386_ax_pseudo_register_collect (struct gdbarch *gdbarch,
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struct agent_expr *ax,
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int regnum);
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/* Segment selectors. */
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#define I386_SEL_RPL 0x0003 /* Requester's Privilege Level mask. */
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#define I386_SEL_UPL 0x0003 /* User Privilege Level. */
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#define I386_SEL_KPL 0x0000 /* Kernel Privilege Level. */
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/* The length of the longest i386 instruction (according to
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include/asm-i386/kprobes.h in Linux 2.6. */
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#define I386_MAX_INSN_LEN (16)
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/* Functions exported from i386-tdep.c. */
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extern CORE_ADDR i386_pe_skip_trampoline_code (frame_info_ptr frame,
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CORE_ADDR pc, char *name);
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extern CORE_ADDR i386_skip_main_prologue (struct gdbarch *gdbarch,
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CORE_ADDR pc);
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/* The "push_dummy_call" gdbarch method, optionally with the thiscall
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calling convention. */
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extern CORE_ADDR i386_thiscall_push_dummy_call (struct gdbarch *gdbarch,
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struct value *function,
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struct regcache *regcache,
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CORE_ADDR bp_addr,
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int nargs, struct value **args,
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CORE_ADDR sp,
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function_call_return_method
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return_method,
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CORE_ADDR struct_addr,
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bool thiscall);
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/* Return whether the THIS_FRAME corresponds to a sigtramp routine. */
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extern int i386_sigtramp_p (frame_info_ptr this_frame);
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/* Return non-zero if REGNUM is a member of the specified group. */
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extern int i386_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
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const struct reggroup *group);
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/* Supply register REGNUM from the general-purpose register set REGSET
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to register cache REGCACHE. If REGNUM is -1, do this for all
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registers in REGSET. */
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extern void i386_supply_gregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *gregs, size_t len);
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/* General-purpose register set. */
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extern const struct regset i386_gregset;
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/* Floating-point register set. */
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extern const struct regset i386_fpregset;
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/* Default iterator over core file register note sections. */
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extern void
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i386_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache);
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typedef buf_displaced_step_copy_insn_closure
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i386_displaced_step_copy_insn_closure;
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extern displaced_step_copy_insn_closure_up i386_displaced_step_copy_insn
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(struct gdbarch *gdbarch, CORE_ADDR from, CORE_ADDR to,
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struct regcache *regs);
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extern void i386_displaced_step_fixup
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(struct gdbarch *gdbarch, displaced_step_copy_insn_closure *closure,
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CORE_ADDR from, CORE_ADDR to, regcache *regs, bool completed_p);
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/* Initialize a basic ELF architecture variant. */
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extern void i386_elf_init_abi (struct gdbarch_info, struct gdbarch *);
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/* Initialize a SVR4 architecture variant. */
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extern void i386_svr4_init_abi (struct gdbarch_info, struct gdbarch *);
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/* Convert SVR4 register number REG to the appropriate register number
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used by GDB. */
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extern int i386_svr4_reg_to_regnum (struct gdbarch *gdbarch, int reg);
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||
extern int i386_process_record (struct gdbarch *gdbarch,
|
||
struct regcache *regcache, CORE_ADDR addr);
|
||
extern const struct target_desc *i386_target_description (uint64_t xcr0,
|
||
bool segments);
|
||
|
||
/* Return true iff the current target is MPX enabled. */
|
||
extern int i386_mpx_enabled (void);
|
||
|
||
|
||
/* Functions and variables exported from i386-bsd-tdep.c. */
|
||
|
||
extern void i386bsd_init_abi (struct gdbarch_info, struct gdbarch *);
|
||
extern CORE_ADDR i386obsd_sigtramp_start_addr;
|
||
extern CORE_ADDR i386obsd_sigtramp_end_addr;
|
||
extern int i386obsd_sc_reg_offset[];
|
||
extern int i386bsd_sc_reg_offset[];
|
||
|
||
/* SystemTap related functions. */
|
||
|
||
extern int i386_stap_is_single_operand (struct gdbarch *gdbarch,
|
||
const char *s);
|
||
|
||
extern expr::operation_up i386_stap_parse_special_token
|
||
(struct gdbarch *gdbarch, struct stap_parse_info *p);
|
||
|
||
#endif /* i386-tdep.h */
|