mirror of
https://sourceware.org/git/binutils-gdb.git
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1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/* Target-dependent code for the NDS32 architecture, for GDB.
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Copyright (C) 2013-2024 Free Software Foundation, Inc.
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Contributed by Andes Technology Corporation.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef NDS32_TDEP_H
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#define NDS32_TDEP_H
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#include "gdbarch.h"
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enum nds32_regnum
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{
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/* General purpose registers. */
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NDS32_R0_REGNUM = 0,
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NDS32_R5_REGNUM = 5,
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NDS32_TA_REGNUM = 15, /* Temporary register. */
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NDS32_FP_REGNUM = 28, /* Frame pointer. */
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NDS32_GP_REGNUM = 29, /* Global pointer. */
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NDS32_LP_REGNUM = 30, /* Link pointer. */
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NDS32_SP_REGNUM = 31, /* Stack pointer. */
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NDS32_PC_REGNUM = 32, /* Program counter. */
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NDS32_NUM_REGS,
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/* The first double precision floating-point register. */
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NDS32_FD0_REGNUM = NDS32_NUM_REGS,
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};
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struct nds32_gdbarch_tdep : gdbarch_tdep_base
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{
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/* The guessed FPU configuration. */
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int fpu_freg = 0;
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/* FSRs are defined as pseudo registers. */
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int use_pseudo_fsrs = 0;
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/* Cached regnum of the first FSR (FS0). */
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int fs0_regnum = 0;
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/* ELF ABI info. */
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int elf_abi = 0;
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};
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#endif /* NDS32_TDEP_H */
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