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8bbf03947d
During the gdbserver c++'ification refactoring, I apparently made a typo that broke build in ia64 targets. gdbserver/ChangeLog: 2020-05-16 Tankut Baris Aktemur <tankut.baris.aktemur@intel.com> * linux-ia64-low.cc (ia64_target::sw_breakpoint_from_kind): Fix incorrect 'gdb_assert_no_reached' to 'gdb_assert_not_reached'. (ia64_target::low_breakpoint_at): Ditto.
397 lines
8.0 KiB
C++
397 lines
8.0 KiB
C++
/* GNU/Linux/IA64 specific low level interface, for the remote server for GDB.
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Copyright (C) 1995-2020 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include "linux-low.h"
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#ifdef HAVE_SYS_REG_H
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#include <sys/reg.h>
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#endif
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/* Linux target op definitions for the IA64 architecture. */
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class ia64_target : public linux_process_target
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{
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public:
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const regs_info *get_regs_info () override;
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const gdb_byte *sw_breakpoint_from_kind (int kind, int *size) override;
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protected:
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void low_arch_setup () override;
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bool low_cannot_fetch_register (int regno) override;
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bool low_cannot_store_register (int regno) override;
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bool low_fetch_register (regcache *regcache, int regno) override;
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bool low_breakpoint_at (CORE_ADDR pc) override;
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};
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/* The singleton target ops object. */
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static ia64_target the_ia64_target;
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const gdb_byte *
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ia64_target::sw_breakpoint_from_kind (int kind, int *size)
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{
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gdb_assert_not_reached ("target op sw_breakpoint_from_kind is not "
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"implemented by this target");
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}
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bool
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ia64_target::low_breakpoint_at (CORE_ADDR pc)
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{
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gdb_assert_not_reached ("linux target op low_breakpoint_at is not "
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"implemented by this target");
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}
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/* Defined in auto-generated file reg-ia64.c. */
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void init_registers_ia64 (void);
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extern const struct target_desc *tdesc_ia64;
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#define ia64_num_regs 462
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#include <asm/ptrace_offsets.h>
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static int ia64_regmap[] =
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{
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/* general registers */
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-1, /* gr0 not available; i.e, it's always zero */
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PT_R1,
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PT_R2,
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PT_R3,
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PT_R4,
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PT_R5,
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PT_R6,
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PT_R7,
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PT_R8,
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PT_R9,
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PT_R10,
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PT_R11,
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PT_R12,
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PT_R13,
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PT_R14,
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PT_R15,
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PT_R16,
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PT_R17,
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PT_R18,
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PT_R19,
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PT_R20,
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PT_R21,
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PT_R22,
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PT_R23,
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PT_R24,
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PT_R25,
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PT_R26,
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PT_R27,
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PT_R28,
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PT_R29,
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PT_R30,
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PT_R31,
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/* gr32 through gr127 not directly available via the ptrace interface */
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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/* Floating point registers */
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-1, -1, /* f0 and f1 not available (f0 is +0.0 and f1 is +1.0) */
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PT_F2,
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PT_F3,
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PT_F4,
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PT_F5,
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PT_F6,
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PT_F7,
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PT_F8,
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PT_F9,
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PT_F10,
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PT_F11,
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PT_F12,
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PT_F13,
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PT_F14,
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PT_F15,
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PT_F16,
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PT_F17,
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PT_F18,
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PT_F19,
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PT_F20,
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PT_F21,
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PT_F22,
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PT_F23,
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PT_F24,
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PT_F25,
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PT_F26,
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PT_F27,
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PT_F28,
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PT_F29,
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PT_F30,
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PT_F31,
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PT_F32,
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PT_F33,
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PT_F34,
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PT_F35,
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PT_F36,
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PT_F37,
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PT_F38,
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PT_F39,
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PT_F40,
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PT_F41,
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PT_F42,
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PT_F43,
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PT_F44,
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PT_F45,
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PT_F46,
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PT_F47,
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PT_F48,
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PT_F49,
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PT_F50,
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PT_F51,
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PT_F52,
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PT_F53,
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PT_F54,
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PT_F55,
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PT_F56,
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PT_F57,
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PT_F58,
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PT_F59,
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PT_F60,
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PT_F61,
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PT_F62,
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PT_F63,
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PT_F64,
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PT_F65,
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PT_F66,
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PT_F67,
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PT_F68,
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PT_F69,
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PT_F70,
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PT_F71,
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PT_F72,
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PT_F73,
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PT_F74,
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PT_F75,
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PT_F76,
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PT_F77,
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PT_F78,
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PT_F79,
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PT_F80,
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PT_F81,
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PT_F82,
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PT_F83,
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PT_F84,
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PT_F85,
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PT_F86,
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PT_F87,
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PT_F88,
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PT_F89,
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PT_F90,
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PT_F91,
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PT_F92,
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PT_F93,
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PT_F94,
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PT_F95,
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PT_F96,
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PT_F97,
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PT_F98,
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PT_F99,
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PT_F100,
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PT_F101,
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PT_F102,
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PT_F103,
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PT_F104,
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PT_F105,
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PT_F106,
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PT_F107,
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PT_F108,
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PT_F109,
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PT_F110,
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PT_F111,
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PT_F112,
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PT_F113,
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PT_F114,
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PT_F115,
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PT_F116,
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PT_F117,
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PT_F118,
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PT_F119,
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PT_F120,
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PT_F121,
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PT_F122,
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PT_F123,
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PT_F124,
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PT_F125,
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PT_F126,
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PT_F127,
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/* predicate registers - we don't fetch these individually */
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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/* branch registers */
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PT_B0,
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PT_B1,
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PT_B2,
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PT_B3,
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PT_B4,
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PT_B5,
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PT_B6,
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PT_B7,
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/* virtual frame pointer and virtual return address pointer */
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-1, -1,
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/* other registers */
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PT_PR,
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PT_CR_IIP, /* ip */
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PT_CR_IPSR, /* psr */
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PT_CFM, /* cfm */
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/* kernel registers not visible via ptrace interface (?) */
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-1, -1, -1, -1, -1, -1, -1, -1,
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/* hole */
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-1, -1, -1, -1, -1, -1, -1, -1,
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PT_AR_RSC,
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PT_AR_BSP,
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PT_AR_BSPSTORE,
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PT_AR_RNAT,
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-1,
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-1, /* Not available: FCR, IA32 floating control register */
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-1, -1,
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-1, /* Not available: EFLAG */
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-1, /* Not available: CSD */
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-1, /* Not available: SSD */
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-1, /* Not available: CFLG */
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-1, /* Not available: FSR */
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-1, /* Not available: FIR */
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-1, /* Not available: FDR */
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-1,
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PT_AR_CCV,
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-1, -1, -1,
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PT_AR_UNAT,
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-1, -1, -1,
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PT_AR_FPSR,
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-1, -1, -1,
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-1, /* Not available: ITC */
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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PT_AR_PFS,
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PT_AR_LC,
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PT_AR_EC,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1,
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};
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bool
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ia64_target::low_cannot_store_register (int regno)
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{
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return false;
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}
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bool
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ia64_target::low_cannot_fetch_register (int regno)
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{
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return false;
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}
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/* GDB register numbers. */
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#define IA64_GR0_REGNUM 0
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#define IA64_FR0_REGNUM 128
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#define IA64_FR1_REGNUM 129
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bool
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ia64_target::low_fetch_register (regcache *regcache, int regnum)
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{
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/* r0 cannot be fetched but is always zero. */
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if (regnum == IA64_GR0_REGNUM)
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{
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const gdb_byte zero[8] = { 0 };
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gdb_assert (sizeof (zero) == register_size (regcache->tdesc, regnum));
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supply_register (regcache, regnum, zero);
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return true;
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}
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/* fr0 cannot be fetched but is always zero. */
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if (regnum == IA64_FR0_REGNUM)
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{
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const gdb_byte f_zero[16] = { 0 };
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gdb_assert (sizeof (f_zero) == register_size (regcache->tdesc, regnum));
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supply_register (regcache, regnum, f_zero);
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return true;
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}
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/* fr1 cannot be fetched but is always one (1.0). */
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if (regnum == IA64_FR1_REGNUM)
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{
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const gdb_byte f_one[16] =
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{ 0, 0, 0, 0, 0, 0, 0, 0x80, 0xff, 0xff, 0, 0, 0, 0, 0, 0 };
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gdb_assert (sizeof (f_one) == register_size (regcache->tdesc, regnum));
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supply_register (regcache, regnum, f_one);
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return true;
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}
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return false;
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}
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static struct usrregs_info ia64_usrregs_info =
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{
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ia64_num_regs,
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ia64_regmap,
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};
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static struct regs_info myregs_info =
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{
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NULL, /* regset_bitmap */
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&ia64_usrregs_info
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};
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const regs_info *
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ia64_target::get_regs_info ()
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{
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return &myregs_info;
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}
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void
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ia64_target::low_arch_setup ()
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{
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current_process ()->tdesc = tdesc_ia64;
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}
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/* The linux target ops object. */
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linux_process_target *the_linux_target = &the_ia64_target;
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void
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initialize_low_arch (void)
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{
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init_registers_ia64 ();
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}
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