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a9b9b4071f
globals. (remote_resume, remote_wait): Use them. * d10v-tdep.c: Set the above hooks. (tracesource): New GDB variable, controls source display in traces. (display_trace): Find and display source line if requested. (trace_info): Mention empty trace buffer if appropriate. (tdisassemble_command): Robustify argument handling.
988 lines
24 KiB
C
988 lines
24 KiB
C
/* Target-dependent code for Mitsubishi D10V, for GDB.
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Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/* Contributed by Martin Hunt, hunt@cygnus.com */
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#include "defs.h"
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#include "frame.h"
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#include "obstack.h"
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#include "symtab.h"
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#include "gdbtypes.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "gdb_string.h"
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#include "value.h"
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#include "inferior.h"
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#include "dis-asm.h"
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#include "symfile.h"
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#include "objfiles.h"
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void d10v_frame_find_saved_regs PARAMS ((struct frame_info *fi,
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struct frame_saved_regs *fsr));
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static void d10v_pop_dummy_frame PARAMS ((struct frame_info *fi));
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/* Discard from the stack the innermost frame, restoring all saved
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registers. */
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void
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d10v_pop_frame ()
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{
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struct frame_info *frame = get_current_frame ();
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CORE_ADDR fp;
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int regnum;
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struct frame_saved_regs fsr;
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char raw_buffer[8];
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fp = FRAME_FP (frame);
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if (frame->dummy)
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{
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d10v_pop_dummy_frame(frame);
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return;
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}
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/* fill out fsr with the address of where each */
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/* register was stored in the frame */
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get_frame_saved_regs (frame, &fsr);
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/* now update the current registers with the old values */
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for (regnum = A0_REGNUM; regnum < A0_REGNUM+2 ; regnum++)
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{
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if (fsr.regs[regnum])
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{
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read_memory (fsr.regs[regnum], raw_buffer, 8);
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write_register_bytes (REGISTER_BYTE (regnum), raw_buffer, 8);
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}
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}
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for (regnum = 0; regnum < SP_REGNUM; regnum++)
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{
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if (fsr.regs[regnum])
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{
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write_register (regnum, read_memory_unsigned_integer (fsr.regs[regnum], 2));
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}
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}
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if (fsr.regs[PSW_REGNUM])
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{
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write_register (PSW_REGNUM, read_memory_unsigned_integer (fsr.regs[PSW_REGNUM], 2));
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}
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write_register (PC_REGNUM, read_register(13));
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write_register (SP_REGNUM, fp + frame->size);
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target_store_registers (-1);
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flush_cached_frames ();
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}
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static int
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check_prologue (op)
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unsigned short op;
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{
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/* st rn, @-sp */
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if ((op & 0x7E1F) == 0x6C1F)
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return 1;
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/* st2w rn, @-sp */
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if ((op & 0x7E3F) == 0x6E1F)
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return 1;
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/* subi sp, n */
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if ((op & 0x7FE1) == 0x01E1)
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return 1;
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/* mv r11, sp */
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if (op == 0x417E)
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return 1;
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/* nop */
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if (op == 0x5E00)
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return 1;
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/* st rn, @sp */
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if ((op & 0x7E1F) == 0x681E)
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return 1;
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/* st2w rn, @sp */
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if ((op & 0x7E3F) == 0x3A1E)
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return 1;
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return 0;
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}
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CORE_ADDR
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d10v_skip_prologue (pc)
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CORE_ADDR pc;
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{
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unsigned long op;
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unsigned short op1, op2;
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CORE_ADDR func_addr, func_end;
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struct symtab_and_line sal;
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/* If we have line debugging information, then the end of the */
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/* prologue should the first assembly instruction of the first source line */
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if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
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{
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sal = find_pc_line (func_addr, 0);
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if ( sal.end && sal.end < func_end)
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return sal.end;
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}
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if (target_read_memory (pc, (char *)&op, 4))
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return pc; /* Can't access it -- assume no prologue. */
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while (1)
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{
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op = (unsigned long)read_memory_integer (pc, 4);
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if ((op & 0xC0000000) == 0xC0000000)
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{
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/* long instruction */
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if ( ((op & 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
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((op & 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
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((op & 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
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break;
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}
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else
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{
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/* short instructions */
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if ((op & 0xC0000000) == 0x80000000)
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{
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op2 = (op & 0x3FFF8000) >> 15;
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op1 = op & 0x7FFF;
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}
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else
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{
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op1 = (op & 0x3FFF8000) >> 15;
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op2 = op & 0x7FFF;
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}
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if (check_prologue(op1))
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{
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if (!check_prologue(op2))
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{
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/* if the previous opcode was really part of the prologue */
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/* and not just a NOP, then we want to break after both instructions */
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if (op1 != 0x5E00)
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pc += 4;
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break;
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}
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}
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else
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break;
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}
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pc += 4;
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}
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return pc;
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}
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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*/
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CORE_ADDR
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d10v_frame_chain (frame)
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struct frame_info *frame;
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{
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struct frame_saved_regs fsr;
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d10v_frame_find_saved_regs (frame, &fsr);
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if (frame->return_pc == IMEM_START)
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return (CORE_ADDR)0;
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if (!fsr.regs[FP_REGNUM])
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{
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if (!fsr.regs[SP_REGNUM] || fsr.regs[SP_REGNUM] == STACK_START)
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return (CORE_ADDR)0;
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return fsr.regs[SP_REGNUM];
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}
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if (!read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2))
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return (CORE_ADDR)0;
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return read_memory_unsigned_integer(fsr.regs[FP_REGNUM],2)| DMEM_START;
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}
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static int next_addr, uses_frame;
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static int
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prologue_find_regs (op, fsr, addr)
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unsigned short op;
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struct frame_saved_regs *fsr;
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CORE_ADDR addr;
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{
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int n;
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/* st rn, @-sp */
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if ((op & 0x7E1F) == 0x6C1F)
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{
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n = (op & 0x1E0) >> 5;
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next_addr -= 2;
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fsr->regs[n] = next_addr;
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return 1;
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}
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/* st2w rn, @-sp */
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else if ((op & 0x7E3F) == 0x6E1F)
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{
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n = (op & 0x1E0) >> 5;
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next_addr -= 4;
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fsr->regs[n] = next_addr;
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fsr->regs[n+1] = next_addr+2;
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return 1;
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}
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/* subi sp, n */
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if ((op & 0x7FE1) == 0x01E1)
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{
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n = (op & 0x1E) >> 1;
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if (n == 0)
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n = 16;
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next_addr -= n;
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return 1;
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}
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/* mv r11, sp */
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if (op == 0x417E)
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{
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uses_frame = 1;
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return 1;
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}
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/* nop */
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if (op == 0x5E00)
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return 1;
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/* st rn, @sp */
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if ((op & 0x7E1F) == 0x681E)
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{
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n = (op & 0x1E0) >> 5;
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fsr->regs[n] = next_addr;
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return 1;
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}
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/* st2w rn, @sp */
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if ((op & 0x7E3F) == 0x3A1E)
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{
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n = (op & 0x1E0) >> 5;
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fsr->regs[n] = next_addr;
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fsr->regs[n+1] = next_addr+2;
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return 1;
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}
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return 0;
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}
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/* Put here the code to store, into a struct frame_saved_regs, the
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addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special: the address we
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return for it IS the sp for the next frame. */
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void
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d10v_frame_find_saved_regs (fi, fsr)
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struct frame_info *fi;
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struct frame_saved_regs *fsr;
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{
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CORE_ADDR fp, pc;
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unsigned long op;
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unsigned short op1, op2;
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int i;
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fp = fi->frame;
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memset (fsr, 0, sizeof (*fsr));
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next_addr = 0;
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pc = get_pc_function_start (fi->pc);
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uses_frame = 0;
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while (1)
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{
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op = (unsigned long)read_memory_integer (pc, 4);
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if ((op & 0xC0000000) == 0xC0000000)
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{
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/* long instruction */
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if ((op & 0x3FFF0000) == 0x01FF0000)
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{
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/* add3 sp,sp,n */
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short n = op & 0xFFFF;
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next_addr += n;
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}
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else if ((op & 0x3F0F0000) == 0x340F0000)
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{
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/* st rn, @(offset,sp) */
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short offset = op & 0xFFFF;
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short n = (op >> 20) & 0xF;
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fsr->regs[n] = next_addr + offset;
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}
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else if ((op & 0x3F1F0000) == 0x350F0000)
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{
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/* st2w rn, @(offset,sp) */
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short offset = op & 0xFFFF;
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short n = (op >> 20) & 0xF;
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fsr->regs[n] = next_addr + offset;
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fsr->regs[n+1] = next_addr + offset + 2;
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}
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else
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break;
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}
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else
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{
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/* short instructions */
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if ((op & 0xC0000000) == 0x80000000)
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{
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op2 = (op & 0x3FFF8000) >> 15;
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op1 = op & 0x7FFF;
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}
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else
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{
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op1 = (op & 0x3FFF8000) >> 15;
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op2 = op & 0x7FFF;
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}
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if (!prologue_find_regs(op1,fsr,pc) || !prologue_find_regs(op2,fsr,pc))
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break;
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}
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pc += 4;
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}
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fi->size = -next_addr;
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if (!(fp & 0xffff))
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fp = read_register(SP_REGNUM) | DMEM_START;
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for (i=0; i<NUM_REGS-1; i++)
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if (fsr->regs[i])
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{
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fsr->regs[i] = fp - (next_addr - fsr->regs[i]);
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}
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if (fsr->regs[LR_REGNUM])
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fi->return_pc = ((read_memory_unsigned_integer(fsr->regs[LR_REGNUM],2) - 1) << 2) | IMEM_START;
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else
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fi->return_pc = ((read_register(LR_REGNUM) - 1) << 2) | IMEM_START;
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/* th SP is not normally (ever?) saved, but check anyway */
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if (!fsr->regs[SP_REGNUM])
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{
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/* if the FP was saved, that means the current FP is valid, */
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/* otherwise, it isn't being used, so we use the SP instead */
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if (uses_frame)
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fsr->regs[SP_REGNUM] = read_register(FP_REGNUM) + fi->size;
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else
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{
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fsr->regs[SP_REGNUM] = fp + fi->size;
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fi->frameless = 1;
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fsr->regs[FP_REGNUM] = 0;
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}
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}
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}
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void
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d10v_init_extra_frame_info (fromleaf, fi)
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int fromleaf;
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struct frame_info *fi;
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{
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struct frame_saved_regs dummy;
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if (fi->next && ((fi->pc & 0xffff) == 0))
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fi->pc = fi->next->return_pc;
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d10v_frame_find_saved_regs (fi, &dummy);
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}
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static void
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show_regs (args, from_tty)
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char *args;
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int from_tty;
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{
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long long num1, num2;
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printf_filtered ("PC=%04x (0x%x) PSW=%04x RPT_S=%04x RPT_E=%04x RPT_C=%04x\n",
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read_register (PC_REGNUM), (read_register (PC_REGNUM) << 2) + IMEM_START,
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read_register (PSW_REGNUM),
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read_register (24),
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read_register (25),
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read_register (23));
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printf_filtered ("R0-R7 %04x %04x %04x %04x %04x %04x %04x %04x\n",
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read_register (0),
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read_register (1),
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read_register (2),
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read_register (3),
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read_register (4),
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read_register (5),
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read_register (6),
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read_register (7));
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printf_filtered ("R8-R15 %04x %04x %04x %04x %04x %04x %04x %04x\n",
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read_register (8),
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read_register (9),
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read_register (10),
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read_register (11),
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read_register (12),
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read_register (13),
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read_register (14),
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read_register (15));
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printf_filtered ("IMAP0 %04x IMAP1 %04x DMAP %04x\n",
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read_register (IMAP0_REGNUM),
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read_register (IMAP1_REGNUM),
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read_register (DMAP_REGNUM));
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read_register_gen (A0_REGNUM, (char *)&num1);
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read_register_gen (A0_REGNUM+1, (char *)&num2);
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printf_filtered ("A0-A1 %010llx %010llx\n",num1, num2);
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}
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static CORE_ADDR
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d10v_xlate_addr (addr)
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int addr;
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{
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int imap;
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if (addr < 0x20000)
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imap = (int)read_register(IMAP0_REGNUM);
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else
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imap = (int)read_register(IMAP1_REGNUM);
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if (imap & 0x1000)
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return (CORE_ADDR)(addr + 0x1000000);
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return (CORE_ADDR)(addr + (imap & 0xff)*0x20000);
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}
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CORE_ADDR
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d10v_read_pc (pid)
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int pid;
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{
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int save_pid, retval;
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save_pid = inferior_pid;
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inferior_pid = pid;
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retval = (int)read_register (PC_REGNUM);
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inferior_pid = save_pid;
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return d10v_xlate_addr(retval << 2);
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}
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void
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d10v_write_pc (val, pid)
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CORE_ADDR val;
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int pid;
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{
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int save_pid;
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save_pid = inferior_pid;
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inferior_pid = pid;
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write_register (PC_REGNUM, (val & 0x3ffff) >> 2);
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inferior_pid = save_pid;
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}
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CORE_ADDR
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d10v_read_sp ()
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{
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return (read_register(SP_REGNUM) | DMEM_START);
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}
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void
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d10v_write_sp (val)
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CORE_ADDR val;
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{
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write_register (SP_REGNUM, (LONGEST)(val & 0xffff));
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}
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CORE_ADDR
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d10v_fix_call_dummy (dummyname, start_sp, fun, nargs, args, type, gcc_p)
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char *dummyname;
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CORE_ADDR start_sp;
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CORE_ADDR fun;
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int nargs;
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value_ptr *args;
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struct type *type;
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int gcc_p;
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{
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int regnum;
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CORE_ADDR sp;
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char buffer[MAX_REGISTER_RAW_SIZE];
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struct frame_info *frame = get_current_frame ();
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frame->dummy = start_sp;
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start_sp |= DMEM_START;
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sp = start_sp;
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for (regnum = 0; regnum < NUM_REGS; regnum++)
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{
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sp -= REGISTER_RAW_SIZE(regnum);
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store_address (buffer, REGISTER_RAW_SIZE(regnum), read_register(regnum));
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write_memory (sp, buffer, REGISTER_RAW_SIZE(regnum));
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}
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|
write_register (SP_REGNUM, (LONGEST)(sp & 0xffff));
|
|
/* now we need to load LR with the return address */
|
|
write_register (LR_REGNUM, (LONGEST)(d10v_call_dummy_address() & 0xffff) >> 2);
|
|
return sp;
|
|
}
|
|
|
|
static void
|
|
d10v_pop_dummy_frame (fi)
|
|
struct frame_info *fi;
|
|
{
|
|
CORE_ADDR sp = fi->dummy;
|
|
int regnum;
|
|
|
|
for (regnum = 0; regnum < NUM_REGS; regnum++)
|
|
{
|
|
sp -= REGISTER_RAW_SIZE(regnum);
|
|
write_register(regnum, read_memory_unsigned_integer (sp, REGISTER_RAW_SIZE(regnum)));
|
|
}
|
|
flush_cached_frames (); /* needed? */
|
|
}
|
|
|
|
|
|
CORE_ADDR
|
|
d10v_push_arguments (nargs, args, sp, struct_return, struct_addr)
|
|
int nargs;
|
|
value_ptr *args;
|
|
CORE_ADDR sp;
|
|
int struct_return;
|
|
CORE_ADDR struct_addr;
|
|
{
|
|
int i, len, index=0, regnum=2;
|
|
char buffer[4], *contents;
|
|
LONGEST val;
|
|
CORE_ADDR ptrs[10];
|
|
|
|
/* Pass 1. Put all large args on stack */
|
|
for (i = 0; i < nargs; i++)
|
|
{
|
|
value_ptr arg = args[i];
|
|
struct type *arg_type = check_typedef (VALUE_TYPE (arg));
|
|
len = TYPE_LENGTH (arg_type);
|
|
contents = VALUE_CONTENTS(arg);
|
|
val = extract_signed_integer (contents, len);
|
|
if (len > 4)
|
|
{
|
|
/* put on stack and pass pointers */
|
|
sp -= len;
|
|
write_memory (sp, contents, len);
|
|
ptrs[index++] = sp;
|
|
}
|
|
}
|
|
|
|
index = 0;
|
|
|
|
for (i = 0; i < nargs; i++)
|
|
{
|
|
value_ptr arg = args[i];
|
|
struct type *arg_type = check_typedef (VALUE_TYPE (arg));
|
|
len = TYPE_LENGTH (arg_type);
|
|
contents = VALUE_CONTENTS(arg);
|
|
val = extract_signed_integer (contents, len);
|
|
if (len > 4)
|
|
{
|
|
/* use a pointer to previously saved data */
|
|
if (regnum < 6)
|
|
write_register (regnum++, ptrs[index++]);
|
|
else
|
|
{
|
|
/* no more registers available. put it on the stack */
|
|
sp -= 2;
|
|
store_address (buffer, 2, ptrs[index++]);
|
|
write_memory (sp, buffer, 2);
|
|
}
|
|
}
|
|
else
|
|
{
|
|
if (regnum < 6 )
|
|
{
|
|
if (len == 4)
|
|
write_register (regnum++, val>>16);
|
|
write_register (regnum++, val & 0xffff);
|
|
}
|
|
else
|
|
{
|
|
sp -= len;
|
|
store_address (buffer, len, val);
|
|
write_memory (sp, buffer, len);
|
|
}
|
|
}
|
|
}
|
|
return sp;
|
|
}
|
|
|
|
|
|
/* pick an out-of-the-way place to set the return value */
|
|
/* for an inferior function call. The link register is set to this */
|
|
/* value and a momentary breakpoint is set there. When the breakpoint */
|
|
/* is hit, the dummy frame is popped and the previous environment is */
|
|
/* restored. */
|
|
|
|
CORE_ADDR
|
|
d10v_call_dummy_address ()
|
|
{
|
|
CORE_ADDR entry;
|
|
struct minimal_symbol *sym;
|
|
|
|
entry = entry_point_address ();
|
|
|
|
if (entry != 0)
|
|
return entry;
|
|
|
|
sym = lookup_minimal_symbol ("_start", NULL, symfile_objfile);
|
|
|
|
if (!sym || MSYMBOL_TYPE (sym) != mst_text)
|
|
return 0;
|
|
else
|
|
return SYMBOL_VALUE_ADDRESS (sym);
|
|
}
|
|
|
|
/* Given a return value in `regbuf' with a type `valtype',
|
|
extract and copy its value into `valbuf'. */
|
|
|
|
void
|
|
d10v_extract_return_value (valtype, regbuf, valbuf)
|
|
struct type *valtype;
|
|
char regbuf[REGISTER_BYTES];
|
|
char *valbuf;
|
|
{
|
|
memcpy (valbuf, regbuf + REGISTER_BYTE (2), TYPE_LENGTH (valtype));
|
|
}
|
|
|
|
/* The following code implements access to, and display of, the D10V's
|
|
instruction trace buffer. The buffer consists of 64K or more
|
|
4-byte words of data, of which each words includes an 8-bit count,
|
|
an 8-bit segment number, and a 16-bit instruction address.
|
|
|
|
In theory, the trace buffer is continuously capturing instruction
|
|
data that the CPU presents on its "debug bus", but in practice, the
|
|
ROMified GDB stub only enables tracing when it continues or steps
|
|
the program, and stops tracing when the program stops; so it
|
|
actually works for GDB to read the buffer counter out of memory and
|
|
then read each trace word. The counter records where the tracing
|
|
stops, but there is no record of where it started, so we remember
|
|
the PC when we resumed and then search backwards in the trace
|
|
buffer for a word that includes that address. This is not perfect,
|
|
because you will miss trace data if the resumption PC is the target
|
|
of a branch. (The value of the buffer counter is semi-random, any
|
|
trace data from a previous program stop is gone.) */
|
|
|
|
/* The address of the last word recorded in the trace buffer. */
|
|
|
|
#define DBBC_ADDR (0xd80000)
|
|
|
|
/* The base of the trace buffer, at least for the "Board_0". */
|
|
|
|
#define TRACE_BUFFER_BASE (0xf40000)
|
|
|
|
static void trace_command PARAMS ((char *, int));
|
|
|
|
static void untrace_command PARAMS ((char *, int));
|
|
|
|
static void trace_info PARAMS ((char *, int));
|
|
|
|
static void tdisassemble_command PARAMS ((char *, int));
|
|
|
|
static void display_trace PARAMS ((int, int));
|
|
|
|
/* True when instruction traces are being collected. */
|
|
|
|
static int tracing;
|
|
|
|
/* Remembered PC. */
|
|
|
|
static CORE_ADDR last_pc;
|
|
|
|
/* True when trace output should be displayed whenever program stops. */
|
|
|
|
static int trace_display;
|
|
|
|
/* True when trace listing should include source lines. */
|
|
|
|
static int default_trace_show_source = 1;
|
|
|
|
struct trace_buffer {
|
|
int size;
|
|
short *counts;
|
|
CORE_ADDR *addrs;
|
|
} trace_data;
|
|
|
|
static void
|
|
trace_command (args, from_tty)
|
|
char *args;
|
|
int from_tty;
|
|
{
|
|
/* Clear the host-side trace buffer, allocating space if needed. */
|
|
trace_data.size = 0;
|
|
if (trace_data.counts == NULL)
|
|
trace_data.counts = (short *) xmalloc (65536 * sizeof(short));
|
|
if (trace_data.addrs == NULL)
|
|
trace_data.addrs = (CORE_ADDR *) xmalloc (65536 * sizeof(CORE_ADDR));
|
|
|
|
tracing = 1;
|
|
|
|
printf_filtered ("Tracing is now on.\n");
|
|
}
|
|
|
|
static void
|
|
untrace_command (args, from_tty)
|
|
char *args;
|
|
int from_tty;
|
|
{
|
|
tracing = 0;
|
|
|
|
printf_filtered ("Tracing is now off.\n");
|
|
}
|
|
|
|
static void
|
|
trace_info (args, from_tty)
|
|
char *args;
|
|
int from_tty;
|
|
{
|
|
int i;
|
|
|
|
if (trace_data.size)
|
|
{
|
|
printf_filtered ("%d entries in trace buffer:\n", trace_data.size);
|
|
|
|
for (i = 0; i < trace_data.size; ++i)
|
|
{
|
|
printf_filtered ("%d: %d instruction%s at 0x%x\n",
|
|
i, trace_data.counts[i],
|
|
(trace_data.counts[i] == 1 ? "" : "s"),
|
|
trace_data.addrs[i]);
|
|
}
|
|
}
|
|
else
|
|
printf_filtered ("No entries in trace buffer.\n");
|
|
|
|
printf_filtered ("Tracing is currently %s.\n", (tracing ? "on" : "off"));
|
|
}
|
|
|
|
/* Print the instruction at address MEMADDR in debugged memory,
|
|
on STREAM. Returns length of the instruction, in bytes. */
|
|
|
|
static int
|
|
print_insn (memaddr, stream)
|
|
CORE_ADDR memaddr;
|
|
GDB_FILE *stream;
|
|
{
|
|
/* If there's no disassembler, something is very wrong. */
|
|
if (tm_print_insn == NULL)
|
|
abort ();
|
|
|
|
if (TARGET_BYTE_ORDER == BIG_ENDIAN)
|
|
tm_print_insn_info.endian = BFD_ENDIAN_BIG;
|
|
else
|
|
tm_print_insn_info.endian = BFD_ENDIAN_LITTLE;
|
|
return (*tm_print_insn) (memaddr, &tm_print_insn_info);
|
|
}
|
|
|
|
void
|
|
d10v_eva_prepare_to_trace ()
|
|
{
|
|
if (!tracing)
|
|
return;
|
|
|
|
last_pc = read_register (PC_REGNUM);
|
|
}
|
|
|
|
/* Collect trace data from the target board and format it into a form
|
|
more useful for display. */
|
|
|
|
void
|
|
d10v_eva_get_trace_data ()
|
|
{
|
|
int count, i, j, oldsize;
|
|
int trace_addr, trace_seg, trace_cnt, next_cnt;
|
|
unsigned int last_trace, trace_word, next_word;
|
|
unsigned int *tmpspace;
|
|
|
|
if (!tracing)
|
|
return;
|
|
|
|
tmpspace = xmalloc (65536 * sizeof(unsigned int));
|
|
|
|
last_trace = read_memory_unsigned_integer (DBBC_ADDR, 2) << 2;
|
|
|
|
/* Collect buffer contents from the target, stopping when we reach
|
|
the word recorded when execution resumed. */
|
|
|
|
count = 0;
|
|
while (last_trace > 0)
|
|
{
|
|
QUIT;
|
|
trace_word =
|
|
read_memory_unsigned_integer (TRACE_BUFFER_BASE + last_trace, 4);
|
|
trace_addr = trace_word & 0xffff;
|
|
last_trace -= 4;
|
|
/* Ignore an apparently nonsensical entry. */
|
|
if (trace_addr == 0xffd5)
|
|
continue;
|
|
tmpspace[count++] = trace_word;
|
|
if (trace_addr == last_pc)
|
|
break;
|
|
if (count > 65535)
|
|
break;
|
|
}
|
|
|
|
/* Move the data to the host-side trace buffer, adjusting counts to
|
|
include the last instruction executed and transforming the address
|
|
into something that GDB likes. */
|
|
|
|
for (i = 0; i < count; ++i)
|
|
{
|
|
trace_word = tmpspace[i];
|
|
next_word = ((i == 0) ? 0 : tmpspace[i - 1]);
|
|
trace_addr = trace_word & 0xffff;
|
|
next_cnt = (next_word >> 24) & 0xff;
|
|
j = trace_data.size + count - i - 1;
|
|
trace_data.addrs[j] = (trace_addr << 2) + 0x1000000;
|
|
trace_data.counts[j] = next_cnt + 1;
|
|
}
|
|
|
|
oldsize = trace_data.size;
|
|
trace_data.size += count;
|
|
|
|
free (tmpspace);
|
|
|
|
if (trace_display)
|
|
display_trace (oldsize, trace_data.size);
|
|
}
|
|
|
|
static void
|
|
tdisassemble_command (arg, from_tty)
|
|
char *arg;
|
|
int from_tty;
|
|
{
|
|
int i, count;
|
|
CORE_ADDR low, high;
|
|
char *space_index;
|
|
|
|
if (!arg)
|
|
{
|
|
low = 0;
|
|
high = trace_data.size;
|
|
}
|
|
else if (!(space_index = (char *) strchr (arg, ' ')))
|
|
{
|
|
low = parse_and_eval_address (arg);
|
|
high = low + 5;
|
|
}
|
|
else
|
|
{
|
|
/* Two arguments. */
|
|
*space_index = '\0';
|
|
low = parse_and_eval_address (arg);
|
|
high = parse_and_eval_address (space_index + 1);
|
|
if (high < low)
|
|
high = low;
|
|
}
|
|
|
|
printf_filtered ("Dump of trace from %d to %d:\n", low, high);
|
|
|
|
display_trace (low, high);
|
|
|
|
printf_filtered ("End of trace dump.\n");
|
|
gdb_flush (gdb_stdout);
|
|
}
|
|
|
|
static void
|
|
display_trace (low, high)
|
|
int low, high;
|
|
{
|
|
int i, count, trace_show_source, first, suppress;
|
|
CORE_ADDR next_address;
|
|
|
|
trace_show_source = default_trace_show_source;
|
|
if (!have_full_symbols () && !have_partial_symbols())
|
|
{
|
|
trace_show_source = 0;
|
|
printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
|
|
printf_filtered ("Trace will not display any source.\n");
|
|
}
|
|
|
|
first = 1;
|
|
suppress = 0;
|
|
for (i = low; i < high; ++i)
|
|
{
|
|
next_address = trace_data.addrs[i];
|
|
count = trace_data.counts[i];
|
|
while (count-- > 0)
|
|
{
|
|
QUIT;
|
|
if (trace_show_source)
|
|
{
|
|
struct symtab_and_line sal, sal_prev;
|
|
|
|
sal_prev = find_pc_line (next_address - 4, 0);
|
|
sal = find_pc_line (next_address, 0);
|
|
|
|
if (sal.symtab)
|
|
{
|
|
if (first || sal.line != sal_prev.line)
|
|
print_source_lines (sal.symtab, sal.line, sal.line + 1, 0);
|
|
suppress = 0;
|
|
}
|
|
else
|
|
{
|
|
if (!suppress)
|
|
/* FIXME-32x64--assumes sal.pc fits in long. */
|
|
printf_filtered ("No source file for address %s.\n",
|
|
local_hex_string((unsigned long) sal.pc));
|
|
suppress = 1;
|
|
}
|
|
}
|
|
first = 0;
|
|
print_address (next_address, gdb_stdout);
|
|
printf_filtered (":");
|
|
printf_filtered ("\t");
|
|
wrap_here (" ");
|
|
next_address = next_address + print_insn (next_address, gdb_stdout);
|
|
printf_filtered ("\n");
|
|
gdb_flush (gdb_stdout);
|
|
}
|
|
}
|
|
}
|
|
|
|
extern void (*target_resume_hook) PARAMS ((void));
|
|
extern void (*target_wait_loop_hook) PARAMS ((void));
|
|
|
|
void
|
|
_initialize_d10v_tdep ()
|
|
{
|
|
tm_print_insn = print_insn_d10v;
|
|
|
|
target_resume_hook = d10v_eva_prepare_to_trace;
|
|
target_wait_loop_hook = d10v_eva_get_trace_data;
|
|
|
|
add_com ("regs", class_vars, show_regs, "Print all registers");
|
|
|
|
add_com ("trace", class_support, trace_command,
|
|
"Enable tracing of instruction execution.");
|
|
|
|
add_com ("untrace", class_support, untrace_command,
|
|
"Disable tracing of instruction execution.");
|
|
|
|
add_com ("tdisassemble", class_vars, tdisassemble_command,
|
|
"Disassemble the trace buffer.\n\
|
|
Two optional arguments specify a range of trace buffer entries\n\
|
|
as reported by info trace (NOT addresses!).");
|
|
|
|
add_info ("trace", trace_info,
|
|
"Display info about the trace data buffer.");
|
|
|
|
add_show_from_set (add_set_cmd ("tracedisplay", no_class,
|
|
var_integer, (char *)&trace_display,
|
|
"Set automatic display of trace.\n", &setlist),
|
|
&showlist);
|
|
add_show_from_set (add_set_cmd ("tracesource", no_class,
|
|
var_integer, (char *)&default_trace_show_source,
|
|
"Set display of source code with trace.\n", &setlist),
|
|
&showlist);
|
|
|
|
}
|