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2022-02-01 Ali Lown <ali.lown@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> Dragan Mladjenovic <dragan.mladjenovic@rt-rk.com> Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21, EXTEND26): New macros. sim/mips/ChangeLog: * Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen. * configure: Regenerate. * configure.ac: Support mipsisa32r6 and mipsisa64r6. (sim_engine_run): Pick simulator model from processor specified in e_flags. * cp1.c (value_fpr): Handle fmt_dc32. (fp_unary, fp_binary): Zero initialize locals. (update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac, fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New functions. (sim_fpu_class_mips_mapping): New. * cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define. * interp.c (MIPSR6_P): New. (load_word): Allow unaligned memory access for MIPSR6. * micromips.igen (sc, scd): Adapt to new do_sc* helper signature. * mips.igen: Add *r6 models. (signal_if_cti, forbiddenslot32): New helpers. (delayslot32): Use signal_if_cti. (do_sc, do_scd); Add store_ll_bit parameter. (sc, scd): Adapt to previous change. (nal, beq, bal): New definitions for *r6. (sll): Split nop and ssnop cases into ... (nop, ssnop): New definitions. (loadstore_ea): Use the 32-bit compatibility adressing. (cache): Split logic into ... (do_cache): New helper. (check_fpu): Select IEEE 754-2008 mode for R6. (not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add, li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd, daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra, dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr, jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror, rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav, srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt, tltu, tne, xor, xori, check_fmt_p, do_load_double, do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT, cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1, dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT, mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT, sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f, bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp, tlbr, tlbwi, tlbwr): Enable on *r6 models. * mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu, dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr, wsbh): Likewise. * mips3264r6.igen: New file. * sim-main.h (FP_formats): Add fmt_dc32. (FORBIDDEN_SLOT): New macros. (simFORBIDDENSLOT, FP_R6CMP_*, FP_R6CLASS_*): New defines. (fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New declarations. (R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA, MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping previous declarations. sim/testsuite/mips/ChangeLog: * basic.exp: Add r6-*.s tests. (run_r6_removed_test): New function. (run_endian_tests): New function. * hilo-hazard-3.s: Skip for mips*r6. * r2-fpu.s: New test. * r6-64.s: New test. * r6-branch.s: New test. * r6-forbidden.s: New test. * r6-fpu.s: New test. * r6-llsc-dp.s: New test. * r6-llsc-wp.s: New test. * r6-removed.csv: New test. * r6-removed.s: New test. * r6.s: New test. * utils-r6.inc: New inc.
170 lines
5.1 KiB
Plaintext
170 lines
5.1 KiB
Plaintext
# MIPS simulator instruction tests
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sim_init
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# Do "run_sim_test TESTFILE MODELS" for each combination of the
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# mf{lo,hi} -> mult/div/mt{lo,hi} hazard described in mips.igen.
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# Insert NOPS nops after the mflo or mfhi.
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proc run_hilo_test {testfile models nops} {
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foreach reg {lo hi} {
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foreach insn "{mult\t\$4,\$4} {div\t\$0,\$4,\$4} {mt$reg\t\$4}" {
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set contents ""
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append contents "\t.macro hilo\n"
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append contents "\tmf$reg\t\$4\n"
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append contents "\t.rept\t$nops\n"
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append contents "\tnop\n"
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append contents "\t.endr\n"
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append contents "\t$insn\n"
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append contents "\t.endm"
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verbose -log "HILO test:\n$contents"
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set file [open hilo-hazard.inc w]
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puts $file $contents
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close $file
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run_sim_test $testfile $models
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}
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}
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}
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# Runs micromips tests by adding -mmicromips to as options
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proc run_micromips_test { name requested_machs } {
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global ASFLAGS_FOR_TARGET
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set ASFLAGS_FOR_TARGET "-mmicromips"
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run_sim_test $name $requested_machs
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unset ASFLAGS_FOR_TARGET
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}
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# Runs endian tests
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proc run_endian_tests { name requested_machs } {
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global ASFLAGS_FOR_TARGET
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global LDFLAGS_FOR_TARGET
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run_sim_test $name $requested_machs
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set ASFLAGS_FOR_TARGET "-EL"
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set LDFLAGS_FOR_TARGET "-EL"
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run_sim_test $name $requested_machs
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unset ASFLAGS_FOR_TARGET
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unset LDFLAGS_FOR_TARGET
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}
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# Runs all specified tests
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proc run_sim_tests { name requested_machs { requested_micromips_machs "" } } {
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run_sim_test $name $requested_machs
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run_micromips_test $name $requested_micromips_machs
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}
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# Runs the combination of instructions removed in R6 through the testsuite
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proc run_r6_removed_test {testfile models} {
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global subdir srcdir
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set fd [open "$srcdir/$subdir/r6-removed.csv" r]
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set file_data [read $fd]
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close $fd
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set data [split $file_data "\n"]
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foreach line $data {
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set line_contents [split $line ","]
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set mnemonic [lindex $line_contents 0]
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set insn [lindex $line_contents 1]
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if {[string compare $insn ""] == 1} {
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set contents ""
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append contents ".macro removed_instr\n"
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append contents ".word $insn\n"
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append contents "nop\n"
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append contents ".endm"
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verbose -log "r6-removed test: $mnemonic\n$contents"
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set file [open r6-removed.inc w]
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puts $file $contents
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close $file
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run_sim_test $testfile $models
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}
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}
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}
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if {[istarget *]} {
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# Used to locate the `run` program.
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global arch
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set arch "mips"
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set dspmodels ""
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set mdmxmodels ""
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set micromipsmodels ""
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set micromipsdspmodels ""
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if {[istarget mipsisa64sb1*-*-elf]} {
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set models "sb1"
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set submodels "mips1 mips2 mips3 mips4 mips32 mips64"
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append mdmxmodels " mips64"
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} elseif {[istarget mipsisa64r6*-*-elf]} {
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set models "mips32r6 mips64r6"
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set submodels ""
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} elseif {[istarget mipsisa64*-*-elf]} {
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set models "mips32 mips64 mips32r2 mips64r2"
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set submodels "mips1 mips2 mips3 mips4"
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append dspmodels " mips32r2 mips64r2"
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append mdmxmodels " mips64 mips32r2 mips64r2"
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} elseif {[istarget mips*-sde-elf*] || [istarget mips*-mti-elf*]} {
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set models "mips32 mips64 mips32r2 mips64r2 mips32r6 mips64r6"
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set submodels ""
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append dspmodels " mips32r2 mips64r2 mips32r6 mips64r6"
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append mdmxmodels " mips64 mips32r2 mips64r2 mips32r6 mips64r6"
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append micromipsmodels " mips32r2 mips64r2"
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append micromipsdspmodels " mips32r2 mips64r2"
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} elseif {[istarget mipsisa32r6*-*-elf]} {
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set models "mips32r6"
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set submodels ""
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} elseif {[istarget mipsisa32*-*-elf]} {
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set models "mips32 mips32r2"
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set submodels "mips1 mips2"
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append dspmodels " mips32r2"
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append mdmxmodels " mips32r2"
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append micromipsmodels " mips32r2"
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append micromipsdspmodels " mips32r2"
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} elseif {[istarget mips64vr*-*-elf]} {
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set models "vr4100 vr4111 vr4120 vr5000 vr5400 vr5500"
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set submodels "mips1 mips2 mips3 mips4"
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} elseif {[istarget mips64*-*-elf]} {
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set models "mips3"
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set submodels "mips1 mips2"
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} else {
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# fall back to just testing mips1 code.
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set models "mips1"
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set submodels ""
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}
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append submodels " " $models
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set cpu_option -march
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run_sim_tests sanity.s $submodels $micromipsmodels
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foreach nops {0 1} {
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run_hilo_test hilo-hazard-1.s $models $nops
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run_hilo_test hilo-hazard-2.s $models $nops
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}
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run_hilo_test hilo-hazard-3.s $models 2
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run_hilo_test hilo-hazard-4.s $micromipsmodels 2
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run_sim_test fpu64-ps.s $submodels
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run_sim_test fpu64-ps-sb1.s $submodels
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run_sim_test mdmx-ob.s $mdmxmodels
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run_sim_test mdmx-ob-sb1.s $mdmxmodels
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run_sim_tests mips32-dsp.s $dspmodels $micromipsdspmodels
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run_sim_tests mips32-dsp2.s $dspmodels $micromipsdspmodels
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run_sim_test r2-fpu.s $models
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run_sim_test r6-fpu.s $models
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run_sim_test r6.s $models
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run_sim_test r6-forbidden.s $models
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run_r6_removed_test r6-removed.s $models
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run_sim_test r6-64.s $models
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run_sim_test r6-branch.s $models
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run_endian_tests r6-llsc-wp.s $models
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run_endian_tests r6-llsc-dp.s $models
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}
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