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030157d8a6
Needed when building libopcodes.so. bfd/ * bfd.c (_bfd_error_handler): Arrange for this function to be declared in bfd-in2.h. * libbfd-in.h (_bfd_error_handler): Don't declare. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. opcodes/ * sysdep.h (_bfd_error_handler): Don't declare. * msp430-decode.opc: Include bfd.h. Don't include ansidecl.h here. * rl78-decode.opc: Likewise. * msp430-decode.c: Regenerate. * rl78-decode.c: Regenerate.
593 lines
13 KiB
C
593 lines
13 KiB
C
/* -*- c -*- */
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/* Copyright (C) 2013-2018 Free Software Foundation, Inc.
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Contributed by Red Hat.
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Written by DJ Delorie.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include "bfd.h"
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#include "opintl.h"
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#include "opcode/msp430-decode.h"
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static int trace = 0;
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typedef struct
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{
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MSP430_Opcode_Decoded *msp430;
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int (*getbyte)(void *);
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void *ptr;
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unsigned char *op;
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int op_ptr;
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int pc;
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} LocalData;
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#define AU ATTRIBUTE_UNUSED
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#define GETBYTE() getbyte_swapped (ld)
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#define B ((unsigned long) GETBYTE ())
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static int
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getbyte_swapped (LocalData *ld)
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{
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int b;
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if (ld->op_ptr == ld->msp430->n_bytes)
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{
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do
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{
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b = ld->getbyte (ld->ptr);
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ld->op [(ld->msp430->n_bytes++)^1] = b;
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}
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while (ld->msp430->n_bytes & 1);
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}
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return ld->op[ld->op_ptr++];
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}
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#define ID(x) msp430->id = x
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#define OP(n, t, r, a) (msp430->op[n].type = t, \
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msp430->op[n].reg = r, \
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msp430->op[n].addend = a)
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#define OPX(n, t, r1, r2, a) \
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(msp430->op[n].type = t, \
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msp430->op[n].reg = r1, \
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msp430->op[n].reg2 = r2, \
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msp430->op[n].addend = a)
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#define SYNTAX(x) msp430->syntax = x
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#define UNSUPPORTED() msp430->syntax = "*unknown*"
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#define DC(c) OP (0, MSP430_Operand_Immediate, 0, c)
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#define DR(r) OP (0, MSP430_Operand_Register, r, 0)
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#define DM(r, a) OP (0, MSP430_Operand_Indirect, r, a)
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#define DA(a) OP (0, MSP430_Operand_Indirect, MSR_None, a)
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#define AD(r, ad) encode_ad (r, ad, ld, 0)
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#define ADX(r, ad, x) encode_ad (r, ad, ld, x)
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#define SC(c) OP (1, MSP430_Operand_Immediate, 0, c)
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#define SR(r) OP (1, MSP430_Operand_Register, r, 0)
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#define SM(r, a) OP (1, MSP430_Operand_Indirect, r, a)
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#define SA(a) OP (1, MSP430_Operand_Indirect, MSR_None, a)
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#define SI(r) OP (1, MSP430_Operand_Indirect_Postinc, r, 0)
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#define AS(r, as) encode_as (r, as, ld, 0)
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#define ASX(r, as, x) encode_as (r, as, ld, x)
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#define BW(x) msp430->size = (x ? 8 : 16)
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/* The last 20 is for SWPBX.Z and SXTX.A. */
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#define ABW(a,x) msp430->size = (a ? ((x ? 8 : 16)) : (x ? 20 : 20))
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#define IMMU(bytes) immediate (bytes, 0, ld)
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#define IMMS(bytes) immediate (bytes, 1, ld)
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/* Helper macros for known status bits settings. */
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#define F_____ msp430->flags_1 = msp430->flags_0 = 0; msp430->flags_set = 0
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#define F_VNZC msp430->flags_1 = msp430->flags_0 = 0; msp430->flags_set = 0x87
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#define F_0NZC msp430->flags_1 = 0; msp430->flags_0 = 0x80; msp430->flags_set = 0x07
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/* The chip is little-endian, but GETBYTE byte-swaps words because the
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decoder is based on 16-bit "words" so *this* logic is big-endian. */
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static int
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immediate (int bytes, int sign_extend, LocalData *ld)
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{
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unsigned long i = 0;
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switch (bytes)
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{
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case 1:
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i |= B;
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if (sign_extend && (i & 0x80))
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i -= 0x100;
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break;
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case 2:
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i |= B << 8;
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i |= B;
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if (sign_extend && (i & 0x8000))
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i -= 0x10000;
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break;
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case 3:
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i |= B << 16;
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i |= B << 8;
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i |= B;
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if (sign_extend && (i & 0x800000))
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i -= 0x1000000;
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break;
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case 4:
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i |= B << 24;
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i |= B << 16;
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i |= B << 8;
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i |= B;
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if (sign_extend && (i & 0x80000000ULL))
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i -= 0x100000000ULL;
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break;
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default:
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opcodes_error_handler
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(_("internal error: immediate() called with invalid byte count %d"),
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bytes);
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abort ();
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}
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return i;
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}
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/*
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PC SP SR CG
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As
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00 Rn - - R2 #0
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01 X(Rn) Sym - X(abs) #1
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10 (Rn) - - #4 #2
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11 (Rn++) #imm - #8 #-1
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Ad
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0 Rn - - - -
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1 X(Rn) Sym - X(abs) - */
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static void
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encode_ad (int reg, int ad, LocalData *ld, int ext)
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{
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MSP430_Opcode_Decoded *msp430 = ld->msp430;
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if (ad)
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{
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int x = IMMU(2) | (ext << 16);
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switch (reg)
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{
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case 0: /* (PC) -> Symbolic. */
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DA (x + ld->pc + ld->op_ptr - 2);
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break;
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case 2: /* (SR) -> Absolute. */
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DA (x);
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break;
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default:
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DM (reg, x);
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break;
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}
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}
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else
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{
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DR (reg);
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}
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}
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static void
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encode_as (int reg, int as, LocalData *ld, int ext)
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{
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MSP430_Opcode_Decoded *msp430 = ld->msp430;
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int x;
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switch (as)
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{
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case 0:
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switch (reg)
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{
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case 3:
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SC (0);
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break;
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default:
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SR (reg);
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break;
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}
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break;
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case 1:
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switch (reg)
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{
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case 0: /* PC -> Symbolic. */
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x = IMMU(2) | (ext << 16);
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SA (x + ld->pc + ld->op_ptr - 2);
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break;
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case 2: /* SR -> Absolute. */
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x = IMMU(2) | (ext << 16);
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SA (x);
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break;
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case 3:
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SC (1);
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break;
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default:
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x = IMMU(2) | (ext << 16);
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SM (reg, x);
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break;
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}
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break;
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case 2:
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switch (reg)
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{
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case 2:
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SC (4);
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break;
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case 3:
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SC (2);
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break;
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case MSR_None:
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SA (0);
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break;
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default:
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SM (reg, 0);
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break;
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}
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break;
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case 3:
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switch (reg)
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{
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case 0:
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{
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/* This fetch *is* the *PC++ that the opcode encodes :-) */
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x = IMMU(2) | (ext << 16);
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SC (x);
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}
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break;
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case 2:
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SC (8);
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break;
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case 3:
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SC (-1);
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break;
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default:
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SI (reg);
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break;
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}
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break;
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}
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}
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static void
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encode_rep_zc (int srxt, int dsxt, LocalData *ld)
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{
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MSP430_Opcode_Decoded *msp430 = ld->msp430;
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msp430->repeat_reg = srxt & 1;
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msp430->repeats = dsxt;
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msp430->zc = (srxt & 2) ? 1 : 0;
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}
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#define REPZC(s,d) encode_rep_zc (s, d, ld)
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static int
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dopc_to_id (int dopc)
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{
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switch (dopc)
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{
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case 4: return MSO_mov;
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case 5: return MSO_add;
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case 6: return MSO_addc;
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case 7: return MSO_subc;
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case 8: return MSO_sub;
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case 9: return MSO_cmp;
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case 10: return MSO_dadd;
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case 11: return MSO_bit;
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case 12: return MSO_bic;
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case 13: return MSO_bis;
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case 14: return MSO_xor;
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case 15: return MSO_and;
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default: return MSO_unknown;
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}
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}
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static int
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sopc_to_id (int sop, int c)
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{
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switch (sop * 2 + c)
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{
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case 0: return MSO_rrc;
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case 1: return MSO_swpb;
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case 2: return MSO_rra;
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case 3: return MSO_sxt;
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case 4: return MSO_push;
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case 5: return MSO_call;
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case 6: return MSO_reti;
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default: return MSO_unknown;
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}
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}
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int
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msp430_decode_opcode (unsigned long pc,
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MSP430_Opcode_Decoded *msp430,
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int (*getbyte)(void *),
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void *ptr)
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{
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LocalData lds, *ld = &lds;
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unsigned char op_buf[20] = {0};
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unsigned char *op = op_buf;
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int raddr;
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int al_bit;
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int srxt_bits, dsxt_bits;
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lds.msp430 = msp430;
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lds.getbyte = getbyte;
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lds.ptr = ptr;
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lds.op = op;
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lds.op_ptr = 0;
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lds.pc = pc;
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memset (msp430, 0, sizeof (*msp430));
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/* These are overridden by an extension word. */
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al_bit = 1;
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srxt_bits = 0;
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dsxt_bits = 0;
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post_extension_word:
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;
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/* 430X extention word. */
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/** 0001 1srx t l 00 dsxt 430x */
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al_bit = l;
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srxt_bits = srx * 2 + t;
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dsxt_bits = dsxt;
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op = op_buf + lds.op_ptr;
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msp430->ofs_430x = 1;
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goto post_extension_word;
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/* double-op insns:
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opcode:4 sreg:4 Ad:1 BW:1 As:2 Dreg:4
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single-op insn:
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opcode:9 BW:1 Ad:2 DSreg:4
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jumps:
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opcode:3 Cond:3 pcrel:10. */
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/* Double-Operand "opcode" fields. */
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/** VARY dopc 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 */
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/** dopc sreg a b as dreg %D%b %1,%0 */
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ID (dopc_to_id (dopc)); ASX (sreg, as, srxt_bits); ADX (dreg, a, dsxt_bits); ABW (al_bit, b);
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if (a == 0 && as == 0)
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REPZC (srxt_bits, dsxt_bits);
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switch (msp430->id)
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{
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case MSO_mov: F_____; break;
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case MSO_add: F_VNZC; break;
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case MSO_addc: F_VNZC; break;
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case MSO_subc: F_VNZC; break;
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case MSO_sub: F_VNZC; break;
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case MSO_cmp: F_VNZC; break;
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case MSO_dadd: F_VNZC; break;
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case MSO_bit: F_0NZC; break;
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case MSO_bic: F_____; break;
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case MSO_bis: F_____; break;
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case MSO_xor: F_VNZC; break;
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case MSO_and: F_0NZC; break;
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default: break;
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}
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/** 0001 00so c b ad dreg %S%b %1 */
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ID (sopc_to_id (so,c)); ASX (dreg, ad, srxt_bits); ABW (al_bit, b);
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if (ad == 0)
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REPZC (srxt_bits, dsxt_bits);
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/* The helper functions encode for source, but it's
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both source and dest, with a few documented exceptions. */
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msp430->op[0] = msp430->op[1];
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/* RETI ignores the operand. */
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if (msp430->id == MSO_reti)
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msp430->syntax = "%S";
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switch (msp430->id)
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{
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case MSO_rrc: F_VNZC; break;
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case MSO_swpb: F_____; break;
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case MSO_rra: F_0NZC; break;
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case MSO_sxt: F_0NZC; break;
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case MSO_push: F_____; break;
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case MSO_call: F_____; break;
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case MSO_reti: F_VNZC; break;
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default: break;
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}
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/* 20xx 0010 0000 ---- ----
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3cxx 0011 1100 ---- ----
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001j mp-- ---- ----. */
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/** 001jmp aa addrlsbs %J %1 */
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raddr = (aa << 9) | (addrlsbs << 1);
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if (raddr & 0x400)
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raddr = raddr - 0x800;
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/* This is a pc-relative jump, but we don't use SM because that
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would load the target address from the memory at X(PC), not use
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PC+X *as* the address. So we use SC to use the address, not the
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data at that address. */
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ID (MSO_jmp); SC (pc + raddr + msp430->n_bytes);
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msp430->cond = jmp;
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/* Extended instructions. */
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/** 0000 srcr 0000 dstr MOVA @%1, %0 */
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ID (MSO_mov); SM (srcr, 0); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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/** 0000 srcr 0001 dstr MOVA @%1+, %0 */
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ID (MSO_mov); SI (srcr); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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/** 0000 srcr 0010 dstr MOVA &%1, %0 */
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ID (MSO_mov); SA ((srcr << 16) + IMMU(2)); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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/** 0000 srcr 0011 dstr MOVA %1, %0 */
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ID (MSO_mov); SM (srcr, IMMS(2)); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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/** 0000 srcr 0110 dstr MOVA %1, &%0 */
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ID (MSO_mov); SR (srcr); DA ((dstr << 16) + IMMU(2));
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msp430->size = 20;
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msp430->ofs_430x = 1;
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/** 0000 srcr 0111 dstr MOVA %1, &%0 */
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ID (MSO_mov); SR (srcr); DM (dstr, IMMS(2));
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msp430->size = 20;
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msp430->ofs_430x = 1;
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/** 0000 srcr 1000 dstr MOVA %1, %0 */
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ID (MSO_mov); SC ((srcr << 16) + IMMU(2)); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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/** 0000 srcr 1001 dstr CMPA %1, %0 */
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ID (MSO_cmp); SC ((srcr << 16) + IMMU(2)); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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F_VNZC;
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/** 0000 srcr 1010 dstr ADDA %1, %0 */
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ID (MSO_add); SC ((srcr << 16) + IMMU(2)); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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F_VNZC;
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/** 0000 srcr 1011 dstr SUBA %1, %0 */
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ID (MSO_sub); SC ((srcr << 16) + IMMU(2)); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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F_VNZC;
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/** 0000 srcr 1011 dstr SUBA %1, %0 */
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ID (MSO_sub); SC ((srcr << 16) + IMMU(2)); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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F_VNZC;
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/** 0000 srcr 1100 dstr MOVA %1, %0 */
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ID (MSO_mov); SR (srcr); DR (dstr);
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msp430->size = 20;
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msp430->ofs_430x = 1;
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|
|
|
/** 0000 srcr 1101 dstr CMPA %1, %0 */
|
|
ID (MSO_cmp); SR (srcr); DR (dstr);
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
F_VNZC;
|
|
|
|
/** 0000 srcr 1110 dstr ADDA %1, %0 */
|
|
ID (MSO_add); SR (srcr); DR (dstr);
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
F_VNZC;
|
|
|
|
/** 0000 srcr 1111 dstr SUBA %1, %0 */
|
|
ID (MSO_sub); SR (srcr); DR (dstr);
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
F_VNZC;
|
|
|
|
/** 0000 bt00 010w dstr RRCM.A %c, %0 */
|
|
ID (MSO_rrc); DR (dstr); SR (dstr);
|
|
msp430->repeats = bt;
|
|
msp430->size = w ? 16 : 20;
|
|
msp430->ofs_430x = 1;
|
|
F_0NZC;
|
|
|
|
/** 0000 bt01 010w dstr RRAM.A %c, %0 */
|
|
ID (MSO_rra); DR (dstr); SR (dstr);
|
|
msp430->repeats = bt;
|
|
msp430->size = w ? 16 : 20;
|
|
msp430->ofs_430x = 1;
|
|
F_0NZC;
|
|
|
|
/** 0000 bt10 010w dstr RLAM.A %c, %0 */
|
|
ID (MSO_add); DR (dstr); SR (dstr);
|
|
msp430->repeats = bt;
|
|
msp430->size = w ? 16 : 20;
|
|
msp430->ofs_430x = 1;
|
|
F_0NZC;
|
|
|
|
/** 0000 bt11 010w dstr RRUM.A %c, %0 */
|
|
ID (MSO_rru); DR (dstr); SR (dstr);
|
|
msp430->repeats = bt;
|
|
msp430->size = w ? 16 : 20;
|
|
msp430->ofs_430x = 1;
|
|
F_0NZC;
|
|
|
|
/** 0001 0011 0000 0000 RETI */
|
|
ID (MSO_reti);
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
|
|
/** 0001 0011 01as dstr CALLA %0 */
|
|
ID (MSO_call); AS (dstr, as);
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
|
|
/** 0001 0011 1000 extb CALLA %0 */
|
|
ID (MSO_call); SA (IMMU(2) | (extb << 16));
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
|
|
/** 0001 0011 1001 extb CALLA %0 */
|
|
raddr = IMMU(2) | (extb << 16);
|
|
if (raddr & 0x80000)
|
|
raddr -= 0x100000;
|
|
ID (MSO_call); SA (pc + raddr + msp430->n_bytes);
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
|
|
/** 0001 0011 1011 extb CALLA %0 */
|
|
ID (MSO_call); SC (IMMU(2) | (extb << 16));
|
|
msp430->size = 20;
|
|
msp430->ofs_430x = 1;
|
|
|
|
/** 0001 010w bits srcr PUSHM.A %0 */
|
|
ID (MSO_push); SR (srcr);
|
|
msp430->size = w ? 16 : 20;
|
|
msp430->repeats = bits;
|
|
msp430->ofs_430x = 1;
|
|
|
|
/** 0001 011w bits dstr POPM.A %0 */
|
|
ID (MSO_pop); DR (dstr);
|
|
msp430->size = w ? 16 : 20;
|
|
msp430->repeats = bits;
|
|
msp430->ofs_430x = 1;
|
|
|
|
/** */
|
|
|
|
return msp430->n_bytes;
|
|
}
|