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The AArch64 disassembler has an optimization that it uses to reduce the amount it has to search for mapping symbols during disassembly. This optimization assumes that sections are listed in the section header in monotonic increasing VMAs. However this is not a requirement for the ELF specification. Because of this when such "out of order" sections occur the disassembler would pick the wrong mapping symbol to disassemble the section with. This fixes it by explicitly passing along the stop offset for the current disassembly glob and when this changes compared to the previous one we've seen the optimization won't be performed. In effect this restarts the search from a well defined starting point. Usually the symbol's address. The existing stop_vma can't be used for this as it is allowed to be unset and setting this unconditionally would change the semantics of this field. binutils/ChangeLog: * objdump.c (disassemble_bytes): Pass stop_offset. * testsuite/binutils-all/aarch64/out-of-order.T: New test. * testsuite/binutils-all/aarch64/out-of-order.d: New test. * testsuite/binutils-all/aarch64/out-of-order.s: New test. include/ChangeLog: * dis-asm.h (struct disassemble_info): Add stop_offset. opcodes/ChangeLog: * aarch64-dis.c (last_stop_offset): New. (print_insn_aarch64): Use stop_offset.
159 lines
4.5 KiB
Plaintext
159 lines
4.5 KiB
Plaintext
2019-03-25 Tamar Christina <tamar.christina@arm.com>
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* aarch64-dis.c (last_stop_offset): New.
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(print_insn_aarch64): Use stop_offset.
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2019-03-19 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/24359
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* i386-gen.c (cpu_flag_init): Add CPU_ANY_AVX512F_FLAGS to
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CPU_ANY_AVX2_FLAGS.
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* i386-init.h: Regenerated.
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2019-03-18 H.J. Lu <hongjiu.lu@intel.com>
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PR gas/24348
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* i386-opc.tbl: Add Optimize to vmovdqa32, vmovdqa64, vmovdqu8,
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vmovdqu16, vmovdqu32 and vmovdqu64.
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* i386-tbl.h: Regenerated.
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2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
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* s390-opc.txt: Rename selhhhr to selfhr. Remove optional operand
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from vstrszb, vstrszh, and vstrszf.
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2019-03-12 Andreas Krebbel <krebbel@linux.ibm.com>
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* s390-opc.txt: Add instruction descriptions.
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2019-02-08 Jim Wilson <jimw@sifive.com>
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* riscv-opc.c (riscv_opcodes) <beq>: Use Cz to compress 3 operand form.
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<bne>: Likewise.
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2019-02-07 Tamar Christina <tamar.christina@arm.com>
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* arm-dis.c (arm_opcodes): Redefine hlt to armv1.
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2019-02-07 Tamar Christina <tamar.christina@arm.com>
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PR binutils/23212
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* aarch64-opc.h (enum aarch64_field_kind): Add FLD_sz.
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* aarch64-opc.c (verify_elem_sd): New.
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(fields): Add FLD_sz entr.
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* aarch64-tbl.h (_SIMD_INSN): New.
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(aarch64_opcode_table): Add elem_sd verifier to fmla, fmls, fmul and
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fmulx scalar and vector by element isns.
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2019-02-07 Nick Clifton <nickc@redhat.com>
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* po/sv.po: Updated Swedish translation.
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2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
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* s390-mkopc.c (main): Accept arch13 as cpu string.
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* s390-opc.c: Add new instruction formats and instruction opcode
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masks.
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* s390-opc.txt: Add new arch13 instructions.
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2019-01-25 Sudakshina Das <sudi.das@arm.com>
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* aarch64-tbl.h (QL_LDST_AT): Update macro.
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(aarch64_opcode): Change encoding for stg, stzg
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st2g and st2zg.
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* aarch64-asm-2.c: Regenerated.
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* aarch64-dis-2.c: Regenerated.
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* aarch64-opc-2.c: Regenerated.
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2019-01-25 Sudakshina Das <sudi.das@arm.com>
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* aarch64-asm-2.c: Regenerated.
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* aarch64-dis-2.c: Likewise.
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* aarch64-opc-2.c: Likewise.
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* aarch64-tbl.h (aarch64_opcode): Add new stzgm.
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2019-01-25 Sudakshina Das <sudi.das@arm.com>
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Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
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* aarch64-asm.c (aarch64_ins_addr_simple_2): Remove.
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* aarch64-asm.h (ins_addr_simple_2): Likeiwse.
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* aarch64-dis.c (aarch64_ext_addr_simple_2): Likewise.
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* aarch64-dis.h (ext_addr_simple_2): Likewise.
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* aarch64-opc.c (operand_general_constraint_met_p): Remove
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case for ldstgv_indexed.
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(aarch64_print_operand): Remove case for AARCH64_OPND_ADDR_SIMPLE_2.
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* aarch64-tbl.h (struct aarch64_opcode): Remove ldgv and stgv.
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(AARCH64_OPERANDS): Remove ADDR_SIMPLE_2.
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* aarch64-asm-2.c: Regenerated.
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* aarch64-dis-2.c: Regenerated.
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* aarch64-opc-2.c: Regenerated.
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2019-01-23 Nick Clifton <nickc@redhat.com>
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* po/pt_BR.po: Updated Brazilian Portuguese translation.
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2019-01-21 Nick Clifton <nickc@redhat.com>
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* po/de.po: Updated German translation.
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* po/uk.po: Updated Ukranian translation.
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2019-01-20 Chenghua Xu <paul.hua.gm@gmail.com>
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* mips-dis.c (mips_arch_choices): Fix typo in
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gs464, gs464e and gs264e descriptors.
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2019-01-19 Nick Clifton <nickc@redhat.com>
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* configure: Regenerate.
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* po/opcodes.pot: Regenerate.
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2018-06-24 Nick Clifton <nickc@redhat.com>
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2.32 branch created.
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2019-01-09 John Darrington <john@darrington.wattle.id.au>
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* s12z-dis.c (print_insn_s12z): Do not dereference an operand
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if it is null.
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-dis.c (opr_emit_disassembly): Do not omit an index if it is
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zero.
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2019-01-09 Andrew Paprocki <andrew@ishiboo.com>
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* configure: Regenerate.
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2019-01-07 Alan Modra <amodra@gmail.com>
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* configure: Regenerate.
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* po/POTFILES.in: Regenerate.
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2019-01-03 John Darrington <john@darrington.wattle.id.au>
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* s12z-opc.c: New file.
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* s12z-opc.h: New file.
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* s12z-dis.c: Removed all code not directly related to display
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of instructions. Used the interface provided by the new files
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instead.
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* Makefile.am (TARGET_LIBOPCODES_CFILES) Add s12z-opc.c.
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* Makefile.in: Regenerate.
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* configure.ac (bfd_s12z_arch): Correct the dependencies.
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* configure: Regenerate.
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2019-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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For older changes see ChangeLog-2018
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Copyright (C) 2019 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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