mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-27 03:54:41 +08:00
1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
117 lines
3.6 KiB
C
117 lines
3.6 KiB
C
/* Target-dependent code for GNU/Linux on MIPS processors.
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Copyright (C) 2006-2024 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef MIPS_LINUX_TDEP_H
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#define MIPS_LINUX_TDEP_H
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/* Copied from <asm/elf.h>. */
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#define ELF_NGREG 45
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#define ELF_NFPREG 33
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typedef unsigned char mips_elf_greg_t[4];
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typedef mips_elf_greg_t mips_elf_gregset_t[ELF_NGREG];
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typedef unsigned char mips_elf_fpreg_t[8];
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typedef mips_elf_fpreg_t mips_elf_fpregset_t[ELF_NFPREG];
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/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
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#define FPR_BASE 32
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#define PC 64
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#define CAUSE 65
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#define BADVADDR 66
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#define MMHI 67
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#define MMLO 68
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#define FPC_CSR 69
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#define FPC_EIR 70
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#define DSP_BASE 71
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#define DSP_CONTROL 77
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#define EF_REG0 6
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#define EF_REG31 37
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#define EF_LO 38
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#define EF_HI 39
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#define EF_CP0_EPC 40
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#define EF_CP0_BADVADDR 41
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#define EF_CP0_STATUS 42
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#define EF_CP0_CAUSE 43
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#define EF_SIZE 180
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void mips_supply_gregset (struct regcache *, const mips_elf_gregset_t *);
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void mips_fill_gregset (const struct regcache *, mips_elf_gregset_t *, int);
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/* 64-bit support. */
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/* Copied from <asm/elf.h>. */
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#define MIPS64_ELF_NGREG 45
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#define MIPS64_ELF_NFPREG 33
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typedef unsigned char mips64_elf_greg_t[8];
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typedef mips64_elf_greg_t mips64_elf_gregset_t[MIPS64_ELF_NGREG];
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typedef unsigned char mips64_elf_fpreg_t[8];
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typedef mips64_elf_fpreg_t mips64_elf_fpregset_t[MIPS64_ELF_NFPREG];
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/* 0 - 31 are integer registers, 32 - 63 are fp registers. */
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#define MIPS64_FPR_BASE 32
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#define MIPS64_PC 64
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#define MIPS64_CAUSE 65
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#define MIPS64_BADVADDR 66
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#define MIPS64_MMHI 67
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#define MIPS64_MMLO 68
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#define MIPS64_FPC_CSR 69
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#define MIPS64_FPC_EIR 70
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#define MIPS64_EF_REG0 0
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#define MIPS64_EF_REG31 31
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#define MIPS64_EF_LO 32
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#define MIPS64_EF_HI 33
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#define MIPS64_EF_CP0_EPC 34
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#define MIPS64_EF_CP0_BADVADDR 35
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#define MIPS64_EF_CP0_STATUS 36
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#define MIPS64_EF_CP0_CAUSE 37
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#define MIPS64_EF_SIZE 304
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void mips64_supply_gregset (struct regcache *, const mips64_elf_gregset_t *);
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void mips64_fill_gregset (const struct regcache *,
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mips64_elf_gregset_t *, int);
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void mips64_supply_fpregset (struct regcache *,
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const mips64_elf_fpregset_t *);
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void mips64_fill_fpregset (const struct regcache *,
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mips64_elf_fpregset_t *, int);
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enum {
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/* The Linux kernel stores an error code from any interrupted
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syscall in a "register" (in $0's save slot). */
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MIPS_RESTART_REGNUM = 79
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};
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/* Return 1 if MIPS_RESTART_REGNUM is usable. */
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int mips_linux_restart_reg_p (struct gdbarch *gdbarch);
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/* Target descriptions. */
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extern const struct target_desc *tdesc_mips_linux;
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extern const struct target_desc *tdesc_mips64_linux;
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extern const struct target_desc *tdesc_mips_dsp_linux;
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extern const struct target_desc *tdesc_mips64_dsp_linux;
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#endif /* MIPS_LINUX_TDEP_H */
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