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3dcac15f1f
* ns32k-tdep.c (flip_bytes, ns32k_localcount, ns32k_get_enter_addr, sign_extend): Restore functions mysteriously deleted. * ns32knbsd-nat.c: New (?) file to support fetching and storing registers on NetBSD hosts. * nbsd.mh (NATDEPFILES): put ns32knbsd-nat.o instead of ns32k-nat.o * ns32km3-nat.c (reg_offset): Get order of floating point registers correct. Add extra 32382 register offsets. (REG_ADDRESS): define to point at correct part of thread state. Use calls to "warning" instead of "message". * tm-nbsd.h, tm-ns32km3.h (REGISTER_NAMES, NUM_REGS, REGISTER_BYTES, REGISTER_BYTE): redefine allowing for 32382 fpu registers.
184 lines
5.2 KiB
C
184 lines
5.2 KiB
C
/* Low level interface to ns532 running mach 3.0.
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Copyright (C) 1992 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "defs.h"
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#include "inferior.h"
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#include <stdio.h>
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#include <mach.h>
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#include <mach/message.h>
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#include <mach/exception.h>
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#include <mach_error.h>
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#define private static
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/* Find offsets to thread states at compile time.
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* If your compiler does not grok this, calculate offsets
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* offsets yourself and use them (or get a compatible compiler :-)
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*/
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#define REG_N_OFFSET(reg) (int)(&((struct ns532_combined_state *)0)->ts.reg)
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#define REG_F_OFFSET(reg) (int)(&((struct ns532_combined_state *)0)->fs.reg)
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/* at reg_offset[i] is the offset to the ns532_combined_state
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* location where the gdb registers[i] is stored.
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*/
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static int reg_offset[] =
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{
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REG_N_OFFSET(r0), REG_N_OFFSET(r1), REG_N_OFFSET(r2), REG_N_OFFSET(r3),
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REG_N_OFFSET(r4), REG_N_OFFSET(r5), REG_N_OFFSET(r6), REG_N_OFFSET(r7),
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REG_F_OFFSET(l0a), REG_F_OFFSET(l0b),REG_F_OFFSET(l2a),REG_F_OFFSET(l2b),
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REG_F_OFFSET(l4a), REG_F_OFFSET(l4b),REG_F_OFFSET(l6a),REG_F_OFFSET(l6b),
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REG_N_OFFSET(sp), REG_N_OFFSET(fp), REG_N_OFFSET(pc), REG_N_OFFSET(psr),
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REG_F_OFFSET(fsr),
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REG_F_OFFSET(l0a), REG_F_OFFSET(l1a),REG_F_OFFSET(l2a),REG_F_OFFSET(l3a),
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REG_F_OFFSET(l4a), REG_F_OFFSET(l5a),REG_F_OFFSET(l6a),REG_F_OFFSET(l7a),
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};
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#define REG_ADDRESS(state,regnum) ((char *)(state)+reg_offset[regnum])
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/* Fetch COUNT contiguous registers from thread STATE starting from REGNUM
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* Caller knows that the regs handled in one transaction are of same size.
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*/
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#define FETCH_REGS(state, regnum, count) \
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memcpy (®isters[REGISTER_BYTE (regnum)], \
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(char *)state+reg_offset[ regnum ], \
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count*REGISTER_SIZE)
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/* Store COUNT contiguous registers to thread STATE starting from REGNUM */
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#define STORE_REGS(state, regnum, count) \
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memcpy ((char *)state+reg_offset[ regnum ], \
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®isters[REGISTER_BYTE (regnum)], \
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count*REGISTER_SIZE)
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/*
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* Fetch inferiors registers for gdb.
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* REGNO specifies which (as gdb views it) register, -1 for all.
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*/
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void
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fetch_inferior_registers (regno)
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int regno;
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{
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kern_return_t ret;
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thread_state_data_t state;
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unsigned int stateCnt = NS532_COMBINED_STATE_COUNT;
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int index;
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if (! MACH_PORT_VALID (current_thread))
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error ("fetch inferior registers: Invalid thread");
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if (must_suspend_thread)
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setup_thread (current_thread, 1);
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ret = thread_get_state (current_thread,
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NS532_COMBINED_STATE,
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state,
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&stateCnt);
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if (ret != KERN_SUCCESS)
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warning ("fetch_inferior_registers: %s ",
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mach_error_string (ret));
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#if 0
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/* It may be more effective to store validate all of them,
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* since we fetched them all anyway
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*/
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else if (regno != -1)
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supply_register (regno, (char *)state+reg_offset[regno]);
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#endif
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else
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{
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for (index = 0; index < NUM_REGS; index++)
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supply_register (index, (char *)state+reg_offset[index]);
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}
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if (must_suspend_thread)
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setup_thread (current_thread, 0);
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}
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/* Store our register values back into the inferior.
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* If REGNO is -1, do this for all registers.
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* Otherwise, REGNO specifies which register
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*
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* On mach3 all registers are always saved in one call.
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*/
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void
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store_inferior_registers (regno)
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int regno;
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{
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kern_return_t ret;
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thread_state_data_t state;
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unsigned int stateCnt = NS532_COMBINED_STATE_COUNT;
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register int index;
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if (! MACH_PORT_VALID (current_thread))
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error ("store inferior registers: Invalid thread");
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if (must_suspend_thread)
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setup_thread (current_thread, 1);
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/* Fetch the state of the current thread */
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ret = thread_get_state (current_thread,
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NS532_COMBINED_STATE,
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state,
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&stateCnt);
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if (ret != KERN_SUCCESS)
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{
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warning ("store_inferior_registers (get): %s",
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mach_error_string (ret));
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if (must_suspend_thread)
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setup_thread (current_thread, 0);
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return;
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}
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/* move gdb's registers to thread's state
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*
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* Since we save all registers anyway, save the ones
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* that gdb thinks are valid (e.g. ignore the regno
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* parameter)
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*/
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#if 0
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if (regno != -1)
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STORE_REGS (state, regno, 1);
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else
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#endif
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{
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for (index = 0; index < NUM_REGS; index++)
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STORE_REGS (state, index, 1);
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}
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/* Write gdb's current view of register to the thread
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*/
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ret = thread_set_state (current_thread,
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NS532_COMBINED_STATE,
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state,
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NS532_COMBINED_STATE_COUNT);
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if (ret != KERN_SUCCESS)
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warning ("store_inferior_registers (set): %s",
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mach_error_string (ret));
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if (must_suspend_thread)
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setup_thread (current_thread, 0);
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}
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