mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-25 19:14:52 +08:00
e60bb1dd35
* aarch64.h (AARCH64_FEATURE_CRC): New macro. opcodes/ * aarch64-tbl.h (QL_I3SAMEW, QL_I3WWX): New macros. (aarch64_feature_crc): New static. (CRC): New macro. (aarch64_opcode_table): Add entries for the crc32b, crc32h, crc32w, crc32x, crc32cb, crc32ch, crc32cw and crc32cx instructions. * aarch64-asm-2.c: Re-generate. * aarch64-dis-2.c: Ditto. * aarch64-opc-2.c: Ditto. gas/ * config/tc-aarch64.c (aarch64_features): Add the 'crc' option. gas/testsuite/ * gas/aarch64/crc32.s: New test. * gas/aarch64/crc32.d: Ditto.
358 lines
8.8 KiB
C
358 lines
8.8 KiB
C
/* This file is automatically generated by aarch64-gen. Do not edit! */
|
|
/* Copyright 2012, 2013 Free Software Foundation, Inc.
|
|
Contributed by ARM Ltd.
|
|
|
|
This file is part of the GNU opcodes library.
|
|
|
|
This library is free software; you can redistribute it and/or modify
|
|
it under the terms of the GNU General Public License as published by
|
|
the Free Software Foundation; either version 3, or (at your option)
|
|
any later version.
|
|
|
|
It is distributed in the hope that it will be useful, but WITHOUT
|
|
ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
|
or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
|
|
License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with this program; see the file COPYING3. If not,
|
|
see <http://www.gnu.org/licenses/>. */
|
|
|
|
#include "sysdep.h"
|
|
#include "aarch64-asm.h"
|
|
|
|
|
|
const aarch64_opcode *
|
|
aarch64_find_real_opcode (const aarch64_opcode *opcode)
|
|
{
|
|
/* Use the index as the key to locate the real opcode. */
|
|
int key = opcode - aarch64_opcode_table;
|
|
int value;
|
|
switch (key)
|
|
{
|
|
case 3: /* ngc */
|
|
value = 2; /* --> sbc. */
|
|
break;
|
|
case 5: /* ngcs */
|
|
value = 4; /* --> sbcs. */
|
|
break;
|
|
case 8: /* cmn */
|
|
value = 7; /* --> adds. */
|
|
break;
|
|
case 11: /* cmp */
|
|
value = 10; /* --> subs. */
|
|
break;
|
|
case 13: /* mov */
|
|
value = 12; /* --> add. */
|
|
break;
|
|
case 15: /* cmn */
|
|
value = 14; /* --> adds. */
|
|
break;
|
|
case 18: /* cmp */
|
|
value = 17; /* --> subs. */
|
|
break;
|
|
case 21: /* cmn */
|
|
value = 20; /* --> adds. */
|
|
break;
|
|
case 23: /* neg */
|
|
value = 22; /* --> sub. */
|
|
break;
|
|
case 26: /* negs */
|
|
case 25: /* cmp */
|
|
value = 24; /* --> subs. */
|
|
break;
|
|
case 139: /* mov */
|
|
value = 138; /* --> umov. */
|
|
break;
|
|
case 141: /* mov */
|
|
value = 140; /* --> ins. */
|
|
break;
|
|
case 143: /* mov */
|
|
value = 142; /* --> ins. */
|
|
break;
|
|
case 204: /* mvn */
|
|
value = 203; /* --> not. */
|
|
break;
|
|
case 259: /* mov */
|
|
value = 258; /* --> orr. */
|
|
break;
|
|
case 314: /* sxtl */
|
|
value = 313; /* --> sshll. */
|
|
break;
|
|
case 316: /* sxtl2 */
|
|
value = 315; /* --> sshll2. */
|
|
break;
|
|
case 336: /* uxtl */
|
|
value = 335; /* --> ushll. */
|
|
break;
|
|
case 338: /* uxtl2 */
|
|
value = 337; /* --> ushll2. */
|
|
break;
|
|
case 431: /* mov */
|
|
value = 430; /* --> dup. */
|
|
break;
|
|
case 498: /* sxtw */
|
|
case 497: /* sxth */
|
|
case 496: /* sxtb */
|
|
case 499: /* asr */
|
|
case 495: /* sbfx */
|
|
case 494: /* sbfiz */
|
|
value = 493; /* --> sbfm. */
|
|
break;
|
|
case 502: /* bfxil */
|
|
case 501: /* bfi */
|
|
value = 500; /* --> bfm. */
|
|
break;
|
|
case 507: /* uxth */
|
|
case 506: /* uxtb */
|
|
case 509: /* lsr */
|
|
case 508: /* lsl */
|
|
case 505: /* ubfx */
|
|
case 504: /* ubfiz */
|
|
value = 503; /* --> ubfm. */
|
|
break;
|
|
case 527: /* cset */
|
|
case 526: /* cinc */
|
|
value = 525; /* --> csinc. */
|
|
break;
|
|
case 530: /* csetm */
|
|
case 529: /* cinv */
|
|
value = 528; /* --> csinv. */
|
|
break;
|
|
case 532: /* cneg */
|
|
value = 531; /* --> csneg. */
|
|
break;
|
|
case 557: /* lsl */
|
|
value = 556; /* --> lslv. */
|
|
break;
|
|
case 559: /* lsr */
|
|
value = 558; /* --> lsrv. */
|
|
break;
|
|
case 561: /* asr */
|
|
value = 560; /* --> asrv. */
|
|
break;
|
|
case 563: /* ror */
|
|
value = 562; /* --> rorv. */
|
|
break;
|
|
case 573: /* mul */
|
|
value = 572; /* --> madd. */
|
|
break;
|
|
case 575: /* mneg */
|
|
value = 574; /* --> msub. */
|
|
break;
|
|
case 577: /* smull */
|
|
value = 576; /* --> smaddl. */
|
|
break;
|
|
case 579: /* smnegl */
|
|
value = 578; /* --> smsubl. */
|
|
break;
|
|
case 582: /* umull */
|
|
value = 581; /* --> umaddl. */
|
|
break;
|
|
case 584: /* umnegl */
|
|
value = 583; /* --> umsubl. */
|
|
break;
|
|
case 595: /* ror */
|
|
value = 594; /* --> extr. */
|
|
break;
|
|
case 695: /* strb */
|
|
value = 693; /* --> sturb. */
|
|
break;
|
|
case 696: /* ldrb */
|
|
value = 694; /* --> ldurb. */
|
|
break;
|
|
case 698: /* ldrsb */
|
|
value = 697; /* --> ldursb. */
|
|
break;
|
|
case 701: /* str */
|
|
value = 699; /* --> stur. */
|
|
break;
|
|
case 702: /* ldr */
|
|
value = 700; /* --> ldur. */
|
|
break;
|
|
case 705: /* strh */
|
|
value = 703; /* --> sturh. */
|
|
break;
|
|
case 706: /* ldrh */
|
|
value = 704; /* --> ldurh. */
|
|
break;
|
|
case 708: /* ldrsh */
|
|
value = 707; /* --> ldursh. */
|
|
break;
|
|
case 711: /* str */
|
|
value = 709; /* --> stur. */
|
|
break;
|
|
case 712: /* ldr */
|
|
value = 710; /* --> ldur. */
|
|
break;
|
|
case 714: /* ldrsw */
|
|
value = 713; /* --> ldursw. */
|
|
break;
|
|
case 716: /* prfm */
|
|
value = 715; /* --> prfum. */
|
|
break;
|
|
case 758: /* bic */
|
|
value = 757; /* --> and. */
|
|
break;
|
|
case 760: /* mov */
|
|
value = 759; /* --> orr. */
|
|
break;
|
|
case 763: /* tst */
|
|
value = 762; /* --> ands. */
|
|
break;
|
|
case 768: /* uxtw */
|
|
case 767: /* mov */
|
|
value = 766; /* --> orr. */
|
|
break;
|
|
case 770: /* mvn */
|
|
value = 769; /* --> orn. */
|
|
break;
|
|
case 774: /* tst */
|
|
value = 773; /* --> ands. */
|
|
break;
|
|
case 777: /* mov */
|
|
value = 776; /* --> movn. */
|
|
break;
|
|
case 779: /* mov */
|
|
value = 778; /* --> movz. */
|
|
break;
|
|
case 790: /* sevl */
|
|
case 789: /* sev */
|
|
case 788: /* wfi */
|
|
case 787: /* wfe */
|
|
case 786: /* yield */
|
|
case 785: /* nop */
|
|
value = 784; /* --> hint. */
|
|
break;
|
|
case 799: /* tlbi */
|
|
case 798: /* ic */
|
|
case 797: /* dc */
|
|
case 796: /* at */
|
|
value = 795; /* --> sys. */
|
|
break;
|
|
default: return NULL;
|
|
}
|
|
|
|
return aarch64_opcode_table + value;
|
|
}
|
|
|
|
const char*
|
|
aarch64_insert_operand (const aarch64_operand *self,
|
|
const aarch64_opnd_info *info,
|
|
aarch64_insn *code, const aarch64_inst *inst)
|
|
{
|
|
/* Use the index as the key. */
|
|
int key = self - aarch64_operands;
|
|
switch (key)
|
|
{
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
case 4:
|
|
case 5:
|
|
case 6:
|
|
case 7:
|
|
case 8:
|
|
case 9:
|
|
case 10:
|
|
case 13:
|
|
case 14:
|
|
case 15:
|
|
case 16:
|
|
case 18:
|
|
case 19:
|
|
case 20:
|
|
case 21:
|
|
case 22:
|
|
case 23:
|
|
case 24:
|
|
case 25:
|
|
case 26:
|
|
case 34:
|
|
case 35:
|
|
return aarch64_ins_regno (self, info, code, inst);
|
|
case 11:
|
|
return aarch64_ins_reg_extended (self, info, code, inst);
|
|
case 12:
|
|
return aarch64_ins_reg_shifted (self, info, code, inst);
|
|
case 17:
|
|
return aarch64_ins_ft (self, info, code, inst);
|
|
case 27:
|
|
case 28:
|
|
case 29:
|
|
return aarch64_ins_reglane (self, info, code, inst);
|
|
case 30:
|
|
return aarch64_ins_reglist (self, info, code, inst);
|
|
case 31:
|
|
return aarch64_ins_ldst_reglist (self, info, code, inst);
|
|
case 32:
|
|
return aarch64_ins_ldst_reglist_r (self, info, code, inst);
|
|
case 33:
|
|
return aarch64_ins_ldst_elemlist (self, info, code, inst);
|
|
case 36:
|
|
case 45:
|
|
case 46:
|
|
case 47:
|
|
case 48:
|
|
case 49:
|
|
case 50:
|
|
case 51:
|
|
case 52:
|
|
case 53:
|
|
case 54:
|
|
case 55:
|
|
case 56:
|
|
case 57:
|
|
case 65:
|
|
case 66:
|
|
case 67:
|
|
case 68:
|
|
return aarch64_ins_imm (self, info, code, inst);
|
|
case 37:
|
|
case 38:
|
|
return aarch64_ins_advsimd_imm_shift (self, info, code, inst);
|
|
case 39:
|
|
case 40:
|
|
case 41:
|
|
return aarch64_ins_advsimd_imm_modified (self, info, code, inst);
|
|
case 58:
|
|
return aarch64_ins_limm (self, info, code, inst);
|
|
case 59:
|
|
return aarch64_ins_aimm (self, info, code, inst);
|
|
case 60:
|
|
return aarch64_ins_imm_half (self, info, code, inst);
|
|
case 61:
|
|
return aarch64_ins_fbits (self, info, code, inst);
|
|
case 63:
|
|
return aarch64_ins_cond (self, info, code, inst);
|
|
case 69:
|
|
case 75:
|
|
return aarch64_ins_addr_simple (self, info, code, inst);
|
|
case 70:
|
|
return aarch64_ins_addr_regoff (self, info, code, inst);
|
|
case 71:
|
|
case 72:
|
|
case 73:
|
|
return aarch64_ins_addr_simm (self, info, code, inst);
|
|
case 74:
|
|
return aarch64_ins_addr_uimm12 (self, info, code, inst);
|
|
case 76:
|
|
return aarch64_ins_simd_addr_post (self, info, code, inst);
|
|
case 77:
|
|
return aarch64_ins_sysreg (self, info, code, inst);
|
|
case 78:
|
|
return aarch64_ins_pstatefield (self, info, code, inst);
|
|
case 79:
|
|
case 80:
|
|
case 81:
|
|
case 82:
|
|
return aarch64_ins_sysins_op (self, info, code, inst);
|
|
case 83:
|
|
case 84:
|
|
return aarch64_ins_barrier (self, info, code, inst);
|
|
case 85:
|
|
return aarch64_ins_prfop (self, info, code, inst);
|
|
default: assert (0); abort ();
|
|
}
|
|
}
|