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b4570e4b30
This patch changes amd64-linux target descriptions so that they can be dynamically generated in both GDB and GDBserver. gdb/gdbserver: 2017-09-05 Yao Qi <yao.qi@linaro.org> * Makefile.in (arch-amd64.o): New rule. * configure.srv: Append arch-amd64.o. * linux-amd64-ipa.c: Include common/x86-xstate.h. (get_ipa_tdesc): Call amd64_linux_read_description. (initialize_low_tracepoint): Don't call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-low.c (x86_linux_read_description): Call amd64_linux_read_description. (x86_get_ipa_tdesc_idx): Call amd64_get_ipa_tdesc_idx. (initialize_low_arch): Don't call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-tdesc-selftest.c: Declare init_registers_amd64_XXX and tdesc_amd64_XXX. [__x86_64__] (amd64_tdesc_test): New function. (initialize_low_tdesc) [__x86_64__]: Call init_registers_x32_XXX and init_registers_amd64_XXX. * linux-x86-tdesc.c: Include arch/amd64.h. (xcr0_to_tdesc_idx): New function. (i386_linux_read_description): New function. (amd64_get_ipa_tdesc_idx): New function. * linux-x86-tdesc.h (amd64_get_ipa_tdesc_idx): Declare. (amd64_get_ipa_tdesc): Declare. gdb: 2017-09-05 Yao Qi <yao.qi@linaro.org> * amd64-linux-tdep.c: Include arch/amd64.h. Don't include features/i386/*.c. (amd64_linux_read_description): Call amd64_create_target_description. * arch/amd64.c: New file. * arch/amd64.h: New file. * configure.tgt (x86_64-*-linux*): Append amd64.o. * Makefile.in (ALL_64_TARGET_OBS): Append amd64.o.
280 lines
7.1 KiB
C
280 lines
7.1 KiB
C
/* GNU/Linux/x86-64 specific low level interface, for the in-process
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agent library for GDB.
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Copyright (C) 2010-2017 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "server.h"
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#include <sys/mman.h>
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#include "tracepoint.h"
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#include "linux-x86-tdesc.h"
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#include "common/x86-xstate.h"
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/* Defined in auto-generated file amd64-linux.c. */
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void init_registers_amd64_linux (void);
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extern const struct target_desc *tdesc_amd64_linux;
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/* fast tracepoints collect registers. */
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#define FT_CR_RIP 0
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#define FT_CR_EFLAGS 1
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#define FT_CR_R8 2
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#define FT_CR_R9 3
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#define FT_CR_R10 4
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#define FT_CR_R11 5
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#define FT_CR_R12 6
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#define FT_CR_R13 7
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#define FT_CR_R14 8
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#define FT_CR_R15 9
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#define FT_CR_RAX 10
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#define FT_CR_RBX 11
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#define FT_CR_RCX 12
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#define FT_CR_RDX 13
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#define FT_CR_RSI 14
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#define FT_CR_RDI 15
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#define FT_CR_RBP 16
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#define FT_CR_RSP 17
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static const int x86_64_ft_collect_regmap[] = {
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FT_CR_RAX * 8, FT_CR_RBX * 8, FT_CR_RCX * 8, FT_CR_RDX * 8,
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FT_CR_RSI * 8, FT_CR_RDI * 8, FT_CR_RBP * 8, FT_CR_RSP * 8,
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FT_CR_R8 * 8, FT_CR_R9 * 8, FT_CR_R10 * 8, FT_CR_R11 * 8,
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FT_CR_R12 * 8, FT_CR_R13 * 8, FT_CR_R14 * 8, FT_CR_R15 * 8,
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FT_CR_RIP * 8, FT_CR_EFLAGS * 8
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};
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#define X86_64_NUM_FT_COLLECT_GREGS \
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(sizeof (x86_64_ft_collect_regmap) / sizeof(x86_64_ft_collect_regmap[0]))
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void
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supply_fast_tracepoint_registers (struct regcache *regcache,
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const unsigned char *buf)
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{
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int i;
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for (i = 0; i < X86_64_NUM_FT_COLLECT_GREGS; i++)
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supply_register (regcache, i,
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((char *) buf) + x86_64_ft_collect_regmap[i]);
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}
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ULONGEST
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get_raw_reg (const unsigned char *raw_regs, int regnum)
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{
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if (regnum >= X86_64_NUM_FT_COLLECT_GREGS)
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return 0;
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return *(ULONGEST *) (raw_regs + x86_64_ft_collect_regmap[regnum]);
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}
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#ifdef HAVE_UST
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#include <ust/processor.h>
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/* "struct registers" is the UST object type holding the registers at
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the time of the static tracepoint marker call. This doesn't
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contain RIP, but we know what it must have been (the marker
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address). */
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#define ST_REGENTRY(REG) \
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{ \
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offsetof (struct registers, REG), \
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sizeof (((struct registers *) NULL)->REG) \
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}
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static struct
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{
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int offset;
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int size;
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} x86_64_st_collect_regmap[] =
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{
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ST_REGENTRY(rax),
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ST_REGENTRY(rbx),
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ST_REGENTRY(rcx),
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ST_REGENTRY(rdx),
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ST_REGENTRY(rsi),
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ST_REGENTRY(rdi),
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ST_REGENTRY(rbp),
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ST_REGENTRY(rsp),
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ST_REGENTRY(r8),
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ST_REGENTRY(r9),
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ST_REGENTRY(r10),
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ST_REGENTRY(r11),
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ST_REGENTRY(r12),
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ST_REGENTRY(r13),
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ST_REGENTRY(r14),
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ST_REGENTRY(r15),
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{ -1, 0 },
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ST_REGENTRY(rflags),
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ST_REGENTRY(cs),
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ST_REGENTRY(ss),
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};
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#define X86_64_NUM_ST_COLLECT_GREGS \
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(sizeof (x86_64_st_collect_regmap) / sizeof (x86_64_st_collect_regmap[0]))
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/* GDB's RIP register number. */
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#define AMD64_RIP_REGNUM 16
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void
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supply_static_tracepoint_registers (struct regcache *regcache,
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const unsigned char *buf,
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CORE_ADDR pc)
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{
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int i;
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unsigned long newpc = pc;
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supply_register (regcache, AMD64_RIP_REGNUM, &newpc);
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for (i = 0; i < X86_64_NUM_ST_COLLECT_GREGS; i++)
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if (x86_64_st_collect_regmap[i].offset != -1)
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{
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switch (x86_64_st_collect_regmap[i].size)
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{
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case 8:
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supply_register (regcache, i,
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((char *) buf)
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+ x86_64_st_collect_regmap[i].offset);
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break;
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case 2:
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{
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unsigned long reg
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= * (short *) (((char *) buf)
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+ x86_64_st_collect_regmap[i].offset);
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reg &= 0xffff;
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supply_register (regcache, i, ®);
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}
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break;
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default:
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internal_error (__FILE__, __LINE__,
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"unhandled register size: %d",
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x86_64_st_collect_regmap[i].size);
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break;
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}
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}
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}
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#endif /* HAVE_UST */
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/* Return target_desc to use for IPA, given the tdesc index passed by
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gdbserver. */
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const struct target_desc *
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get_ipa_tdesc (int idx)
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{
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if (idx >= X86_TDESC_LAST)
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{
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internal_error (__FILE__, __LINE__,
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"unknown ipa tdesc index: %d", idx);
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}
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#if defined __ILP32__
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switch (idx)
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{
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case X86_TDESC_SSE:
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return amd64_linux_read_description (X86_XSTATE_SSE_MASK, true);
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case X86_TDESC_AVX:
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return amd64_linux_read_description (X86_XSTATE_AVX_MASK, true);
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case X86_TDESC_AVX_AVX512:
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return amd64_linux_read_description (X86_XSTATE_AVX_AVX512_MASK, true);
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default:
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break;
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}
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#else
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/* Map the tdesc index to xcr0 mask. */
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uint64_t idx2mask[X86_TDESC_LAST] = {
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X86_XSTATE_X87_MASK,
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X86_XSTATE_SSE_MASK,
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X86_XSTATE_AVX_MASK,
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X86_XSTATE_MPX_MASK,
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X86_XSTATE_AVX_MPX_MASK,
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X86_XSTATE_AVX_AVX512_MASK,
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X86_XSTATE_AVX_MPX_AVX512_PKU_MASK,
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};
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return amd64_linux_read_description (idx2mask[idx], false);
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#endif
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internal_error (__FILE__, __LINE__,
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"unknown ipa tdesc index: %d", idx);
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}
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/* Allocate buffer for the jump pads. The branch instruction has a
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reach of +/- 31-bit, and the executable is loaded at low addresses.
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64-bit: Use MAP_32BIT to allocate in the first 2GB. Shared
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libraries, being allocated at the top, are unfortunately out of
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luck.
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x32: Since MAP_32BIT is 64-bit only, do the placement manually.
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Try allocating at '0x80000000 - SIZE' initially, decreasing until
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we hit a free area. This ensures the executable is fully covered,
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and is as close as possible to the shared libraries, which are
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usually mapped at the top of the first 4GB of the address space.
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*/
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void *
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alloc_jump_pad_buffer (size_t size)
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{
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#if __ILP32__
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uintptr_t addr;
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int pagesize;
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pagesize = sysconf (_SC_PAGE_SIZE);
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if (pagesize == -1)
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perror_with_name ("sysconf");
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addr = 0x80000000 - size;
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/* size should already be page-aligned, but this can't hurt. */
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addr &= ~(pagesize - 1);
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/* Search for a free area. If we hit 0, we're out of luck. */
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for (; addr; addr -= pagesize)
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{
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void *res;
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/* No MAP_FIXED - we don't want to zap someone's mapping. */
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res = mmap ((void *) addr, size,
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PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_PRIVATE | MAP_ANONYMOUS, -1, 0);
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/* If we got what we wanted, return. */
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if ((uintptr_t) res == addr)
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return res;
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/* If we got a mapping, but at a wrong address, undo it. */
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if (res != MAP_FAILED)
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munmap (res, size);
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}
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return NULL;
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#else
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void *res = mmap (NULL, size, PROT_READ | PROT_WRITE | PROT_EXEC,
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MAP_PRIVATE | MAP_ANONYMOUS | MAP_32BIT, -1, 0);
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if (res == MAP_FAILED)
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return NULL;
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return res;
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#endif
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}
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void
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initialize_low_tracepoint (void)
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{
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}
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