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2ac435d466
This patch is part of the patch series to add support for ARMv8.5-A extensions. (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/docs/ddi0596/a/a64-base-instructions-alphabetic-order) This patch adds the prediction restriction instructions (that is, cfp, dvp, cpp). These instructions are retrospectively made optional for all versions of the architecture from ARMv8.0 to ARMv8.4 and is mandatory from ARMv8.5. Hence adding a new +predres which can be used by the older architectures. *** include/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * opcode/aarch64.h (AARCH64_FEATURE_PREDRES): New. (AARCH64_ARCH_V8_5): Add AARCH64_FEATURE_PREDRES by default. (aarch64_opnd): Add AARCH64_OPND_SYSREG_SR. (aarch64_sys_regs_sr): Declare new table. *** opcodes/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * aarch64-dis.c (aarch64_ext_sysins_op): Add case for AARCH64_OPND_SYSREG_SR. * aarch64-opc.c (aarch64_print_operand): Likewise. (aarch64_sys_regs_sr): Define table. (aarch64_sys_ins_reg_supported_p): Check for RCTX with AARCH64_FEATURE_PREDRES. * aarch64-tbl.h (aarch64_feature_predres): New. (PREDRES, PREDRES_INSN): New. (aarch64_opcode_table): Add entries for cfp, dvp and cpp. (AARCH64_OPERANDS): Add new description for SYSREG_SR. * aarch64-asm-2.c: Regenerate. * aarch64-dis-2.c: Regenerate. * aarch64-opc-2.c: Regenerate. *** gas/ChangeLog *** 2018-10-09 Sudakshina Das <sudi.das@arm.com> * config/tc-aarch64.c (aarch64_sys_regs_sr_hsh): New. (parse_operands): Add entry for AARCH64_OPND_SYSREG_SR. (md_begin): Allocate and initialize aarch64_sys_regs_sr_hsh with aarch64_sys_regs_sr. (aarch64_features): Add new "predres" option for older architectures. * doc/c-aarch64.texi: Document the same. * testsuite/gas/aarch64/sysreg-4.s: New. * testsuite/gas/aarch64/sysreg-4.d: New. * testsuite/gas/aarch64/illegal-sysreg-4.d: New. * testsuite/gas/aarch64/illegal-sysreg-4.l: New. * testsuite/gas/aarch64/predres.s: New. * testsuite/gas/aarch64/predres.d: New.
847 lines
22 KiB
C
847 lines
22 KiB
C
/* This file is automatically generated by aarch64-gen. Do not edit! */
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/* Copyright (C) 2012-2018 Free Software Foundation, Inc.
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Contributed by ARM Ltd.
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This file is part of the GNU opcodes library.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#include "sysdep.h"
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#include "aarch64-asm.h"
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const aarch64_opcode *
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aarch64_find_real_opcode (const aarch64_opcode *opcode)
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{
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/* Use the index as the key to locate the real opcode. */
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int key = opcode - aarch64_opcode_table;
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int value;
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switch (key)
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{
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case 3: /* ngc */
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case 2: /* sbc */
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value = 2; /* --> sbc. */
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break;
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case 5: /* ngcs */
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case 4: /* sbcs */
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value = 4; /* --> sbcs. */
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break;
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case 8: /* cmn */
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case 7: /* adds */
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value = 7; /* --> adds. */
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break;
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case 11: /* cmp */
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case 10: /* subs */
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value = 10; /* --> subs. */
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break;
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case 13: /* mov */
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case 12: /* add */
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value = 12; /* --> add. */
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break;
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case 15: /* cmn */
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case 14: /* adds */
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value = 14; /* --> adds. */
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break;
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case 18: /* cmp */
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case 17: /* subs */
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value = 17; /* --> subs. */
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break;
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case 21: /* cmn */
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case 20: /* adds */
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value = 20; /* --> adds. */
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break;
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case 23: /* neg */
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case 22: /* sub */
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value = 22; /* --> sub. */
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break;
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case 25: /* cmp */
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case 26: /* negs */
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case 24: /* subs */
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value = 24; /* --> subs. */
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break;
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case 151: /* mov */
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case 150: /* umov */
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value = 150; /* --> umov. */
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break;
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case 153: /* mov */
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case 152: /* ins */
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value = 152; /* --> ins. */
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break;
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case 155: /* mov */
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case 154: /* ins */
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value = 154; /* --> ins. */
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break;
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case 241: /* mvn */
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case 240: /* not */
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value = 240; /* --> not. */
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break;
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case 316: /* mov */
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case 315: /* orr */
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value = 315; /* --> orr. */
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break;
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case 387: /* sxtl */
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case 386: /* sshll */
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value = 386; /* --> sshll. */
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break;
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case 389: /* sxtl2 */
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case 388: /* sshll2 */
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value = 388; /* --> sshll2. */
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break;
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case 411: /* uxtl */
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case 410: /* ushll */
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value = 410; /* --> ushll. */
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break;
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case 413: /* uxtl2 */
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case 412: /* ushll2 */
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value = 412; /* --> ushll2. */
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break;
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case 534: /* mov */
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case 533: /* dup */
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value = 533; /* --> dup. */
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break;
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case 621: /* sxtw */
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case 620: /* sxth */
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case 619: /* sxtb */
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case 622: /* asr */
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case 618: /* sbfx */
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case 617: /* sbfiz */
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case 616: /* sbfm */
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value = 616; /* --> sbfm. */
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break;
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case 625: /* bfc */
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case 626: /* bfxil */
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case 624: /* bfi */
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case 623: /* bfm */
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value = 623; /* --> bfm. */
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break;
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case 631: /* uxth */
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case 630: /* uxtb */
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case 633: /* lsr */
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case 632: /* lsl */
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case 629: /* ubfx */
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case 628: /* ubfiz */
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case 627: /* ubfm */
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value = 627; /* --> ubfm. */
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break;
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case 663: /* cset */
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case 662: /* cinc */
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case 661: /* csinc */
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value = 661; /* --> csinc. */
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break;
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case 666: /* csetm */
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case 665: /* cinv */
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case 664: /* csinv */
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value = 664; /* --> csinv. */
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break;
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case 668: /* cneg */
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case 667: /* csneg */
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value = 667; /* --> csneg. */
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break;
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case 686: /* rev */
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case 687: /* rev64 */
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value = 686; /* --> rev. */
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break;
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case 712: /* lsl */
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case 711: /* lslv */
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value = 711; /* --> lslv. */
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break;
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case 714: /* lsr */
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case 713: /* lsrv */
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value = 713; /* --> lsrv. */
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break;
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case 716: /* asr */
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case 715: /* asrv */
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value = 715; /* --> asrv. */
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break;
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case 718: /* ror */
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case 717: /* rorv */
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value = 717; /* --> rorv. */
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break;
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case 729: /* mul */
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case 728: /* madd */
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value = 728; /* --> madd. */
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break;
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case 731: /* mneg */
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case 730: /* msub */
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value = 730; /* --> msub. */
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break;
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case 733: /* smull */
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case 732: /* smaddl */
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value = 732; /* --> smaddl. */
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break;
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case 735: /* smnegl */
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case 734: /* smsubl */
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value = 734; /* --> smsubl. */
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break;
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case 738: /* umull */
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case 737: /* umaddl */
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value = 737; /* --> umaddl. */
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break;
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case 740: /* umnegl */
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case 739: /* umsubl */
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value = 739; /* --> umsubl. */
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break;
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case 751: /* ror */
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case 750: /* extr */
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value = 750; /* --> extr. */
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break;
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case 970: /* bic */
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case 969: /* and */
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value = 969; /* --> and. */
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break;
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case 972: /* mov */
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case 971: /* orr */
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value = 971; /* --> orr. */
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break;
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case 975: /* tst */
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case 974: /* ands */
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value = 974; /* --> ands. */
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break;
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case 980: /* uxtw */
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case 979: /* mov */
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case 978: /* orr */
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value = 978; /* --> orr. */
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break;
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case 982: /* mvn */
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case 981: /* orn */
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value = 981; /* --> orn. */
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break;
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case 986: /* tst */
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case 985: /* ands */
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value = 985; /* --> ands. */
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break;
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case 1112: /* staddb */
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case 1016: /* ldaddb */
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value = 1016; /* --> ldaddb. */
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break;
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case 1113: /* staddh */
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case 1017: /* ldaddh */
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value = 1017; /* --> ldaddh. */
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break;
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case 1114: /* stadd */
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case 1018: /* ldadd */
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value = 1018; /* --> ldadd. */
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break;
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case 1115: /* staddlb */
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case 1020: /* ldaddlb */
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value = 1020; /* --> ldaddlb. */
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break;
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case 1116: /* staddlh */
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case 1023: /* ldaddlh */
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value = 1023; /* --> ldaddlh. */
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break;
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case 1117: /* staddl */
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case 1026: /* ldaddl */
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value = 1026; /* --> ldaddl. */
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break;
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case 1118: /* stclrb */
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case 1028: /* ldclrb */
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value = 1028; /* --> ldclrb. */
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break;
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case 1119: /* stclrh */
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case 1029: /* ldclrh */
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value = 1029; /* --> ldclrh. */
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break;
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case 1120: /* stclr */
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case 1030: /* ldclr */
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value = 1030; /* --> ldclr. */
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break;
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case 1121: /* stclrlb */
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case 1032: /* ldclrlb */
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value = 1032; /* --> ldclrlb. */
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break;
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case 1122: /* stclrlh */
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case 1035: /* ldclrlh */
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value = 1035; /* --> ldclrlh. */
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break;
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case 1123: /* stclrl */
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case 1038: /* ldclrl */
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value = 1038; /* --> ldclrl. */
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break;
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case 1124: /* steorb */
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case 1040: /* ldeorb */
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value = 1040; /* --> ldeorb. */
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break;
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case 1125: /* steorh */
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case 1041: /* ldeorh */
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value = 1041; /* --> ldeorh. */
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break;
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case 1126: /* steor */
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case 1042: /* ldeor */
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value = 1042; /* --> ldeor. */
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break;
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case 1127: /* steorlb */
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case 1044: /* ldeorlb */
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value = 1044; /* --> ldeorlb. */
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break;
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case 1128: /* steorlh */
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case 1047: /* ldeorlh */
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value = 1047; /* --> ldeorlh. */
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break;
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case 1129: /* steorl */
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case 1050: /* ldeorl */
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value = 1050; /* --> ldeorl. */
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break;
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case 1130: /* stsetb */
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case 1052: /* ldsetb */
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value = 1052; /* --> ldsetb. */
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break;
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case 1131: /* stseth */
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case 1053: /* ldseth */
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value = 1053; /* --> ldseth. */
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break;
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case 1132: /* stset */
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case 1054: /* ldset */
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value = 1054; /* --> ldset. */
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break;
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case 1133: /* stsetlb */
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case 1056: /* ldsetlb */
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value = 1056; /* --> ldsetlb. */
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break;
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case 1134: /* stsetlh */
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case 1059: /* ldsetlh */
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value = 1059; /* --> ldsetlh. */
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break;
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case 1135: /* stsetl */
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case 1062: /* ldsetl */
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value = 1062; /* --> ldsetl. */
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break;
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case 1136: /* stsmaxb */
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case 1064: /* ldsmaxb */
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value = 1064; /* --> ldsmaxb. */
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break;
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case 1137: /* stsmaxh */
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case 1065: /* ldsmaxh */
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value = 1065; /* --> ldsmaxh. */
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break;
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case 1138: /* stsmax */
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case 1066: /* ldsmax */
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value = 1066; /* --> ldsmax. */
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break;
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case 1139: /* stsmaxlb */
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case 1068: /* ldsmaxlb */
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value = 1068; /* --> ldsmaxlb. */
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break;
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case 1140: /* stsmaxlh */
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case 1071: /* ldsmaxlh */
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value = 1071; /* --> ldsmaxlh. */
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break;
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case 1141: /* stsmaxl */
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case 1074: /* ldsmaxl */
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value = 1074; /* --> ldsmaxl. */
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break;
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case 1142: /* stsminb */
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case 1076: /* ldsminb */
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value = 1076; /* --> ldsminb. */
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break;
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case 1143: /* stsminh */
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case 1077: /* ldsminh */
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value = 1077; /* --> ldsminh. */
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break;
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case 1144: /* stsmin */
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case 1078: /* ldsmin */
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value = 1078; /* --> ldsmin. */
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break;
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case 1145: /* stsminlb */
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case 1080: /* ldsminlb */
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value = 1080; /* --> ldsminlb. */
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break;
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case 1146: /* stsminlh */
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case 1083: /* ldsminlh */
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value = 1083; /* --> ldsminlh. */
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break;
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case 1147: /* stsminl */
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case 1086: /* ldsminl */
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value = 1086; /* --> ldsminl. */
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break;
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case 1148: /* stumaxb */
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case 1088: /* ldumaxb */
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value = 1088; /* --> ldumaxb. */
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break;
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case 1149: /* stumaxh */
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case 1089: /* ldumaxh */
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value = 1089; /* --> ldumaxh. */
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break;
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case 1150: /* stumax */
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case 1090: /* ldumax */
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value = 1090; /* --> ldumax. */
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break;
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case 1151: /* stumaxlb */
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case 1092: /* ldumaxlb */
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value = 1092; /* --> ldumaxlb. */
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break;
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case 1152: /* stumaxlh */
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case 1095: /* ldumaxlh */
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value = 1095; /* --> ldumaxlh. */
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break;
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case 1153: /* stumaxl */
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case 1098: /* ldumaxl */
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value = 1098; /* --> ldumaxl. */
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break;
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case 1154: /* stuminb */
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case 1100: /* lduminb */
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value = 1100; /* --> lduminb. */
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break;
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case 1155: /* stuminh */
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case 1101: /* lduminh */
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value = 1101; /* --> lduminh. */
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break;
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case 1156: /* stumin */
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case 1102: /* ldumin */
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value = 1102; /* --> ldumin. */
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break;
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case 1157: /* stuminlb */
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case 1104: /* lduminlb */
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value = 1104; /* --> lduminlb. */
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break;
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case 1158: /* stuminlh */
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case 1107: /* lduminlh */
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value = 1107; /* --> lduminlh. */
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break;
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case 1159: /* stuminl */
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case 1110: /* lduminl */
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value = 1110; /* --> lduminl. */
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break;
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case 1161: /* mov */
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case 1160: /* movn */
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value = 1160; /* --> movn. */
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break;
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case 1163: /* mov */
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case 1162: /* movz */
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value = 1162; /* --> movz. */
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break;
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case 1208: /* autibsp */
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case 1207: /* autibz */
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case 1206: /* autiasp */
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case 1205: /* autiaz */
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case 1204: /* pacibsp */
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case 1203: /* pacibz */
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case 1202: /* paciasp */
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case 1201: /* paciaz */
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case 1182: /* psb */
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case 1181: /* esb */
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case 1180: /* autib1716 */
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case 1179: /* autia1716 */
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case 1178: /* pacib1716 */
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case 1177: /* pacia1716 */
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case 1176: /* xpaclri */
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case 1175: /* sevl */
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case 1174: /* sev */
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case 1173: /* wfi */
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case 1172: /* wfe */
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case 1171: /* yield */
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case 1170: /* csdb */
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case 1169: /* nop */
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case 1168: /* hint */
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value = 1168; /* --> hint. */
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break;
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case 1186: /* pssbb */
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case 1185: /* ssbb */
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case 1184: /* dsb */
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value = 1184; /* --> dsb. */
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break;
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case 1197: /* cpp */
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case 1196: /* dvp */
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case 1195: /* cfp */
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case 1194: /* tlbi */
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case 1193: /* ic */
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case 1192: /* dc */
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case 1191: /* at */
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case 1190: /* sys */
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value = 1190; /* --> sys. */
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break;
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case 2006: /* bic */
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case 1256: /* and */
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value = 1256; /* --> and. */
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break;
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case 1239: /* mov */
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case 1258: /* and */
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|
value = 1258; /* --> and. */
|
|
break;
|
|
case 1243: /* movs */
|
|
case 1259: /* ands */
|
|
value = 1259; /* --> ands. */
|
|
break;
|
|
case 2007: /* cmple */
|
|
case 1294: /* cmpge */
|
|
value = 1294; /* --> cmpge. */
|
|
break;
|
|
case 2010: /* cmplt */
|
|
case 1297: /* cmpgt */
|
|
value = 1297; /* --> cmpgt. */
|
|
break;
|
|
case 2008: /* cmplo */
|
|
case 1299: /* cmphi */
|
|
value = 1299; /* --> cmphi. */
|
|
break;
|
|
case 2009: /* cmpls */
|
|
case 1302: /* cmphs */
|
|
value = 1302; /* --> cmphs. */
|
|
break;
|
|
case 1236: /* mov */
|
|
case 1324: /* cpy */
|
|
value = 1324; /* --> cpy. */
|
|
break;
|
|
case 1238: /* mov */
|
|
case 1325: /* cpy */
|
|
value = 1325; /* --> cpy. */
|
|
break;
|
|
case 2017: /* fmov */
|
|
case 1241: /* mov */
|
|
case 1326: /* cpy */
|
|
value = 1326; /* --> cpy. */
|
|
break;
|
|
case 1231: /* mov */
|
|
case 1338: /* dup */
|
|
value = 1338; /* --> dup. */
|
|
break;
|
|
case 1233: /* mov */
|
|
case 1230: /* mov */
|
|
case 1339: /* dup */
|
|
value = 1339; /* --> dup. */
|
|
break;
|
|
case 2016: /* fmov */
|
|
case 1235: /* mov */
|
|
case 1340: /* dup */
|
|
value = 1340; /* --> dup. */
|
|
break;
|
|
case 1234: /* mov */
|
|
case 1341: /* dupm */
|
|
value = 1341; /* --> dupm. */
|
|
break;
|
|
case 2011: /* eon */
|
|
case 1343: /* eor */
|
|
value = 1343; /* --> eor. */
|
|
break;
|
|
case 1244: /* not */
|
|
case 1345: /* eor */
|
|
value = 1345; /* --> eor. */
|
|
break;
|
|
case 1245: /* nots */
|
|
case 1346: /* eors */
|
|
value = 1346; /* --> eors. */
|
|
break;
|
|
case 2012: /* facle */
|
|
case 1351: /* facge */
|
|
value = 1351; /* --> facge. */
|
|
break;
|
|
case 2013: /* faclt */
|
|
case 1352: /* facgt */
|
|
value = 1352; /* --> facgt. */
|
|
break;
|
|
case 2014: /* fcmle */
|
|
case 1365: /* fcmge */
|
|
value = 1365; /* --> fcmge. */
|
|
break;
|
|
case 2015: /* fcmlt */
|
|
case 1367: /* fcmgt */
|
|
value = 1367; /* --> fcmgt. */
|
|
break;
|
|
case 1228: /* fmov */
|
|
case 1373: /* fcpy */
|
|
value = 1373; /* --> fcpy. */
|
|
break;
|
|
case 1227: /* fmov */
|
|
case 1396: /* fdup */
|
|
value = 1396; /* --> fdup. */
|
|
break;
|
|
case 1229: /* mov */
|
|
case 1727: /* orr */
|
|
value = 1727; /* --> orr. */
|
|
break;
|
|
case 2018: /* orn */
|
|
case 1728: /* orr */
|
|
value = 1728; /* --> orr. */
|
|
break;
|
|
case 1232: /* mov */
|
|
case 1730: /* orr */
|
|
value = 1730; /* --> orr. */
|
|
break;
|
|
case 1242: /* movs */
|
|
case 1731: /* orrs */
|
|
value = 1731; /* --> orrs. */
|
|
break;
|
|
case 1237: /* mov */
|
|
case 1793: /* sel */
|
|
value = 1793; /* --> sel. */
|
|
break;
|
|
case 1240: /* mov */
|
|
case 1794: /* sel */
|
|
value = 1794; /* --> sel. */
|
|
break;
|
|
default: return NULL;
|
|
}
|
|
|
|
return aarch64_opcode_table + value;
|
|
}
|
|
|
|
bfd_boolean
|
|
aarch64_insert_operand (const aarch64_operand *self,
|
|
const aarch64_opnd_info *info,
|
|
aarch64_insn *code, const aarch64_inst *inst,
|
|
aarch64_operand_error *errors)
|
|
{
|
|
/* Use the index as the key. */
|
|
int key = self - aarch64_operands;
|
|
switch (key)
|
|
{
|
|
case 1:
|
|
case 2:
|
|
case 3:
|
|
case 4:
|
|
case 5:
|
|
case 6:
|
|
case 7:
|
|
case 8:
|
|
case 9:
|
|
case 10:
|
|
case 11:
|
|
case 15:
|
|
case 16:
|
|
case 17:
|
|
case 18:
|
|
case 20:
|
|
case 21:
|
|
case 22:
|
|
case 23:
|
|
case 24:
|
|
case 25:
|
|
case 26:
|
|
case 27:
|
|
case 28:
|
|
case 29:
|
|
case 154:
|
|
case 155:
|
|
case 156:
|
|
case 157:
|
|
case 158:
|
|
case 159:
|
|
case 160:
|
|
case 161:
|
|
case 162:
|
|
case 163:
|
|
case 176:
|
|
case 177:
|
|
case 178:
|
|
case 179:
|
|
case 180:
|
|
case 181:
|
|
case 182:
|
|
case 183:
|
|
case 184:
|
|
case 188:
|
|
case 191:
|
|
return aarch64_ins_regno (self, info, code, inst, errors);
|
|
case 13:
|
|
return aarch64_ins_reg_extended (self, info, code, inst, errors);
|
|
case 14:
|
|
return aarch64_ins_reg_shifted (self, info, code, inst, errors);
|
|
case 19:
|
|
return aarch64_ins_ft (self, info, code, inst, errors);
|
|
case 30:
|
|
case 31:
|
|
case 32:
|
|
case 33:
|
|
case 193:
|
|
return aarch64_ins_reglane (self, info, code, inst, errors);
|
|
case 34:
|
|
return aarch64_ins_reglist (self, info, code, inst, errors);
|
|
case 35:
|
|
return aarch64_ins_ldst_reglist (self, info, code, inst, errors);
|
|
case 36:
|
|
return aarch64_ins_ldst_reglist_r (self, info, code, inst, errors);
|
|
case 37:
|
|
return aarch64_ins_ldst_elemlist (self, info, code, inst, errors);
|
|
case 38:
|
|
case 39:
|
|
case 40:
|
|
case 41:
|
|
case 51:
|
|
case 52:
|
|
case 53:
|
|
case 54:
|
|
case 55:
|
|
case 56:
|
|
case 57:
|
|
case 58:
|
|
case 59:
|
|
case 60:
|
|
case 61:
|
|
case 62:
|
|
case 63:
|
|
case 64:
|
|
case 76:
|
|
case 77:
|
|
case 78:
|
|
case 79:
|
|
case 151:
|
|
case 153:
|
|
case 168:
|
|
case 169:
|
|
case 170:
|
|
case 171:
|
|
case 172:
|
|
case 173:
|
|
case 174:
|
|
case 175:
|
|
return aarch64_ins_imm (self, info, code, inst, errors);
|
|
case 42:
|
|
case 43:
|
|
return aarch64_ins_advsimd_imm_shift (self, info, code, inst, errors);
|
|
case 44:
|
|
case 45:
|
|
case 46:
|
|
return aarch64_ins_advsimd_imm_modified (self, info, code, inst, errors);
|
|
case 50:
|
|
case 142:
|
|
return aarch64_ins_fpimm (self, info, code, inst, errors);
|
|
case 65:
|
|
case 149:
|
|
return aarch64_ins_limm (self, info, code, inst, errors);
|
|
case 66:
|
|
return aarch64_ins_aimm (self, info, code, inst, errors);
|
|
case 67:
|
|
return aarch64_ins_imm_half (self, info, code, inst, errors);
|
|
case 68:
|
|
return aarch64_ins_fbits (self, info, code, inst, errors);
|
|
case 70:
|
|
case 71:
|
|
case 147:
|
|
return aarch64_ins_imm_rotate2 (self, info, code, inst, errors);
|
|
case 72:
|
|
case 146:
|
|
return aarch64_ins_imm_rotate1 (self, info, code, inst, errors);
|
|
case 73:
|
|
case 74:
|
|
return aarch64_ins_cond (self, info, code, inst, errors);
|
|
case 80:
|
|
case 87:
|
|
return aarch64_ins_addr_simple (self, info, code, inst, errors);
|
|
case 81:
|
|
return aarch64_ins_addr_regoff (self, info, code, inst, errors);
|
|
case 82:
|
|
case 83:
|
|
case 84:
|
|
return aarch64_ins_addr_simm (self, info, code, inst, errors);
|
|
case 85:
|
|
return aarch64_ins_addr_simm10 (self, info, code, inst, errors);
|
|
case 86:
|
|
return aarch64_ins_addr_uimm12 (self, info, code, inst, errors);
|
|
case 88:
|
|
return aarch64_ins_addr_offset (self, info, code, inst, errors);
|
|
case 89:
|
|
return aarch64_ins_simd_addr_post (self, info, code, inst, errors);
|
|
case 90:
|
|
return aarch64_ins_sysreg (self, info, code, inst, errors);
|
|
case 91:
|
|
return aarch64_ins_pstatefield (self, info, code, inst, errors);
|
|
case 92:
|
|
case 93:
|
|
case 94:
|
|
case 95:
|
|
case 96:
|
|
return aarch64_ins_sysins_op (self, info, code, inst, errors);
|
|
case 97:
|
|
case 98:
|
|
return aarch64_ins_barrier (self, info, code, inst, errors);
|
|
case 99:
|
|
return aarch64_ins_prfop (self, info, code, inst, errors);
|
|
case 100:
|
|
return aarch64_ins_hint (self, info, code, inst, errors);
|
|
case 101:
|
|
return aarch64_ins_sve_addr_ri_s4 (self, info, code, inst, errors);
|
|
case 102:
|
|
case 103:
|
|
case 104:
|
|
case 105:
|
|
return aarch64_ins_sve_addr_ri_s4xvl (self, info, code, inst, errors);
|
|
case 106:
|
|
return aarch64_ins_sve_addr_ri_s6xvl (self, info, code, inst, errors);
|
|
case 107:
|
|
return aarch64_ins_sve_addr_ri_s9xvl (self, info, code, inst, errors);
|
|
case 108:
|
|
case 109:
|
|
case 110:
|
|
case 111:
|
|
return aarch64_ins_sve_addr_ri_u6 (self, info, code, inst, errors);
|
|
case 112:
|
|
case 113:
|
|
case 114:
|
|
case 115:
|
|
case 116:
|
|
case 117:
|
|
case 118:
|
|
case 119:
|
|
case 120:
|
|
case 121:
|
|
case 122:
|
|
case 123:
|
|
case 124:
|
|
return aarch64_ins_sve_addr_rr_lsl (self, info, code, inst, errors);
|
|
case 125:
|
|
case 126:
|
|
case 127:
|
|
case 128:
|
|
case 129:
|
|
case 130:
|
|
case 131:
|
|
case 132:
|
|
return aarch64_ins_sve_addr_rz_xtw (self, info, code, inst, errors);
|
|
case 133:
|
|
case 134:
|
|
case 135:
|
|
case 136:
|
|
return aarch64_ins_sve_addr_zi_u5 (self, info, code, inst, errors);
|
|
case 137:
|
|
return aarch64_ins_sve_addr_zz_lsl (self, info, code, inst, errors);
|
|
case 138:
|
|
return aarch64_ins_sve_addr_zz_sxtw (self, info, code, inst, errors);
|
|
case 139:
|
|
return aarch64_ins_sve_addr_zz_uxtw (self, info, code, inst, errors);
|
|
case 140:
|
|
return aarch64_ins_sve_aimm (self, info, code, inst, errors);
|
|
case 141:
|
|
return aarch64_ins_sve_asimm (self, info, code, inst, errors);
|
|
case 143:
|
|
return aarch64_ins_sve_float_half_one (self, info, code, inst, errors);
|
|
case 144:
|
|
return aarch64_ins_sve_float_half_two (self, info, code, inst, errors);
|
|
case 145:
|
|
return aarch64_ins_sve_float_zero_one (self, info, code, inst, errors);
|
|
case 148:
|
|
return aarch64_ins_inv_limm (self, info, code, inst, errors);
|
|
case 150:
|
|
return aarch64_ins_sve_limm_mov (self, info, code, inst, errors);
|
|
case 152:
|
|
return aarch64_ins_sve_scale (self, info, code, inst, errors);
|
|
case 164:
|
|
case 165:
|
|
return aarch64_ins_sve_shlimm (self, info, code, inst, errors);
|
|
case 166:
|
|
case 167:
|
|
return aarch64_ins_sve_shrimm (self, info, code, inst, errors);
|
|
case 185:
|
|
case 186:
|
|
case 187:
|
|
return aarch64_ins_sve_quad_index (self, info, code, inst, errors);
|
|
case 189:
|
|
return aarch64_ins_sve_index (self, info, code, inst, errors);
|
|
case 190:
|
|
case 192:
|
|
return aarch64_ins_sve_reglist (self, info, code, inst, errors);
|
|
default: assert (0); abort ();
|
|
}
|
|
}
|