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5b7c81bd8c
* as.h (POISON_BFD_BOOLEAN): Define. * as.c, * as.h, * atof-generic.c, * config/atof-ieee.c, * config/bfin-aux.h, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-elf.h, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arc.h, * config/tc-arm.c, * config/tc-arm.h, * config/tc-avr.c, * config/tc-avr.h, * config/tc-bfin.c, * config/tc-bfin.h, * config/tc-bpf.c, * config/tc-cris.c, * config/tc-csky.c, * config/tc-csky.h, * config/tc-d10v.c, * config/tc-d10v.h, * config/tc-d30v.c, * config/tc-d30v.h, * config/tc-dlx.c, * config/tc-dlx.h, * config/tc-epiphany.c, * config/tc-epiphany.h, * config/tc-fr30.c, * config/tc-fr30.h, * config/tc-frv.c, * config/tc-frv.h, * config/tc-ft32.c, * config/tc-ft32.h, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386-intel.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-iq2000.h, * config/tc-lm32.c, * config/tc-lm32.h, * config/tc-m32c.c, * config/tc-m32c.h, * config/tc-m32r.c, * config/tc-m32r.h, * config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-mcore.c, * config/tc-mcore.h, * config/tc-mep.c, * config/tc-mep.h, * config/tc-metag.c, * config/tc-metag.h, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mips.h, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-mn10300.h, * config/tc-moxie.c, * config/tc-msp430.c, * config/tc-msp430.h, * config/tc-mt.c, * config/tc-mt.h, * config/tc-nds32.c, * config/tc-nds32.h, * config/tc-nios2.c, * config/tc-ns32k.c, * config/tc-or1k.c, * config/tc-or1k.h, * config/tc-pdp11.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-pru.h, * config/tc-riscv.c, * config/tc-riscv.h, * config/tc-rx.c, * config/tc-rx.h, * config/tc-s12z.c, * config/tc-s12z.h, * config/tc-s390.c, * config/tc-score.c, * config/tc-score.h, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sh.h, * config/tc-spu.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tic6x.h, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-v850.h, * config/tc-visium.c, * config/tc-visium.h, * config/tc-wasm32.c, * config/tc-wasm32.h, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xstormy16.h, * config/tc-xtensa.c, * config/tc-xtensa.h, * config/tc-z80.c, * config/tc-z8k.c, * config/xtensa-istack.h, * config/xtensa-relax.c, * config/xtensa-relax.h, * dw2gencfi.c, * dwarf2dbg.c, * dwarf2dbg.h, * expr.c, * expr.h, * frags.c, * frags.h, * listing.c, * macro.c, * output-file.c, * read.c, * read.h, * stabs.c, * symbols.c, * write.c: Replace bfd_boolean with bool, FALSE with false, and TRUE with true.
132 lines
4.3 KiB
C
132 lines
4.3 KiB
C
/* tc-riscv.h -- header file for tc-riscv.c.
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Copyright (C) 2011-2021 Free Software Foundation, Inc.
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Contributed by Andrew Waterman (andrew@sifive.com).
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Based on MIPS target.
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This file is part of GAS.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; see the file COPYING3. If not,
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see <http://www.gnu.org/licenses/>. */
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#ifndef TC_RISCV
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#define TC_RISCV
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#include "opcode/riscv.h"
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struct frag;
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struct expressionS;
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#ifndef TARGET_BYTES_BIG_ENDIAN
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#define TARGET_BYTES_BIG_ENDIAN 0
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#endif
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#define TARGET_ARCH bfd_arch_riscv
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#define WORKING_DOT_WORD 1
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#define LOCAL_LABELS_FB 1
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/* Symbols named FAKE_LABEL_NAME are emitted when generating DWARF, so make
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sure FAKE_LABEL_NAME is printable. It still must be distinct from any
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real label name. So, append a space, which other labels can't contain. */
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#define FAKE_LABEL_NAME RISCV_FAKE_LABEL_NAME
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/* Changing the special character in FAKE_LABEL_NAME requires changing
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FAKE_LABEL_CHAR too. */
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#define FAKE_LABEL_CHAR RISCV_FAKE_LABEL_CHAR
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#define md_relax_frag(segment, fragp, stretch) \
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riscv_relax_frag (segment, fragp, stretch)
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extern int riscv_relax_frag (asection *, struct frag *, long);
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#define md_section_align(seg,size) (size)
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#define md_undefined_symbol(name) (0)
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#define md_operand(x)
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extern bool riscv_frag_align_code (int);
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#define md_do_align(N, FILL, LEN, MAX, LABEL) \
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if ((N) != 0 && !(FILL) && !need_pass_2 && subseg_text_p (now_seg)) \
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{ \
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if (riscv_frag_align_code (N)) \
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goto LABEL; \
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}
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extern void riscv_handle_align (fragS *);
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#define HANDLE_ALIGN riscv_handle_align
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#define MAX_MEM_FOR_RS_ALIGN_CODE (3 + 4)
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/* The ISA of the target may change based on command-line arguments. */
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#define TARGET_FORMAT riscv_target_format ()
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extern const char * riscv_target_format (void);
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#define md_after_parse_args() riscv_after_parse_args ()
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extern void riscv_after_parse_args (void);
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#define md_parse_long_option(arg) riscv_parse_long_option (arg)
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extern int riscv_parse_long_option (const char *);
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#define md_pre_output_hook riscv_pre_output_hook ()
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extern void riscv_pre_output_hook (void);
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/* Let the linker resolve all the relocs due to relaxation. */
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#define tc_fix_adjustable(fixp) 0
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#define md_allow_local_subtract(l,r,s) 0
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/* Values passed to md_apply_fix don't include symbol values. */
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#define MD_APPLY_SYM_VALUE(FIX) 0
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/* Global syms must not be resolved, to support ELF shared libraries. */
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#define EXTERN_FORCE_RELOC \
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(OUTPUT_FLAVOR == bfd_target_elf_flavour)
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/* Postpone text-section label subtraction calculation until linking, since
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linker relaxations might change the deltas. */
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#define TC_FORCE_RELOCATION_SUB_SAME(FIX, SEG) \
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(GENERIC_FORCE_RELOCATION_SUB_SAME (FIX, SEG) \
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|| ((SEG)->flags & SEC_CODE) != 0)
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#define TC_FORCE_RELOCATION_SUB_LOCAL(FIX, SEG) 1
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#define TC_VALIDATE_FIX_SUB(FIX, SEG) 1
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#define TC_FORCE_RELOCATION_LOCAL(FIX) 1
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#define DIFF_EXPR_OK 1
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extern void riscv_pop_insert (void);
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#define md_pop_insert() riscv_pop_insert ()
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#define TARGET_USE_CFIPOP 1
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#define tc_cfi_frame_initial_instructions riscv_cfi_frame_initial_instructions
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extern void riscv_cfi_frame_initial_instructions (void);
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#define tc_regname_to_dw2regnum tc_riscv_regname_to_dw2regnum
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extern int tc_riscv_regname_to_dw2regnum (char *);
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#define DWARF2_DEFAULT_RETURN_COLUMN X_RA
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/* Even on RV64, use 4-byte alignment, as F registers may be only 32 bits. */
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#define DWARF2_CIE_DATA_ALIGNMENT -4
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#define elf_tc_final_processing riscv_elf_final_processing
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extern void riscv_elf_final_processing (void);
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/* Adjust debug_line after relaxation. */
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#define DWARF2_USE_FIXED_ADVANCE_PC 1
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#define md_end riscv_md_end
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#define CONVERT_SYMBOLIC_ATTRIBUTE riscv_convert_symbolic_attribute
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extern void riscv_md_end (void);
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extern int riscv_convert_symbolic_attribute (const char *);
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#endif /* TC_RISCV */
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