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gas/ChangeLog: * as.c (select_emulation_mode): Use startswith. * config/m68k-parse.y: Likewise. * config/obj-aout.c (obj_aout_type): Likewise. * config/obj-elf.c (elf_common_parse): Likewise. (obj_elf_section_type): Likewise. (obj_elf_section_word): Likewise. (obj_elf_section): Likewise. (obj_elf_symver): Likewise. (adjust_stab_sections): Likewise. * config/obj-evax.c (evax_shorten_name): Likewise. * config/obj-macho.c (obj_mach_o_is_frame_section): Likewise. * config/tc-aarch64.c (parse_aarch64_imm_float): Likewise. (aarch64_parse_features): Likewise. (create_register_alias): Likewise. (aarch64_data_in_code): Likewise. (md_parse_option): Likewise. * config/tc-alpha.c (s_alpha_section_word): Likewise. (s_alpha_pdesc): Likewise. * config/tc-arc.c (tokenize_extregister): Likewise. * config/tc-arm.c (create_register_alias): Likewise. (create_neon_reg_alias): Likewise. (parse_ifimm_zero): Likewise. (parse_qfloat_immediate): Likewise. (arm_elf_section_type): Likewise. (arm_parse_extension): Likewise. (aeabi_set_public_attributes): Likewise. (s_arm_arch_extension): Likewise. (arm_data_in_code): Likewise. (start_unwind_section): Likewise. * config/tc-avr.c (avr_ldi_expression): Likewise. * config/tc-csky.c (is_freglist_legal): Likewise. (csky_s_section): Likewise. * config/tc-d30v.c (do_assemble): Likewise. * config/tc-dlx.c (parse_operand): Likewise. * config/tc-epiphany.c (md_assemble): Likewise. * config/tc-h8300.c (h8300_elf_section): Likewise. (get_operand): Likewise. * config/tc-hppa.c (pa_ip): Likewise. (pa_level): Likewise. (pa_space): Likewise. * config/tc-i386.c (i386_mach): Likewise. (md_assemble): Likewise. (check_VecOperations): Likewise. (i386_target_format): Likewise. (i386_elf_section_type): Likewise. * config/tc-ia64.c (start_unwind_section): Likewise. (md_parse_option): Likewise. (is_taken_branch): Likewise. (idesc->name,): Likewise. (note_register_values): Likewise. (do_alias): Likewise. * config/tc-m32c.c (insn_to_subtype): Likewise. * config/tc-m68hc11.c (get_operand): Likewise. (md_assemble): Likewise. * config/tc-m68k.c (m68k_ip): Likewise. (m68k_elf_suffix): Likewise. * config/tc-mcore.c (mcore_s_section): Likewise. * config/tc-metag.c (parse_get_set): Likewise. (md_parse_option): Likewise. * config/tc-microblaze.c (parse_imm): Likewise. (check_got): Likewise. (md_apply_fix): Likewise. * config/tc-mips.c (CPU_HAS_MIPS16): Likewise. (md_begin): Likewise. (s_is_linkonce): Likewise. (check_regno): Likewise. (match_float_constant): Likewise. (classify_vr4120_insn): Likewise. (match_insn): Likewise. (mips_after_parse_args): Likewise. (s_change_sec): Likewise. (s_option): Likewise. (parse_code_option): Likewise. (md_section_align): Likewise. (nopic_need_relax): Likewise. * config/tc-mmix.c (mmix_handle_mmixal): Likewise. * config/tc-mn10300.c (mn10300_fix_adjustable): Likewise. (mn10300_end_of_match): Likewise. * config/tc-msp430.c (msp430_make_init_symbols): Likewise. * config/tc-nds32.c (nds32_parse_option): Likewise. * config/tc-nds32.h (md_do_align): Likewise. * config/tc-nios2.c (strprefix): Likewise. (nios2_special_relocation_p): Likewise. (nios2_parse_base_register): Likewise. (nios2_cons): Likewise. * config/tc-ns32k.c (addr_mode): Likewise. * config/tc-pdp11.c (set_option): Likewise. (parse_reg): Likewise. (parse_ac5): Likewise. (parse_op_no_deferred): Likewise. (set_cpu_model): Likewise. (set_machine_model): Likewise. * config/tc-pj.c (md_operand): Likewise. * config/tc-ppc.c (ppc_set_cpu): Likewise. (ppc_arch): Likewise. (ppc_section_type): Likewise. * config/tc-s12z.c (tb_reg_rel): Likewise. (tb_opr_rel): Likewise. * config/tc-s390.c (s390_parse_cpu): Likewise. (md_parse_option): Likewise. * config/tc-score.c (s3_nopic_need_relax): Likewise. (s3_pic_need_relax): Likewise. * config/tc-score7.c (s7_nopic_need_relax): Likewise. (s7_pic_need_relax): Likewise. * config/tc-sh.h (SUB_SEGMENT_ALIGN): Likewise. * config/tc-sparc.c (md_parse_option): Likewise. (sparc_ip): Likewise. (s_reserve): Likewise. (s_common): Likewise. (s_seg): Likewise. (sparc_cons): Likewise. * config/tc-tic54x.c (stag_add_field): Likewise. (tic54x_endstruct): Likewise. * config/tc-tic6x.c (tic6x_start_unwind_section): Likewise. * config/tc-v850.c (v850_comm): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-vax.c (vax_cons): Likewise. * config/tc-wasm32.c (wasm32_leb128): Likewise. * config/tc-xstormy16.c (md_operand): Likewise. * config/tc-xtensa.c (get_directive): Likewise. (xg_instruction_matches_option_term): Likewise. (is_unaligned_label): Likewise. (cache_literal_section): Likewise. * config/xtensa-relax.c (parse_precond): Likewise. (parse_option_cond): Likewise. (transition_applies): Likewise. (wide_branch_opcode): Likewise. * dw2gencfi.c: Likewise. * dwarf2dbg.c (dwarf2_directive_filename): Likewise. * ehopt.c (get_cie_info): Likewise. * input-file.c (input_file_open): Likewise. * listing.c (listing_newline): Likewise. (debugging_pseudo): Likewise. * read.c (read_a_source_file): Likewise. * write.c (adjust_reloc_syms): Likewise. (compress_debug): Likewise. (maybe_generate_build_notes): Likewise.
500 lines
11 KiB
C
500 lines
11 KiB
C
/* tc-pj.c -- Assemble code for Pico Java
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Copyright (C) 1999-2021 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 51 Franklin Street - Fifth Floor,
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Boston, MA 02110-1301, USA. */
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/* Contributed by Steve Chamberlain of Transmeta <sac@pobox.com>. */
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#include "as.h"
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#include "safe-ctype.h"
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#include "opcode/pj.h"
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extern const pj_opc_info_t pj_opc_info[512];
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const char comment_chars[] = "!/";
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const char line_separator_chars[] = ";";
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const char line_comment_chars[] = "/!#";
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static int pending_reloc;
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static htab_t opcode_hash_control;
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static void
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little (int ignore ATTRIBUTE_UNUSED)
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{
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target_big_endian = 0;
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}
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static void
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big (int ignore ATTRIBUTE_UNUSED)
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{
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target_big_endian = 1;
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}
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const pseudo_typeS md_pseudo_table[] =
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{
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{"ml", little, 0},
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{"mb", big, 0},
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{0, 0, 0}
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};
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const char FLT_CHARS[] = "rRsSfFdDxXpP";
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const char EXP_CHARS[] = "eE";
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void
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md_operand (expressionS *op)
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{
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if (startswith (input_line_pointer, "%hi16"))
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{
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if (pending_reloc)
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as_bad (_("confusing relocation expressions"));
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pending_reloc = BFD_RELOC_PJ_CODE_HI16;
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input_line_pointer += 5;
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expression (op);
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}
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if (startswith (input_line_pointer, "%lo16"))
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{
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if (pending_reloc)
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as_bad (_("confusing relocation expressions"));
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pending_reloc = BFD_RELOC_PJ_CODE_LO16;
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input_line_pointer += 5;
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expression (op);
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}
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}
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/* Parse an expression and then restore the input line pointer. */
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static char *
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parse_exp_save_ilp (char *s, expressionS *op)
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{
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char *save = input_line_pointer;
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input_line_pointer = s;
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expression (op);
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s = input_line_pointer;
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input_line_pointer = save;
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return s;
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}
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/* This is called by emit_expr via TC_CONS_FIX_NEW when creating a
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reloc for a cons. We could use the definition there, except that
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we want to handle magic pending reloc expressions specially. */
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void
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pj_cons_fix_new_pj (fragS *frag, int where, int nbytes, expressionS *exp,
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bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
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{
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static int rv[5][2] =
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{ { 0, 0 },
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{ BFD_RELOC_8, BFD_RELOC_8 },
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{ BFD_RELOC_PJ_CODE_DIR16, BFD_RELOC_16 },
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{ 0, 0 },
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{ BFD_RELOC_PJ_CODE_DIR32, BFD_RELOC_32 }};
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fix_new_exp (frag, where, nbytes, exp, 0,
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pending_reloc ? pending_reloc
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: rv[nbytes][(now_seg->flags & SEC_CODE) ? 0 : 1]);
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pending_reloc = 0;
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}
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/* Turn a reloc description character from the pj-opc.h table into
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code which BFD can handle. */
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static int
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c_to_r (int x)
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{
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switch (x)
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{
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case O_R8:
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return BFD_RELOC_8_PCREL;
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case O_U8:
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case O_8:
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return BFD_RELOC_8;
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case O_R16:
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return BFD_RELOC_PJ_CODE_REL16;
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case O_U16:
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case O_16:
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return BFD_RELOC_PJ_CODE_DIR16;
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case O_R32:
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return BFD_RELOC_PJ_CODE_REL32;
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case O_32:
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return BFD_RELOC_PJ_CODE_DIR32;
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}
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abort ();
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return 0;
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}
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/* Handler for the ipush fake opcode,
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turns ipush <foo> into sipush lo16<foo>, sethi hi16<foo>. */
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static void
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ipush_code (pj_opc_info_t *opcode ATTRIBUTE_UNUSED, char *str)
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{
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char *b = frag_more (6);
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expressionS arg;
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b[0] = 0x11;
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b[3] = 0xed;
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parse_exp_save_ilp (str + 1, &arg);
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if (pending_reloc)
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{
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as_bad (_("can't have relocation for ipush"));
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pending_reloc = 0;
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}
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fix_new_exp (frag_now, b - frag_now->fr_literal + 1, 2,
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&arg, 0, BFD_RELOC_PJ_CODE_DIR16);
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fix_new_exp (frag_now, b - frag_now->fr_literal + 4, 2,
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&arg, 0, BFD_RELOC_PJ_CODE_HI16);
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}
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/* Insert names into the opcode table which are really mini macros,
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not opcodes. The fakeness is indicated with an opcode of -1. */
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static void
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fake_opcode (const char *name,
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void (*func) (struct pj_opc_info_t *, char *))
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{
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pj_opc_info_t * fake = XNEW (pj_opc_info_t);
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fake->opcode = -1;
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fake->opcode_next = -1;
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fake->u.func = func;
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str_hash_insert (opcode_hash_control, name, fake, 0);
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}
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/* Enter another entry into the opcode hash table so the same opcode
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can have another name. */
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static void
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alias (const char *new_name, const char *old)
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{
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str_hash_insert (opcode_hash_control, new_name,
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str_hash_find (opcode_hash_control, old), 0);
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}
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/* This function is called once, at assembler startup time. It sets
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up the hash table with all the opcodes in it, and also initializes
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some aliases for compatibility with other assemblers. */
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void
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md_begin (void)
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{
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const pj_opc_info_t *opcode;
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opcode_hash_control = str_htab_create ();
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/* Insert names into hash table. */
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for (opcode = pj_opc_info; opcode->u.name; opcode++)
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str_hash_insert (opcode_hash_control, opcode->u.name, opcode, 0);
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/* Insert the only fake opcode. */
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fake_opcode ("ipush", ipush_code);
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/* Add some aliases for opcode names. */
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alias ("ifeq_s", "ifeq");
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alias ("ifne_s", "ifne");
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alias ("if_icmpge_s", "if_icmpge");
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alias ("if_icmpne_s", "if_icmpne");
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alias ("if_icmpeq_s", "if_icmpeq");
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alias ("if_icmpgt_s", "if_icmpgt");
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alias ("goto_s", "goto");
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bfd_set_arch_mach (stdoutput, TARGET_ARCH, 0);
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}
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/* This is the guts of the machine-dependent assembler. STR points to
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a machine dependent instruction. This function is supposed to emit
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the frags/bytes it assembles to. */
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void
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md_assemble (char *str)
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{
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char *op_start;
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char *op_end;
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pj_opc_info_t *opcode;
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char *output;
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int idx = 0;
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char pend;
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int nlen = 0;
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/* Drop leading whitespace. */
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while (*str == ' ')
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str++;
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/* Find the op code end. */
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op_start = str;
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for (op_end = str;
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*op_end && !is_end_of_line[*op_end & 0xff] && *op_end != ' ';
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op_end++)
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nlen++;
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pend = *op_end;
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*op_end = 0;
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if (nlen == 0)
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as_bad (_("can't find opcode "));
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opcode = (pj_opc_info_t *) str_hash_find (opcode_hash_control, op_start);
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*op_end = pend;
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if (opcode == NULL)
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{
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as_bad (_("unknown opcode %s"), op_start);
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return;
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}
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dwarf2_emit_insn (0);
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if (opcode->opcode == -1)
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{
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/* It's a fake opcode. Dig out the args and pretend that was
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what we were passed. */
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(*opcode->u.func) (opcode, op_end);
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}
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else
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{
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unsigned int an;
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output = frag_more (opcode->len);
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output[idx++] = opcode->opcode;
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if (opcode->opcode_next != -1)
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output[idx++] = opcode->opcode_next;
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for (an = 0; an < ARRAY_SIZE (opcode->arg) && opcode->arg[an]; an++)
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{
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expressionS arg;
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if (*op_end == ',' && an != 0)
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op_end++;
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if (*op_end == 0)
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as_bad (_("expected expression"));
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op_end = parse_exp_save_ilp (op_end, &arg);
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fix_new_exp (frag_now,
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output - frag_now->fr_literal + idx,
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ASIZE (opcode->arg[an]),
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&arg,
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PCREL (opcode->arg[an]),
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pending_reloc ? pending_reloc : c_to_r (opcode->arg[an]));
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idx += ASIZE (opcode->arg[an]);
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pending_reloc = 0;
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}
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while (ISSPACE (*op_end))
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op_end++;
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if (*op_end != 0)
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as_warn (_("extra stuff on line ignored"));
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}
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if (pending_reloc)
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as_bad (_("Something forgot to clean up\n"));
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}
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const char *
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md_atof (int type, char *litP, int *sizeP)
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{
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return ieee_md_atof (type, litP, sizeP, target_big_endian);
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}
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const char *md_shortopts = "";
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struct option md_longopts[] =
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{
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#define OPTION_LITTLE (OPTION_MD_BASE)
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#define OPTION_BIG (OPTION_LITTLE + 1)
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{"little", no_argument, NULL, OPTION_LITTLE},
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{"big", no_argument, NULL, OPTION_BIG},
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{NULL, no_argument, NULL, 0}
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};
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size_t md_longopts_size = sizeof (md_longopts);
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int
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md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
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{
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switch (c)
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{
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case OPTION_LITTLE:
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little (0);
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break;
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case OPTION_BIG:
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big (0);
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break;
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default:
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return 0;
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}
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return 1;
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}
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void
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md_show_usage (FILE *stream)
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{
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fprintf (stream, _("\
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PJ options:\n\
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-little generate little endian code\n\
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-big generate big endian code\n"));
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}
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/* Apply a fixup to the object file. */
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void
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md_apply_fix (fixS *fixP, valueT * valP, segT seg ATTRIBUTE_UNUSED)
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{
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char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
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long val = *valP;
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long max, min;
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max = min = 0;
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switch (fixP->fx_r_type)
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{
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case BFD_RELOC_VTABLE_INHERIT:
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case BFD_RELOC_VTABLE_ENTRY:
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fixP->fx_done = 0;
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return;
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case BFD_RELOC_PJ_CODE_REL16:
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if (val < -0x8000 || val >= 0x7fff)
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as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far"));
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buf[0] |= (val >> 8) & 0xff;
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buf[1] = val & 0xff;
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break;
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case BFD_RELOC_PJ_CODE_HI16:
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*buf++ = val >> 24;
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*buf++ = val >> 16;
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fixP->fx_addnumber = val & 0xffff;
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break;
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case BFD_RELOC_PJ_CODE_DIR16:
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case BFD_RELOC_PJ_CODE_LO16:
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*buf++ = val >> 8;
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*buf++ = val >> 0;
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max = 0xffff;
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min = -0xffff;
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break;
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case BFD_RELOC_8:
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max = 0xff;
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min = -0xff;
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*buf++ = val;
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break;
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case BFD_RELOC_PJ_CODE_DIR32:
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*buf++ = val >> 24;
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*buf++ = val >> 16;
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*buf++ = val >> 8;
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*buf++ = val >> 0;
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break;
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case BFD_RELOC_32:
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if (target_big_endian)
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{
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*buf++ = val >> 24;
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||
*buf++ = val >> 16;
|
||
*buf++ = val >> 8;
|
||
*buf++ = val >> 0;
|
||
}
|
||
else
|
||
{
|
||
*buf++ = val >> 0;
|
||
*buf++ = val >> 8;
|
||
*buf++ = val >> 16;
|
||
*buf++ = val >> 24;
|
||
}
|
||
break;
|
||
|
||
case BFD_RELOC_16:
|
||
if (target_big_endian)
|
||
{
|
||
*buf++ = val >> 8;
|
||
*buf++ = val >> 0;
|
||
}
|
||
else
|
||
{
|
||
*buf++ = val >> 0;
|
||
*buf++ = val >> 8;
|
||
}
|
||
break;
|
||
|
||
case BFD_RELOC_PJ_CODE_REL32:
|
||
fixP->fx_done = 0;
|
||
return;
|
||
|
||
default:
|
||
abort ();
|
||
}
|
||
|
||
if (max != 0 && (val < min || val > max))
|
||
as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range"));
|
||
|
||
if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
|
||
fixP->fx_done = 1;
|
||
}
|
||
|
||
/* Put number into target byte order. Always put values in an
|
||
executable section into big endian order. */
|
||
|
||
void
|
||
md_number_to_chars (char *ptr, valueT use, int nbytes)
|
||
{
|
||
if (target_big_endian || now_seg->flags & SEC_CODE)
|
||
number_to_chars_bigendian (ptr, use, nbytes);
|
||
else
|
||
number_to_chars_littleendian (ptr, use, nbytes);
|
||
}
|
||
|
||
/* Translate internal representation of relocation info to BFD target
|
||
format. */
|
||
|
||
arelent *
|
||
tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
|
||
{
|
||
arelent *rel;
|
||
bfd_reloc_code_real_type r_type;
|
||
|
||
rel = XNEW (arelent);
|
||
rel->sym_ptr_ptr = XNEW (asymbol *);
|
||
*rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
|
||
rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
|
||
|
||
r_type = fixp->fx_r_type;
|
||
rel->addend = fixp->fx_addnumber;
|
||
rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
|
||
|
||
if (rel->howto == NULL)
|
||
{
|
||
as_bad_where (fixp->fx_file, fixp->fx_line,
|
||
_("Cannot represent relocation type %s"),
|
||
bfd_get_reloc_code_name (r_type));
|
||
/* Set howto to a garbage value so that we can keep going. */
|
||
rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
|
||
gas_assert (rel->howto != NULL);
|
||
}
|
||
|
||
return rel;
|
||
}
|