mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-06 00:34:26 +08:00
4de283e4b5
Andreas Schwab and John Baldwin pointed out some bugs in the header sorting patch; and I noticed that the output was not correct when limited to a subset of files (a bug in my script). So, I'm reverting the patch. I may try again after fixing the issues pointed out. gdb/ChangeLog 2019-04-05 Tom Tromey <tom@tromey.com> Revert the header-sorting patch. * ft32-tdep.c: Revert. * frv-tdep.c: Revert. * frv-linux-tdep.c: Revert. * frame.c: Revert. * frame-unwind.c: Revert. * frame-base.c: Revert. * fork-child.c: Revert. * findvar.c: Revert. * findcmd.c: Revert. * filesystem.c: Revert. * filename-seen-cache.h: Revert. * filename-seen-cache.c: Revert. * fbsd-tdep.c: Revert. * fbsd-nat.h: Revert. * fbsd-nat.c: Revert. * f-valprint.c: Revert. * f-typeprint.c: Revert. * f-lang.c: Revert. * extension.h: Revert. * extension.c: Revert. * extension-priv.h: Revert. * expprint.c: Revert. * exec.h: Revert. * exec.c: Revert. * exceptions.c: Revert. * event-top.c: Revert. * event-loop.c: Revert. * eval.c: Revert. * elfread.c: Revert. * dwarf2read.h: Revert. * dwarf2read.c: Revert. * dwarf2loc.c: Revert. * dwarf2expr.h: Revert. * dwarf2expr.c: Revert. * dwarf2-frame.c: Revert. * dwarf2-frame-tailcall.c: Revert. * dwarf-index-write.h: Revert. * dwarf-index-write.c: Revert. * dwarf-index-common.c: Revert. * dwarf-index-cache.h: Revert. * dwarf-index-cache.c: Revert. * dummy-frame.c: Revert. * dtrace-probe.c: Revert. * disasm.h: Revert. * disasm.c: Revert. * disasm-selftests.c: Revert. * dictionary.c: Revert. * dicos-tdep.c: Revert. * demangle.c: Revert. * dcache.h: Revert. * dcache.c: Revert. * darwin-nat.h: Revert. * darwin-nat.c: Revert. * darwin-nat-info.c: Revert. * d-valprint.c: Revert. * d-namespace.c: Revert. * d-lang.c: Revert. * ctf.c: Revert. * csky-tdep.c: Revert. * csky-linux-tdep.c: Revert. * cris-tdep.c: Revert. * cris-linux-tdep.c: Revert. * cp-valprint.c: Revert. * cp-support.c: Revert. * cp-namespace.c: Revert. * cp-abi.c: Revert. * corelow.c: Revert. * corefile.c: Revert. * continuations.c: Revert. * completer.h: Revert. * completer.c: Revert. * complaints.c: Revert. * coffread.c: Revert. * coff-pe-read.c: Revert. * cli-out.h: Revert. * cli-out.c: Revert. * charset.c: Revert. * c-varobj.c: Revert. * c-valprint.c: Revert. * c-typeprint.c: Revert. * c-lang.c: Revert. * buildsym.c: Revert. * buildsym-legacy.c: Revert. * build-id.h: Revert. * build-id.c: Revert. * btrace.c: Revert. * bsd-uthread.c: Revert. * breakpoint.h: Revert. * breakpoint.c: Revert. * break-catch-throw.c: Revert. * break-catch-syscall.c: Revert. * break-catch-sig.c: Revert. * blockframe.c: Revert. * block.c: Revert. * bfin-tdep.c: Revert. * bfin-linux-tdep.c: Revert. * bfd-target.c: Revert. * bcache.c: Revert. * ax-general.c: Revert. * ax-gdb.h: Revert. * ax-gdb.c: Revert. * avr-tdep.c: Revert. * auxv.c: Revert. * auto-load.c: Revert. * arm-wince-tdep.c: Revert. * arm-tdep.c: Revert. * arm-symbian-tdep.c: Revert. * arm-pikeos-tdep.c: Revert. * arm-obsd-tdep.c: Revert. * arm-nbsd-tdep.c: Revert. * arm-nbsd-nat.c: Revert. * arm-linux-tdep.c: Revert. * arm-linux-nat.c: Revert. * arm-fbsd-tdep.c: Revert. * arm-fbsd-nat.c: Revert. * arm-bsd-tdep.c: Revert. * arch-utils.c: Revert. * arc-tdep.c: Revert. * arc-newlib-tdep.c: Revert. * annotate.h: Revert. * annotate.c: Revert. * amd64-windows-tdep.c: Revert. * amd64-windows-nat.c: Revert. * amd64-tdep.c: Revert. * amd64-sol2-tdep.c: Revert. * amd64-obsd-tdep.c: Revert. * amd64-obsd-nat.c: Revert. * amd64-nbsd-tdep.c: Revert. * amd64-nbsd-nat.c: Revert. * amd64-nat.c: Revert. * amd64-linux-tdep.c: Revert. * amd64-linux-nat.c: Revert. * amd64-fbsd-tdep.c: Revert. * amd64-fbsd-nat.c: Revert. * amd64-dicos-tdep.c: Revert. * amd64-darwin-tdep.c: Revert. * amd64-bsd-nat.c: Revert. * alpha-tdep.c: Revert. * alpha-obsd-tdep.c: Revert. * alpha-nbsd-tdep.c: Revert. * alpha-mdebug-tdep.c: Revert. * alpha-linux-tdep.c: Revert. * alpha-linux-nat.c: Revert. * alpha-bsd-tdep.c: Revert. * alpha-bsd-nat.c: Revert. * aix-thread.c: Revert. * agent.c: Revert. * addrmap.c: Revert. * ada-varobj.c: Revert. * ada-valprint.c: Revert. * ada-typeprint.c: Revert. * ada-tasks.c: Revert. * ada-lang.c: Revert. * aarch64-tdep.c: Revert. * aarch64-ravenscar-thread.c: Revert. * aarch64-newlib-tdep.c: Revert. * aarch64-linux-tdep.c: Revert. * aarch64-linux-nat.c: Revert. * aarch64-fbsd-tdep.c: Revert. * aarch64-fbsd-nat.c: Revert. * aarch32-linux-nat.c: Revert.
456 lines
11 KiB
C
456 lines
11 KiB
C
/* Native-dependent code for BSD Unix running on ARM's, for GDB.
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Copyright (C) 1988-2019 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbcore.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "target.h"
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#include <sys/types.h>
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#include <sys/ptrace.h>
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#include <machine/reg.h>
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#include <machine/frame.h>
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#include "arm-tdep.h"
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#include "inf-ptrace.h"
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class arm_netbsd_nat_target final : public inf_ptrace_target
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{
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public:
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/* Add our register access methods. */
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void fetch_registers (struct regcache *, int) override;
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void store_registers (struct regcache *, int) override;
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};
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static arm_netbsd_nat_target the_arm_netbsd_nat_target;
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extern int arm_apcs_32;
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static void
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arm_supply_gregset (struct regcache *regcache, struct reg *gregset)
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{
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int regno;
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CORE_ADDR r_pc;
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/* Integer registers. */
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache->raw_supply (regno, (char *) &gregset->r[regno]);
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regcache->raw_supply (ARM_SP_REGNUM, (char *) &gregset->r_sp);
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regcache->raw_supply (ARM_LR_REGNUM, (char *) &gregset->r_lr);
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/* This is ok: we're running native... */
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r_pc = gdbarch_addr_bits_remove (regcache->arch (), gregset->r_pc);
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regcache->raw_supply (ARM_PC_REGNUM, (char *) &r_pc);
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if (arm_apcs_32)
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regcache->raw_supply (ARM_PS_REGNUM, (char *) &gregset->r_cpsr);
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else
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regcache->raw_supply (ARM_PS_REGNUM, (char *) &gregset->r_pc);
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}
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static void
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arm_supply_fparegset (struct regcache *regcache, struct fpreg *fparegset)
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{
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache->raw_supply (regno,
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(char *) &fparegset->fpr[regno - ARM_F0_REGNUM]);
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regcache->raw_supply (ARM_FPS_REGNUM, (char *) &fparegset->fpr_fpsr);
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}
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static void
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fetch_register (struct regcache *regcache, int regno)
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{
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general register"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache->raw_supply (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache->raw_supply (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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/* This is ok: we're running native... */
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(regcache->arch (),
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inferior_registers.r_pc);
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regcache->raw_supply (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache->raw_supply (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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regcache->raw_supply (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_pc);
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break;
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default:
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regcache->raw_supply (regno, (char *) &inferior_registers.r[regno]);
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break;
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}
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}
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static void
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fetch_regs (struct regcache *regcache)
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{
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struct reg inferior_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_gregset (regcache, &inferior_registers);
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}
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static void
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fetch_fp_register (struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point register"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache->raw_supply (ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache->raw_supply
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(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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}
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static void
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fetch_fp_regs (struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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arm_supply_fparegset (regcache, &inferior_fp_registers);
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}
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void
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arm_nbsd_nat_target::fetch_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
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fetch_register (regcache, regno);
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else
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fetch_fp_register (regcache, regno);
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}
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else
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{
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fetch_regs (regcache);
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fetch_fp_regs (regcache);
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}
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}
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static void
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store_register (const struct regcache *regcache, int regno)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct reg inferior_registers;
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int ret;
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ret = ptrace (PT_GETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch general registers"));
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return;
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}
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switch (regno)
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{
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case ARM_SP_REGNUM:
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regcache->raw_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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break;
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case ARM_LR_REGNUM:
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regcache->raw_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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break;
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case ARM_PC_REGNUM:
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if (arm_apcs_32)
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regcache->raw_collect (ARM_PC_REGNUM,
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(char *) &inferior_registers.r_pc);
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else
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{
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unsigned pc_val;
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &pc_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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inferior_registers.r_pc ^= gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= pc_val;
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}
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break;
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case ARM_PS_REGNUM:
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if (arm_apcs_32)
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regcache->raw_collect (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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else
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{
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unsigned psr_val;
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regcache->raw_collect (ARM_PS_REGNUM, (char *) &psr_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = gdbarch_addr_bits_remove
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(gdbarch, inferior_registers.r_pc);
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inferior_registers.r_pc |= psr_val;
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}
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break;
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default:
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regcache->raw_collect (regno, (char *) &inferior_registers.r[regno]);
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break;
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}
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ret = ptrace (PT_SETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_regs (const struct regcache *regcache)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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struct reg inferior_registers;
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int ret;
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int regno;
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for (regno = ARM_A1_REGNUM; regno < ARM_SP_REGNUM; regno++)
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regcache->raw_collect (regno, (char *) &inferior_registers.r[regno]);
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regcache->raw_collect (ARM_SP_REGNUM, (char *) &inferior_registers.r_sp);
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regcache->raw_collect (ARM_LR_REGNUM, (char *) &inferior_registers.r_lr);
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if (arm_apcs_32)
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{
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &inferior_registers.r_pc);
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regcache->raw_collect (ARM_PS_REGNUM,
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(char *) &inferior_registers.r_cpsr);
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}
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else
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{
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unsigned pc_val;
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unsigned psr_val;
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regcache->raw_collect (ARM_PC_REGNUM, (char *) &pc_val);
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regcache->raw_collect (ARM_PS_REGNUM, (char *) &psr_val);
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pc_val = gdbarch_addr_bits_remove (gdbarch, pc_val);
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psr_val ^= gdbarch_addr_bits_remove (gdbarch, psr_val);
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inferior_registers.r_pc = pc_val | psr_val;
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}
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ret = ptrace (PT_SETREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_registers, 0);
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if (ret < 0)
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warning (_("unable to store general registers"));
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}
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static void
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store_fp_register (const struct regcache *regcache, int regno)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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ret = ptrace (PT_GETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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{
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warning (_("unable to fetch floating-point registers"));
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return;
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}
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switch (regno)
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{
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case ARM_FPS_REGNUM:
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regcache->raw_collect (ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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break;
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default:
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regcache->raw_collect
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(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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break;
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}
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ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to write register %d to inferior"), regno);
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}
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static void
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store_fp_regs (const struct regcache *regcache)
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{
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struct fpreg inferior_fp_registers;
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int ret;
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int regno;
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for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
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regcache->raw_collect
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(regno, (char *) &inferior_fp_registers.fpr[regno - ARM_F0_REGNUM]);
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regcache->raw_collect (ARM_FPS_REGNUM,
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(char *) &inferior_fp_registers.fpr_fpsr);
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ret = ptrace (PT_SETFPREGS, regcache->ptid ().pid (),
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(PTRACE_TYPE_ARG3) &inferior_fp_registers, 0);
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if (ret < 0)
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warning (_("unable to store floating-point registers"));
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}
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void
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arm_nbsd_nat_target::store_registers (struct regcache *regcache, int regno)
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{
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if (regno >= 0)
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{
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if (regno < ARM_F0_REGNUM || regno > ARM_FPS_REGNUM)
|
|
store_register (regcache, regno);
|
|
else
|
|
store_fp_register (regcache, regno);
|
|
}
|
|
else
|
|
{
|
|
store_regs (regcache);
|
|
store_fp_regs (regcache);
|
|
}
|
|
}
|
|
|
|
static void
|
|
fetch_elfcore_registers (struct regcache *regcache,
|
|
char *core_reg_sect, unsigned core_reg_size,
|
|
int which, CORE_ADDR ignore)
|
|
{
|
|
struct reg gregset;
|
|
struct fpreg fparegset;
|
|
|
|
switch (which)
|
|
{
|
|
case 0: /* Integer registers. */
|
|
if (core_reg_size != sizeof (struct reg))
|
|
warning (_("wrong size of register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&gregset, core_reg_sect, sizeof (gregset));
|
|
arm_supply_gregset (regcache, &gregset);
|
|
}
|
|
break;
|
|
|
|
case 2:
|
|
if (core_reg_size != sizeof (struct fpreg))
|
|
warning (_("wrong size of FPA register set in core file"));
|
|
else
|
|
{
|
|
/* The memcpy may be unnecessary, but we can't really be sure
|
|
of the alignment of the data in the core file. */
|
|
memcpy (&fparegset, core_reg_sect, sizeof (fparegset));
|
|
arm_supply_fparegset (regcache, &fparegset);
|
|
}
|
|
break;
|
|
|
|
default:
|
|
/* Don't know what kind of register request this is; just ignore it. */
|
|
break;
|
|
}
|
|
}
|
|
|
|
static struct core_fns arm_netbsd_elfcore_fns =
|
|
{
|
|
bfd_target_elf_flavour, /* core_flovour. */
|
|
default_check_format, /* check_format. */
|
|
default_core_sniffer, /* core_sniffer. */
|
|
fetch_elfcore_registers, /* core_read_registers. */
|
|
NULL
|
|
};
|
|
|
|
void
|
|
_initialize_arm_netbsd_nat (void)
|
|
{
|
|
add_inf_child_target (&the_arm_netbsd_nat_target);
|
|
|
|
deprecated_add_core_fns (&arm_netbsd_elfcore_fns);
|
|
}
|