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This commit is the result of running the gdb/copyright.py script, which automated the update of the copyright year range for all source files managed by the GDB project to be updated to include year 2023.
133 lines
3.5 KiB
C
133 lines
3.5 KiB
C
/* Memory attributes support, for GDB.
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Copyright (C) 2001-2023 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef MEMATTR_H
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#define MEMATTR_H
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enum mem_access_mode
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{
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MEM_NONE, /* Memory that is not physically present. */
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MEM_RW, /* read/write */
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MEM_RO, /* read only */
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MEM_WO, /* write only */
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/* Read/write, but special steps are required to write to it. */
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MEM_FLASH
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};
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enum mem_access_width
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{
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MEM_WIDTH_UNSPECIFIED,
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MEM_WIDTH_8, /* 8 bit accesses */
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MEM_WIDTH_16, /* 16 " " */
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MEM_WIDTH_32, /* 32 " " */
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MEM_WIDTH_64 /* 64 " " */
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};
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/* The set of all attributes that can be set for a memory region.
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This structure was created so that memory attributes can be passed
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to target_ functions without exposing the details of memory region
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list, which would be necessary if these fields were simply added to
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the mem_region structure.
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FIXME: It would be useful if there was a mechanism for targets to
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add their own attributes. For example, the number of wait states. */
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struct mem_attrib
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{
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static mem_attrib unknown ()
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{
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mem_attrib attrib;
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attrib.mode = MEM_NONE;
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return attrib;
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}
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/* read/write, read-only, or write-only */
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enum mem_access_mode mode = MEM_RW;
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enum mem_access_width width = MEM_WIDTH_UNSPECIFIED;
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/* enables hardware breakpoints */
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int hwbreak = 0;
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/* enables host-side caching of memory region data */
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int cache = 0;
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/* Enables memory verification. After a write, memory is re-read
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to verify that the write was successful. */
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int verify = 0;
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/* Block size. Only valid if mode == MEM_FLASH. */
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int blocksize = -1;
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};
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struct mem_region
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{
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/* Create a mem_region with default attributes. */
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mem_region (CORE_ADDR lo_, CORE_ADDR hi_)
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: lo (lo_), hi (hi_)
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{}
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/* Create a mem_region with access mode MODE_, but otherwise default
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attributes. */
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mem_region (CORE_ADDR lo_, CORE_ADDR hi_, mem_access_mode mode_)
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: lo (lo_), hi (hi_)
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{
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attrib.mode = mode_;
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}
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/* Create a mem_region with attributes ATTRIB_. */
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mem_region (CORE_ADDR lo_, CORE_ADDR hi_, const mem_attrib &attrib_)
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: lo (lo_), hi (hi_), attrib (attrib_)
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{}
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bool operator< (const mem_region &other) const
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{
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return this->lo < other.lo;
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}
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/* Lowest address in the region. */
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CORE_ADDR lo;
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/* Address past the highest address of the region.
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If 0, upper bound is "infinity". */
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CORE_ADDR hi;
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/* Item number of this memory region. */
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int number = 0;
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/* Status of this memory region (enabled if true, otherwise
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disabled). */
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bool enabled_p = true;
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/* Attributes for this region. */
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mem_attrib attrib;
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};
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extern struct mem_region *lookup_mem_region (CORE_ADDR);
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void invalidate_target_mem_regions (void);
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#endif /* MEMATTR_H */
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