mirror of
https://sourceware.org/git/binutils-gdb.git
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1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
107606 lines
3.2 MiB
107606 lines
3.2 MiB
/* Simulator model support for frvbf.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright (C) 1996-2024 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This file is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3, or (at your option)
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any later version.
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It is distributed in the hope that it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#define WANT_CPU frvbf
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#define WANT_CPU_FRVBF
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#include "sim-main.h"
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/* The profiling data is recorded here, but is accessed via the profiling
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mechanism. After all, this is information for profiling. */
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#if WITH_PROFILE_MODEL_P
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/* Model handlers for each insn. */
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static int
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model_frv_add (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_sub (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_and (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_or (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_xor (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_not (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_scutss.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_sdiv (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_nsdiv (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_udiv (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_nudiv (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_smul (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_smulcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_umul (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_smulcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_smu (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_smass.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_smass (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_smass.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_smsss (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_smass.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_sll (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_srl (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_sra (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_slass (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_scutss (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_scutss.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_scan (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_addcc.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_cadd (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_cswap.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_csub (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_cswap.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_cand (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_cswap.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_cor (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_cswap.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_cxor (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_cswap.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_cnot (SIM_CPU *current_cpu, void *sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_cswap.f
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const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
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const IDESC * UNUSED idesc = abuf->idesc;
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int cycles = 0;
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{
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int referenced = 0;
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int UNUSED insn_referenced = abuf->written;
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cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
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}
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return cycles;
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#undef FLD
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}
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static int
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model_frv_csmul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csrl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cscan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_andcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_orcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_xorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_srlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_smulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_umulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_caddcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csubcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csmulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_csmulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_candcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_corcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cxorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csrlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_andi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_xori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nsdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_udivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nudivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_smuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_umuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_slli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_srli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_srai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_scani (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_andicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_oricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_xoricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_smulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_umulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sllicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_srlicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sraicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_addxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_subxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmpb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmpba (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_setlo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlo.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sethi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_sethi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_setlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lddc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lddcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nlddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_st (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_std (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stdc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stdcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cst (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_csthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cstdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sthi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_sthfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stdi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stdfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_stqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_swap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_swapi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cswap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movgfq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgfq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movfgq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movfgq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmovgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmovfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmovgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmovfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movgs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_movsg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movsg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_beq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_blt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fblg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fblt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bctrlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_beqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_blelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_blslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bhilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bceqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bclelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bclslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bchilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bcnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_jmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_calll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_jmpil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_callil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_call (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_call.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_rett (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_rett.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_rei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_teq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_thi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fteq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftlg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fto (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tils (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tihi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tic (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tinc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tin (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tip (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tinv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftilg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftiue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftiul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftiuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftiug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftiule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ftio (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_break (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mtrap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_andcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_orcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_xorcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nandcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_norcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_andncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_orncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nandncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_norncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_notcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ccklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ccknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ccknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cjmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ccalll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_ici (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_dci (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_icei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_dcei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_dcf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_dcef (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_witlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_wdtlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_itlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_dtlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_icpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_dcpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_icul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_dcul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_bar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_membar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lrai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_lrad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_tlbpr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clrgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clrfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clrga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_clrfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_commitgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_commitfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_commitga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_commitfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fitod (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fitod.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdtoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdtoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfitos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmovd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fnegd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fabsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fsqrtd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_faddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmuld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdivd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fcmpd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcmpd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmaddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fmsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_nfdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mhsetlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mhsethis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mhdsets (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdsets.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mhsetloh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetloh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mhsethih (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethih.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mhdseth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdseth.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mrotri (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mwcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mwcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mdcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdcutssi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_maveh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msrlhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mdrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdrotli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcplhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcplhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcpli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqsaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msathu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcmpsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcmpuh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mabshs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mabshs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_maddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_maddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqlclrhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqlmths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqsllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqsrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_maddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_msubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mdaddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mdsubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_masaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mdasaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmrdhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mmrdhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqxmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqxmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mqcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mdpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_munpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_munpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mdunpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdunpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_cmbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mclracc_0 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mclracc_1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mrdacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mrdaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mrdaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mwtacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mwtaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwtaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_mcop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_frv_fnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_frv_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_add (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_and (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_or (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_xor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_not (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nsdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_udiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_smul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_umul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_smu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_smass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_smsss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_srl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_slass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_scutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_scan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cadd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csmul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csrl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cscan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_andcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_orcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_xorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_srlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_smulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_umulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_caddcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csubcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csmulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_csmulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_candcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_corcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cxorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csrlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_andi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_xori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nsdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_udivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nudivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_smuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_umuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_slli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_srli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_srai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_scani (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_andicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_oricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_xoricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_smulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_umulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sllicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_srlicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sraicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_addxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_subxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmpb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmpba (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_setlo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlo.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRklo = FLD (out_GRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sethi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_sethi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRkhi = FLD (out_GRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_setlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lddc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lddcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nlddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_st (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_std (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stdc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stdcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cst (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_csthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cstdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sthi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_sthfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stdi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stdfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_stqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_swap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_swapi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cswap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movgfq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgfq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movfgq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movfgq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmovgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmovfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmovgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmovfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movgs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_spr = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_spr = FLD (out_spr);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_gr2spr (current_cpu, idesc, 0, referenced, in_GRj, out_spr);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_movsg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movsg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_spr = -1;
|
|
INT out_GRj = -1;
|
|
in_spr = FLD (in_spr);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_spr2gr (current_cpu, idesc, 0, referenced, in_spr, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_beq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_blt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fblg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fblt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bctrlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_beqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_blelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_blslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bhilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bceqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bclelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bclslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bchilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bcnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_jmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_calll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_jmpil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_callil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_call (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_call.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_rett (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_rett.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_rei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_teq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_thi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fteq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftlg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fto (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tils (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tihi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tic (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tinc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tin (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tip (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tinv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftilg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftiue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftiul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftiuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftiug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftiule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ftio (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_break (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mtrap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_andcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_orcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_xorcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nandcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_norcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_andncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_orncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nandncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_norncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_notcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ccklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ccknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ccknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cjmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ccalll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_ici (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_ici (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_dci (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_dci (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_icei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_ici (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_dcei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_dci (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_dcf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_dcf (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_dcef (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_dcf (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_witlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_wdtlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_itlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_dtlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_icpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_icpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_dcpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_dcpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_icul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_icul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_dcul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_dcul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_bar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_membar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lrai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_lrad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_tlbpr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clrgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_clrgr (current_cpu, idesc, 0, referenced, in_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clrfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRk = -1;
|
|
in_FRk = FLD (in_FRk);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_clrfr (current_cpu, idesc, 0, referenced, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clrga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
cycles += frvbf_model_fr550_u_clrgr (current_cpu, idesc, 0, referenced, in_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_clrfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr550_u_clrfr (current_cpu, idesc, 0, referenced, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_commitgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr550_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_commitfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr550_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_commitga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr550_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_commitfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr550_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fitod (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fitod.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdtoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdtoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfitos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmovd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT out_FRk = -1;
|
|
cycles += frvbf_model_fr550_u_fr2fr (current_cpu, idesc, 0, referenced, in_FRi, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT out_FRk = -1;
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_fr2fr (current_cpu, idesc, 0, referenced, in_FRi, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fnegd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fabsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_float_sqrt (current_cpu, idesc, 0, referenced, in_FRj, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fsqrtd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_float_sqrt (current_cpu, idesc, 0, referenced, in_FRj, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_float_sqrt (current_cpu, idesc, 0, referenced, in_FRj, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_float_div (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_faddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmuld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdivd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_float_div (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_float_div (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fcmpd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcmpd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_float_dual_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmaddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fmsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr550_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_nfdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mhsetlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRklo);
|
|
cycles += frvbf_model_fr550_u_media_set (current_cpu, idesc, 0, referenced, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mhsethis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRkhi);
|
|
cycles += frvbf_model_fr550_u_media_set (current_cpu, idesc, 0, referenced, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mhdsets (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdsets.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_media_set (current_cpu, idesc, 0, referenced, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mhsetloh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetloh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRklo);
|
|
cycles += frvbf_model_fr550_u_media_set (current_cpu, idesc, 0, referenced, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mhsethih (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethih.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRkhi);
|
|
cycles += frvbf_model_fr550_u_media_set (current_cpu, idesc, 0, referenced, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mhdseth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdseth.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_media_set (current_cpu, idesc, 0, referenced, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mrotri (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mwcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mwcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_3_acc (current_cpu, idesc, 0, referenced, in_FRintj, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_3_acc (current_cpu, idesc, 0, referenced, in_FRintj, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_3_acc (current_cpu, idesc, 0, referenced, in_FRintj, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_3_acc (current_cpu, idesc, 0, referenced, in_FRintj, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mdcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdcutssi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_3_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_maveh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msrlhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mdrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdrotli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcplhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcplhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcpli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqsaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 14)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msathu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcmpsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcmpuh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mabshs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mabshs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_maddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_maddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 14)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 14)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 14)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 14)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 16)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 16)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 16)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 16)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqlclrhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqlmths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqsllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqsrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_maddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_4_acc (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_msubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_4_acc (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mdaddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_4_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mdsubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_4_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_masaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_4_add_sub (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mdasaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_4_add_sub_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmrdhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mmrdhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqxmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqxmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mqcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_4_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintkeven = -1;
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintkeven = -1;
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr550_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mdpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintieven = -1;
|
|
INT in_FRintjeven = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRintieven = FLD (in_FRintieven);
|
|
in_FRintjeven = FLD (in_FRintjeven);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 12)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_quad (current_cpu, idesc, 0, referenced, in_FRintieven, in_FRintjeven, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_munpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_munpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintkeven = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mdunpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdunpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintkeven = -1;
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintkeven = -1;
|
|
out_FRintkeven = FLD (out_FRintkeven);
|
|
in_FRinti = FLD (in_FRintj);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintkeven);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRinti = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRinti = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_cmbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mclracc_0 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_media_3_mclracc (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mclracc_1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_media_3_mclracc (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mrdacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_3_acc (current_cpu, idesc, 0, referenced, in_FRintj, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mrdaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mrdaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_ACC40Si = FLD (in_ACCGi);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr550_u_media_3_acc (current_cpu, idesc, 0, referenced, in_FRintj, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mwtacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_ACC40Sk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_ACC40Sk = FLD (in_ACC40Sk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr550_u_media_3_wtacc (current_cpu, idesc, 0, referenced, in_FRinti, in_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mwtaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwtaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_ACC40Sk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_ACC40Sk = FLD (in_ACCGk);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr550_u_media_3_wtacc (current_cpu, idesc, 0, referenced, in_FRinti, in_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_mcop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr550_fnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr550_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_add (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_and (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_or (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_xor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_not (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nsdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_udiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_smul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_umul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_smu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_smass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_smsss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_srl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_slass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_scutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_scan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cadd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csmul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csrl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cscan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_andcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_orcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_xorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_srlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_smulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_umulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_caddcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csubcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csmulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_csmulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_candcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_corcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cxorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csrlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_andi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_xori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nsdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_udivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nudivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_smuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_umuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_slli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_srli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_srai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_scani (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_andicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_oricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_xoricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_smulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_umulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sllicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_srlicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sraicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_addxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_subxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmpb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmpba (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_setlo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlo.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRklo = FLD (out_GRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sethi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_sethi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRkhi = FLD (out_GRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_setlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lddc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lddcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nlddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_st (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_std (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stdc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stdcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cst (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_csthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cstdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sthi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_sthfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stdi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stdfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_stqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_swap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_swapi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cswap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movgfq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgfq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movfgq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movfgq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmovgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmovfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmovgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmovfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movgs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_spr = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_spr = FLD (out_spr);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_gr2spr (current_cpu, idesc, 0, referenced, in_GRj, out_spr);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_movsg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movsg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_spr = -1;
|
|
INT out_GRj = -1;
|
|
in_spr = FLD (in_spr);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_spr2gr (current_cpu, idesc, 0, referenced, in_spr, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_beq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_blt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fblg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fblt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bctrlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_beqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_blelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_blslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bhilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bceqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bclelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bclslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bchilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bcnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_jmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_calll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_jmpil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_callil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_call (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_call.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_rett (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_rett.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_rei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_teq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_thi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fteq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftlg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fto (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tils (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tihi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tic (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tinc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tin (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tip (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tinv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftilg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftiue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftiul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftiuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftiug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftiule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ftio (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_break (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mtrap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_andcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_orcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_xorcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nandcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_norcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_andncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_orncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nandncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_norncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_notcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ccklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ccknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ccknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cjmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ccalll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_ici (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_ici (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_dci (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_dci (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_icei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_dcei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_dcf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_dcf (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_dcef (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_witlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_wdtlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_itlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_dtlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_icpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_icpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_dcpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_dcpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_icul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_icul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_dcul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_dcul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_bar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_barrier (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_membar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_membar (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lrai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_lrad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_tlbpr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clrgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_clrgr (current_cpu, idesc, 0, referenced, in_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clrfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRk = -1;
|
|
in_FRk = FLD (in_FRk);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_clrfr (current_cpu, idesc, 0, referenced, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clrga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
cycles += frvbf_model_fr500_u_clrgr (current_cpu, idesc, 0, referenced, in_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_clrfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr500_u_clrfr (current_cpu, idesc, 0, referenced, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_commitgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr500_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_commitfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr500_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_commitga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr500_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_commitfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRk = -1;
|
|
INT in_FRk = -1;
|
|
cycles += frvbf_model_fr500_u_commit (current_cpu, idesc, 0, referenced, in_GRk, in_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fitod (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fitod.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdtoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdtoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_dual_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, out_FRk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_float_dual_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, out_FRk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_dual_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, out_FRk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_float_dual_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, out_FRk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfitos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_convert (current_cpu, idesc, 0, referenced, in_FRj, in_FRintj, in_FRdoublej, out_FRk, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT out_FRk = -1;
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr2fr (current_cpu, idesc, 0, referenced, in_FRi, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmovd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT out_FRk = -1;
|
|
cycles += frvbf_model_fr500_u_fr2fr (current_cpu, idesc, 0, referenced, in_FRi, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT out_FRk = -1;
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr2fr (current_cpu, idesc, 0, referenced, in_FRi, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT out_FRk = -1;
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_fr2fr (current_cpu, idesc, 0, referenced, in_FRi, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fnegd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fabsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_sqrt (current_cpu, idesc, 0, referenced, in_FRj, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_float_dual_sqrt (current_cpu, idesc, 0, referenced, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_float_dual_sqrt (current_cpu, idesc, 0, referenced, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fsqrtd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_float_sqrt (current_cpu, idesc, 0, referenced, in_FRj, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_sqrt (current_cpu, idesc, 0, referenced, in_FRj, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_sqrt (current_cpu, idesc, 0, referenced, in_FRj, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_div (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_faddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublei = FLD (in_FRdoublei);
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublei = FLD (in_FRdoublei);
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmuld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublei = FLD (in_FRdoublei);
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdivd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublei = FLD (in_FRdoublei);
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_div (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FRk = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_div (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fcmpd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcmpd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRdoublei = FLD (in_FRdoublei);
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_dual_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmaddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublei = FLD (in_FRdoublei);
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRdoublei = FLD (in_FRdoublei);
|
|
in_FRdoublej = FLD (in_FRdoublej);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fmsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT in_FRdoublei = -1;
|
|
INT in_FRdoublej = -1;
|
|
INT out_FRk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FRk = FLD (out_FRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_float_dual_arith (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, in_FRdoublei, in_FRdoublej, out_FRk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_nfdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRi = -1;
|
|
INT in_FRj = -1;
|
|
INT out_FCCi_2 = -1;
|
|
in_FRi = FLD (in_FRi);
|
|
in_FRj = FLD (in_FRj);
|
|
out_FCCi_2 = FLD (out_FCCi_2);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_float_dual_compare (current_cpu, idesc, 0, referenced, in_FRi, in_FRj, out_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mhsetlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mhsethis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mhdsets (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdsets.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mhsetloh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetloh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mhsethih (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethih.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mhdseth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdseth.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mrotri (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mwcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mwcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mdcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdcutssi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_maveh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msrlhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mdrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdrotli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcplhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcplhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcpli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqsaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msathu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcmpsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcmpuh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mabshs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mabshs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_maddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_maddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqlclrhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqlmths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqsllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqsrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_maddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_msubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mdaddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mdsubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_masaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mdasaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmrdhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mmrdhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr500_u_media_quad_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqxmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqxmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_dual_mul (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_complex (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_complex (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_complex (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mqcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr500_u_media_quad_complex (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mdpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr500_u_media_quad_arith (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_munpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_munpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mdunpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdunpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media_dual_unpack (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_media_dual_btoh (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr500_u_media_dual_btoh (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media_dual_htob (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media_dual_htob (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media_dual_btohe (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_cmbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr500_u_media_dual_btohe (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mclracc_0 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mclracc_1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mrdacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mrdaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mrdaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_ACCGi = FLD (in_ACCGi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 3;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mwtacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 5;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mwtaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwtaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT in_ACC40Si = -1;
|
|
INT in_ACCGi = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
INT out_ACCGk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_ACCGk = FLD (out_ACCGk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 7;
|
|
cycles += frvbf_model_fr500_u_media (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, in_ACC40Si, in_ACCGi, out_FRintk, out_ACC40Sk, out_ACC40Uk, out_ACCGk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_mcop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr500_fnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr500_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_add (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_and (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_or (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_xor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_not (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nsdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_udiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_smul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_umul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_smu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_smass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_smsss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_srl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_slass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_scutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_scan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cadd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csmul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csrl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cscan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_andcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_orcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_xorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_srlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_smulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_umulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_caddcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csubcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csmulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_csmulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_candcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_corcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cxorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csrlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_andi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_xori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nsdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_udivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nudivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_smuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_umuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_slli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_srli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_srai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_scani (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_andicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_oricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_xoricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_smulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_umulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sllicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_srlicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sraicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_addxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_subxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmpb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmpba (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_setlo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlo.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sethi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_sethi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_setlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lddc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lddcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nlddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_st (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_std (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stdc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stdcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cst (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_csthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cstdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sthi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_sthfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stdi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stdfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_stqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_swap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_swapi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cswap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movgfq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgfq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movfgq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movfgq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmovgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmovfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmovgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmovfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movgs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_movsg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movsg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_beq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_blt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fblg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fblt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bctrlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_beqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_blelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_blslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bhilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bceqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bclelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bclslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bchilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bcnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_jmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_calll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_jmpil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_callil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_call (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_call.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_rett (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_rett.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_rei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_teq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_thi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fteq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftlg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fto (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tils (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tihi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tic (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tinc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tin (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tip (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tinv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftilg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftiue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftiul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftiuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftiug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftiule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ftio (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_break (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mtrap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_andcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_orcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_xorcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nandcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_norcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_andncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_orncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nandncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_norncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_notcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ccklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ccknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ccknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cjmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ccalll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_ici (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_dci (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_icei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_dcei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_dcf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_dcef (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_witlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_wdtlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_itlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_dtlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_icpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_dcpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_icul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_dcul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_bar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_membar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lrai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_lrad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_tlbpr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clrgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clrfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clrga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_clrfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_commitgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_commitfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_commitga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_commitfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fitod (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fitod.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdtoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdtoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfitos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmovd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fnegd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fabsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fsqrtd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_faddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmuld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdivd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fcmpd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcmpd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmaddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fmsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_nfdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mhsetlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mhsethis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mhdsets (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdsets.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mhsetloh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetloh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mhsethih (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethih.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mhdseth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdseth.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mrotri (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mwcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mwcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mdcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdcutssi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_maveh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msrlhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mdrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdrotli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcplhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcplhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcpli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqsaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msathu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcmpsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcmpuh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mabshs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mabshs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_maddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_maddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqlclrhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqlmths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqsllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqsrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_maddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_msubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mdaddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mdsubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_masaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mdasaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmrdhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mmrdhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqxmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqxmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mqcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mdpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_munpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_munpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mdunpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdunpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_cmbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mclracc_0 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mclracc_1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mrdacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mrdaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mrdaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mwtacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mwtaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwtaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_mcop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_tomcat_fnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_tomcat_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_add (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_and (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_or (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_xor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_not (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nsdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_udiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_smul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_umul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_smu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_smass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_smsss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_srl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_slass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_scutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_scan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cadd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csmul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csrl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cscan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_andcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_orcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_xorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_srlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_smulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_umulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_caddcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csubcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csmulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_csmulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_candcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_corcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cxorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csrlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_andi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_xori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nsdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_udivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nudivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_smuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_umuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_slli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_srli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_srai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_scani (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_andicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_oricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_xoricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_smulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_umulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sllicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_srlicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sraicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_addxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_subxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmpb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmpba (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_setlo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlo.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRklo = FLD (out_GRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sethi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_sethi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRkhi = FLD (out_GRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_setlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lddc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lddcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nlddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_st (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_std (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stdc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stdcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cst (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_csthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cstdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sthi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_sthfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stdi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stdfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_stqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_swap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_swapi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cswap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movgfq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgfq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movfgq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movfgq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmovgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmovfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmovgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmovfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movgs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_spr = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_spr = FLD (out_spr);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_gr2spr (current_cpu, idesc, 0, referenced, in_GRj, out_spr);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_movsg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movsg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_spr = -1;
|
|
INT out_GRj = -1;
|
|
in_spr = FLD (in_spr);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_spr2gr (current_cpu, idesc, 0, referenced, in_spr, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_beq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_blt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fblg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fblt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bctrlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_beqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_blelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_blslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bhilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bceqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bclelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bclslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bchilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bcnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_jmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_calll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_jmpil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_callil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_call (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_call.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_rett (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_rett.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_rei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_teq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_thi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fteq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftlg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fto (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tils (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tihi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tic (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tinc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tin (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tip (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tinv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftilg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftiue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftiul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftiuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftiug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftiule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ftio (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_break (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mtrap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_andcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_orcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_xorcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nandcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_norcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_andncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_orncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nandncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_norncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_notcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ccklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ccknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ccknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cjmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ccalll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr400_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_ici (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_ici (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_dci (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_dci (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_icei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_ici (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_dcei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_dci (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_dcf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_dcf (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_dcef (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_dcf (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_witlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_wdtlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_itlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_dtlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_icpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_icpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_dcpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_dcpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_icul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_icul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_dcul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_dcul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_bar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_barrier (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_membar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_membar (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lrai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_lrad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_tlbpr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clrgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clrfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clrga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_clrfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_commitgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_commitfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_commitga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_commitfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fitod (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fitod.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdtoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdtoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfitos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmovd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fnegd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fabsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fsqrtd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_faddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmuld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdivd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fcmpd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcmpd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmaddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fmsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_nfdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mhsetlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRklo = FLD (out_FRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mhsethis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRkhi = FLD (out_FRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mhdsets (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdsets.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mhsetloh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetloh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRklo = FLD (out_FRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mhsethih (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethih.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRkhi = FLD (out_FRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mhdseth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdseth.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mrotri (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mwcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mwcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mdcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdcutssi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_media_4_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_maveh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msrlhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_6 (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mdrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdrotli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_3_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcplhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcplhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcpli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqsaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msathu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcmpsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FCCk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FCCk = FLD (out_FCCk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_7 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FCCk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcmpuh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FCCk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FCCk = FLD (out_FCCk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_7 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FCCk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mabshs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mabshs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_maddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_maddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqlclrhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqlmths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqsllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqsrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_maddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_2_acc (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_msubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_2_acc (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mdaddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_2_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mdsubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_2_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_masaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_2_add_sub (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mdasaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_2_add_sub_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmrdhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mmrdhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqxmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqxmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mqcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr400_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mdpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_3_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_munpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_munpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr400_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mdunpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdunpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr400_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_dual_htob (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr400_u_media_dual_htob (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_cmbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mclracc_0 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mclracc_1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mrdacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mrdaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mrdaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACCGi = -1;
|
|
INT in_FRinti = -1;
|
|
INT out_ACCGk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACCGi = FLD (in_ACCGi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr400_u_media_4_accg (current_cpu, idesc, 0, referenced, in_ACCGi, in_FRinti, out_ACCGk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mwtacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mwtaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwtaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACCGi = -1;
|
|
INT in_FRinti = -1;
|
|
INT out_ACCGk = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_ACCGk = FLD (out_ACCGk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr400_u_media_4_accg (current_cpu, idesc, 0, referenced, in_ACCGi, in_FRinti, out_ACCGk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_mcop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr400_fnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr400_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_add (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_and (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_or (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_xor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_not (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nsdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_udiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_smul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_umul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_smu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_smass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_smsss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_srl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_slass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_scutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_scan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cadd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csmul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csrl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cscan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_andcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_orcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_xorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_srlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_smulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_umulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_caddcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csubcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csmulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_csmulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_candcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_corcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cxorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csrlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_andi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_xori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nsdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_udivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_idiv (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nudivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_smuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_umuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_slli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_srli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_srai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_scani (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_andicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_oricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_xoricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_smulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_umulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRdoublek = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_imul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRdoublek, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sllicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_srlicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sraicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_addxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_subxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmpb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmpba (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_ICCi_1 = FLD (out_ICCi_1);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_setlo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlo.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRklo = FLD (out_GRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sethi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_sethi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_GRkhi = -1;
|
|
INT out_GRklo = -1;
|
|
out_GRkhi = FLD (out_GRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_set_hilo (current_cpu, idesc, 0, referenced, out_GRkhi, out_GRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_setlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_ICCi_1 = -1;
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_integer (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_ICCi_1);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lddc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lddcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nlddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_st (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_std (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stdc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stdcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 8)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
INT out_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRdoublek = FLD (out_GRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 7)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk, out_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
INT out_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRdoublek = FLD (out_FRdoublek);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_load (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_FRintk, out_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cst (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRk = FLD (in_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_csthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRintk = FLD (in_FRintk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cstdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sthi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRk = FLD (in_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_sthfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRintk = FLD (in_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stdi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_GRk = -1;
|
|
INT in_GRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRdoublek = FLD (in_GRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_gr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_GRk, in_GRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stdfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_FRintk = -1;
|
|
INT in_FRdoublek = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FRdoublek = FLD (in_FRdoublek);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_fr_store (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_FRintk, in_FRdoublek);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_stqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_swap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_swapi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
out_GRk = FLD (out_GRk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cswap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT out_GRk = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
out_GRk = FLD (out_GRk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_swap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, out_GRk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movgfq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgfq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movfgq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movfgq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmovgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmovfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmovgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_FRintk = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_gr2fr (current_cpu, idesc, 0, referenced, in_GRj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmovfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintk = -1;
|
|
INT out_GRj = -1;
|
|
in_FRintk = FLD (in_FRintk);
|
|
out_GRj = FLD (out_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_fr2gr (current_cpu, idesc, 0, referenced, in_FRintk, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movgs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRj = -1;
|
|
INT out_spr = -1;
|
|
in_GRj = FLD (in_GRj);
|
|
out_spr = FLD (out_spr);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_gr2spr (current_cpu, idesc, 0, referenced, in_GRj, out_spr);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_movsg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movsg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_spr = -1;
|
|
INT out_GRj = -1;
|
|
in_spr = FLD (in_spr);
|
|
out_GRj = FLD (out_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_spr2gr (current_cpu, idesc, 0, referenced, in_spr, out_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_beq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_blt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fblg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fblt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bctrlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_beqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_blelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_blslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bhilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bceqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bclelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bclslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bchilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bcnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
referenced |= 1 << 2;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
if (insn_referenced & (1 << 5)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
referenced |= 1 << 3;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_jmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_calll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_jmpil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_callil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_call (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_call.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_rett (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_rett.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_rei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_teq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_thi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fteq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftlg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fto (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tils (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tihi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tic (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tinc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tin (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tip (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tinv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_ICCi_2 = FLD (in_ICCi_2);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftilg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftiue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftiul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftiuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftiug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftiule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ftio (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_FCCi_2 = FLD (in_FCCi_2);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_trap (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_break (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mtrap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_andcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_orcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_xorcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nandcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_norcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_andncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_orncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nandncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_norncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_notcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ccklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ccknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ccknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_ICCi_3 = FLD (in_ICCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ICCi_3 = -1;
|
|
INT in_FCCi_3 = -1;
|
|
in_FCCi_3 = FLD (in_FCCi_3);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_check (current_cpu, idesc, 0, referenced, in_ICCi_3, in_FCCi_3);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cjmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ccalll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
INT in_ICCi_2 = -1;
|
|
INT in_FCCi_2 = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 4;
|
|
cycles += frvbf_model_fr450_u_branch (current_cpu, idesc, 0, referenced, in_GRi, in_GRj, in_ICCi_2, in_FCCi_2);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_ici (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_ici (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_dci (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_dci (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_icei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_ici (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_dcei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_dci (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_dcf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_dcf (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_dcef (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_dcf (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_witlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_wdtlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_itlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_dtlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_icpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_icpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_dcpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
in_GRj = FLD (in_GRj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_dcpl (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_icul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_icul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_dcul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_GRi = -1;
|
|
INT in_GRj = -1;
|
|
in_GRi = FLD (in_GRi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_dcul (current_cpu, idesc, 0, referenced, in_GRi, in_GRj);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_bar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_barrier (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_membar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_membar (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lrai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_lrad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_tlbpr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clrgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clrfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clrga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_clrfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_commitgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_commitfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_commitga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_commitfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fitod (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fitod.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdtoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdtoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfitos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmovd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fnegd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fabsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fsqrtd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_faddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmuld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdivd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fcmpd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcmpd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmaddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fmsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_nfdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mhsetlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRklo = FLD (out_FRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mhsethis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRkhi = FLD (out_FRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mhdsets (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdsets.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mhsetloh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetloh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRklo = FLD (out_FRklo);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mhsethih (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethih.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT out_FRkhi = -1;
|
|
INT out_FRklo = -1;
|
|
out_FRkhi = FLD (out_FRkhi);
|
|
referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_media_hilo (current_cpu, idesc, 0, referenced, out_FRkhi, out_FRklo);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mhdseth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdseth.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mrotri (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mwcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mwcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mdcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdcutssi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_media_4_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_maveh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msrlhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_6 (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mdrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdrotli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_3_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcplhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcplhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcpli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_3_dual (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqsaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msathu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcmpsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FCCk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FCCk = FLD (out_FCCk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_7 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FCCk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcmpuh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FCCk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FCCk = FLD (out_FCCk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_7 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FCCk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mabshs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mabshs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_maddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_maddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_1 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqlclrhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqlmths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_1_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqsllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintieven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_3_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqsrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintieven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_3_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_maddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_2_acc (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_msubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_2_acc (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mdaddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_2_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mdsubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_2_acc_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_masaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 4)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_2_add_sub (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mdasaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT out_ACC40Sk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 6)) referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_2_add_sub_dual (current_cpu, idesc, 0, referenced, in_ACC40Si, out_ACC40Sk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 15)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmrdhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mmrdhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 3)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Uk = FLD (out_ACC40Uk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 19)) referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqxmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqxmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 17)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 9)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
in_FRintj = FLD (in_FRintj);
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
if (insn_referenced & (1 << 1)) referenced |= 1 << 0;
|
|
if (insn_referenced & (1 << 2)) referenced |= 1 << 1;
|
|
if (insn_referenced & (1 << 11)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mqcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_ACC40Uk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
if (insn_referenced & (1 << 13)) referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_2_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_ACC40Sk, out_ACC40Uk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr450_u_media_3 (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mdpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRintieven);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_3_quad (current_cpu, idesc, 0, referenced, in_FRinti, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_munpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_munpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
if (insn_referenced & (1 << 0)) referenced |= 1 << 0;
|
|
cycles += frvbf_model_fr450_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mdunpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdunpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRinti = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintkeven);
|
|
cycles += frvbf_model_fr450_u_media_dual_expand (current_cpu, idesc, 0, referenced, in_FRinti, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_dual_htob (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_FRintj = -1;
|
|
INT out_FRintk = -1;
|
|
out_FRintk = FLD (out_FRintk);
|
|
in_FRintj = FLD (in_FRintjeven);
|
|
referenced |= 1 << 1;
|
|
cycles += frvbf_model_fr450_u_media_dual_htob (current_cpu, idesc, 0, referenced, in_FRintj, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_cmbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mclracc_0 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
cycles += frvbf_model_fr450_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mclracc_1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_media_4_mclracca (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mrdacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACC40Si = FLD (in_ACC40Si);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mrdaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mrdaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACCGi = -1;
|
|
INT in_FRinti = -1;
|
|
INT out_ACCGk = -1;
|
|
INT out_FRintk = -1;
|
|
in_ACCGi = FLD (in_ACCGi);
|
|
out_FRintk = FLD (out_FRintk);
|
|
referenced |= 1 << 0;
|
|
referenced |= 1 << 3;
|
|
cycles += frvbf_model_fr450_u_media_4_accg (current_cpu, idesc, 0, referenced, in_ACCGi, in_FRinti, out_ACCGk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mwtacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACC40Si = -1;
|
|
INT in_FRintj = -1;
|
|
INT out_ACC40Sk = -1;
|
|
INT out_FRintk = -1;
|
|
out_ACC40Sk = FLD (out_ACC40Sk);
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_4 (current_cpu, idesc, 0, referenced, in_ACC40Si, in_FRintj, out_ACC40Sk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mwtaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwtaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
INT in_ACCGi = -1;
|
|
INT in_FRinti = -1;
|
|
INT out_ACCGk = -1;
|
|
INT out_FRintk = -1;
|
|
in_FRinti = FLD (in_FRinti);
|
|
out_ACCGk = FLD (out_ACCGk);
|
|
referenced |= 1 << 1;
|
|
referenced |= 1 << 2;
|
|
cycles += frvbf_model_fr450_u_media_4_accg (current_cpu, idesc, 0, referenced, in_ACCGi, in_FRinti, out_ACCGk, out_FRintk);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_mcop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_fr450_fnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_fr450_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_add (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_and (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_or (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_xor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_not (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nsdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_udiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_smul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_umul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_smu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_smass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_smsss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smass.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_srl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_slass (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_scutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_scutss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_scan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cadd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csmul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csdiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cudiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csrl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cscan (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_andcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_orcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_xorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_srlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_smulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_umulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_caddcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csubcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csmulcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_csmulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_candcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_corcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cxorcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csllcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csrlcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csracc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_caddcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subx (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subxcc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_andi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_xori (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nsdivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_udivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nudivi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_smuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_umuli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_slli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_srli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_srai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_scani (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_andicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_oricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_xoricc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_smulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_umulicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sllicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_srlicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sraicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subxi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_addxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_subxicc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addicc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmpb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmpba (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_setlo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlo.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sethi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_sethi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_setlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_addcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lddc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lddcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldsbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldubi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldshi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlduhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldhfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ldbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlddi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smuli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nlddfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_lddfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nldqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_st (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_std (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stdc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_smulcc.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stqf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stqc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stdcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stqfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stqcu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdcu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldsb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldub (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clduh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldhf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clddf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldsbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldubu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldshu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clduhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldsbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldhfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cldbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clddu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clddfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_clddfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cldqu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cst (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstbf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csthf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstdf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csthu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstbfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_csthfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstbfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstdu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cstdfu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cstdfu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sthi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stbfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_sthfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stbfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stdi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stdfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stqi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_stqfi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_stdfi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_swap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_swapi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cswap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cswap.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movgfq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgfq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movfgq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movfgq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmovgf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmovfg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmovgfd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovgfd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmovfgd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmovfgd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movgs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movgs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_movsg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_movsg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_beq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_blt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_beq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fblg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fblt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fble (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbo (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fbne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bctrlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_beqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_blelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_blslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bhilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bceqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bclelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bclslr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bchilr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcnclr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcnlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcplr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bcnvlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_bceqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbralr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbnolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbeqlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbnelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcblglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbuelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbullr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbgelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbltlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbugelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbuglr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcblelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbgtlr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbulelr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbulr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcbolr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcbeqlr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_jmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_calll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_jmpil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_callil (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_call (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_call.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_rett (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_rett.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_rei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_teq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_thi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tnc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tnv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_teq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fteq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftlg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftlt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fto (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tils (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tihi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tic (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tinc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tin (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tip (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tiv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tinv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_tieq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftira (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftino (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftine (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftieq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftilg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftiue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftiul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftige (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftilt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftiuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftiug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftile (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftigt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftiule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ftio (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_ftine.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_break (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_break.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mtrap (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_andcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_orcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_xorcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nandcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_norcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_andncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_orncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nandncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_norncr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_notcr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_andcr.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ccklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ccknc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckn (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckp (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cckv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ccknv (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cckeq.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckra (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckno (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckne (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckeq (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfcklg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckue (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfcklt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckuge (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckug (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckle (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckgt (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfckule (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfcku (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfcko (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfckne.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cjmpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ccalll (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cjmpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_ici (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_dci (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_icei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_dcei (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_dcf (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_dcef (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icei.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_witlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_wdtlb (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_itlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_dtlbi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_icpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_dcpl (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_icpl.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_icul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_dcul (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_jmpil.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_bar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_membar (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lrai (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_lrad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_tlbpr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clrgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_swapi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clrfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clrga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_clrfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_commitgr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_setlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_commitfr (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_commitga (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_commitfa (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fitod (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fitod.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdtoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdtoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfditos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfitos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfitos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fditos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfstoi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdstoi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmovd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfmovs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fnegd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfnegs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fabsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfabss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fsqrtd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfsqrts (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_faddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmuld (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdivd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fcmpd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fcmpd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmaddd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmsubd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fmaddd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfmadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfmsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cfmas.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmad (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fmsd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfmas (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfmss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdmulcs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdadds (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdsubs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdmuls (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfddivs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdsads (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_fdmadds.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_nfdcmps (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_nfdcmps.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mhsetlos (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetlos.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mhsethis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethis.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mhdsets (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdsets.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mhsetloh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsetloh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mhsethih (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhsethih.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mhdseth (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mhdseth.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmand (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmxor (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmnot (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmand.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mrotri (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mwcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mwcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcut (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcuti (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcutss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mdcutssi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdcutssi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_maveh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcut.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msrlhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_msllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mdrotli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdrotli.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcplhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcplhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcpli (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqsaths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msathu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcmpsh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcmpuh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcmpsh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mabshs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mabshs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_maddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_maddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqaddhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqaddhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqsubhss (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqsubhus (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqlclrhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqlmths (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqsllhi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqsrahi (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mqsllhi.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_maddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_msubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mdaddaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mdsubaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_masaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mdasaccs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqmulxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqmulxhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqmulhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqmulhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmrdhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mmrdhu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmqmachu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachu.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqxmachs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqxmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqmacxhs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqcpxrs (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqcpxru (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqcpxis (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mqcpxiu (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmqmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmexpdhw (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhw.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmexpdhd (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmexpdhd.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmaddhss.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mdpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_munpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_munpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mdunpackh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdunpackh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmbtoh (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtoh.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmhtob (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmhtob.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_cmbtohe (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmbtohe.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mclracc_0 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mclracc_1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mdasaccs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mrdacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mcuti.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mrdaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mrdaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mwtacc (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_cmmachs.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mwtaccg (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_mwtaccg.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcop1 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_mcop2 (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
static int
|
|
model_simple_fnop (SIM_CPU *current_cpu, void *sem_arg)
|
|
{
|
|
#define FLD(f) abuf->fields.sfmt_empty.f
|
|
const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg);
|
|
const IDESC * UNUSED idesc = abuf->idesc;
|
|
int cycles = 0;
|
|
{
|
|
int referenced = 0;
|
|
int UNUSED insn_referenced = abuf->written;
|
|
cycles += frvbf_model_simple_u_exec (current_cpu, idesc, 0, referenced);
|
|
}
|
|
return cycles;
|
|
#undef FLD
|
|
}
|
|
|
|
/* We assume UNIT_NONE == 0 because the tables don't always terminate
|
|
entries with it. */
|
|
|
|
/* Model timing data for `frv'. */
|
|
|
|
static const INSN_TIMING frv_timing[] = {
|
|
{ FRVBF_INSN_X_INVALID, 0, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_AFTER, 0, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_BEFORE, 0, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_CHAIN, 0, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_BEGIN, 0, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADD, model_frv_add, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUB, model_frv_sub, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_AND, model_frv_and, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_OR, model_frv_or, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XOR, model_frv_xor, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOT, model_frv_not, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIV, model_frv_sdiv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIV, model_frv_nsdiv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIV, model_frv_udiv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIV, model_frv_nudiv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMUL, model_frv_smul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMUL, model_frv_umul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMU, model_frv_smu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMASS, model_frv_smass, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMSSS, model_frv_smsss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLL, model_frv_sll, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRL, model_frv_srl, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRA, model_frv_sra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLASS, model_frv_slass, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCUTSS, model_frv_scutss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCAN, model_frv_scan, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CADD, model_frv_cadd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUB, model_frv_csub, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CAND, model_frv_cand, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COR, model_frv_cor, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CXOR, model_frv_cxor, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CNOT, model_frv_cnot, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMUL, model_frv_csmul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSDIV, model_frv_csdiv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CUDIV, model_frv_cudiv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLL, model_frv_csll, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRL, model_frv_csrl, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRA, model_frv_csra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSCAN, model_frv_cscan, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDCC, model_frv_addcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBCC, model_frv_subcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCC, model_frv_andcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCC, model_frv_orcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCC, model_frv_xorcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLCC, model_frv_sllcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLCC, model_frv_srlcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRACC, model_frv_sracc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULCC, model_frv_smulcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULCC, model_frv_umulcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CADDCC, model_frv_caddcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUBCC, model_frv_csubcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMULCC, model_frv_csmulcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CANDCC, model_frv_candcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CORCC, model_frv_corcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CXORCC, model_frv_cxorcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLLCC, model_frv_csllcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRLCC, model_frv_csrlcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRACC, model_frv_csracc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDX, model_frv_addx, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBX, model_frv_subx, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXCC, model_frv_addxcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXCC, model_frv_subxcc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDSS, model_frv_addss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBSS, model_frv_subss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDI, model_frv_addi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBI, model_frv_subi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDI, model_frv_andi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORI, model_frv_ori, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORI, model_frv_xori, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIVI, model_frv_sdivi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIVI, model_frv_nsdivi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIVI, model_frv_udivi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIVI, model_frv_nudivi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULI, model_frv_smuli, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULI, model_frv_umuli, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLI, model_frv_slli, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLI, model_frv_srli, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAI, model_frv_srai, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCANI, model_frv_scani, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDICC, model_frv_addicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBICC, model_frv_subicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDICC, model_frv_andicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORICC, model_frv_oricc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORICC, model_frv_xoricc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULICC, model_frv_smulicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULICC, model_frv_umulicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLICC, model_frv_sllicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLICC, model_frv_srlicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAICC, model_frv_sraicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXI, model_frv_addxi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXI, model_frv_subxi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXICC, model_frv_addxicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXICC, model_frv_subxicc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPB, model_frv_cmpb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPBA, model_frv_cmpba, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLO, model_frv_setlo, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETHI, model_frv_sethi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLOS, model_frv_setlos, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSB, model_frv_ldsb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUB, model_frv_ldub, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSH, model_frv_ldsh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUH, model_frv_lduh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LD, model_frv_ld, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBF, model_frv_ldbf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHF, model_frv_ldhf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDF, model_frv_ldf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDC, model_frv_ldc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSB, model_frv_nldsb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUB, model_frv_nldub, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSH, model_frv_nldsh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUH, model_frv_nlduh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLD, model_frv_nld, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBF, model_frv_nldbf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHF, model_frv_nldhf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDF, model_frv_nldf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDD, model_frv_ldd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDF, model_frv_lddf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDC, model_frv_lddc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDD, model_frv_nldd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDF, model_frv_nlddf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQ, model_frv_ldq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQF, model_frv_ldqf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQC, model_frv_ldqc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQ, model_frv_nldq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQF, model_frv_nldqf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSBU, model_frv_ldsbu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUBU, model_frv_ldubu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSHU, model_frv_ldshu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUHU, model_frv_lduhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDU, model_frv_ldu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSBU, model_frv_nldsbu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUBU, model_frv_nldubu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSHU, model_frv_nldshu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUHU, model_frv_nlduhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDU, model_frv_nldu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBFU, model_frv_ldbfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHFU, model_frv_ldhfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDFU, model_frv_ldfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDCU, model_frv_ldcu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBFU, model_frv_nldbfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHFU, model_frv_nldhfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDFU, model_frv_nldfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDU, model_frv_lddu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDU, model_frv_nlddu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDFU, model_frv_lddfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDCU, model_frv_lddcu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDFU, model_frv_nlddfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQU, model_frv_ldqu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQU, model_frv_nldqu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQFU, model_frv_ldqfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQCU, model_frv_ldqcu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQFU, model_frv_nldqfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSBI, model_frv_ldsbi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSHI, model_frv_ldshi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDI, model_frv_ldi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUBI, model_frv_ldubi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUHI, model_frv_lduhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBFI, model_frv_ldbfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHFI, model_frv_ldhfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDFI, model_frv_ldfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSBI, model_frv_nldsbi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUBI, model_frv_nldubi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSHI, model_frv_nldshi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUHI, model_frv_nlduhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDI, model_frv_nldi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBFI, model_frv_nldbfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHFI, model_frv_nldhfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDFI, model_frv_nldfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDI, model_frv_lddi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDFI, model_frv_lddfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDI, model_frv_nlddi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDFI, model_frv_nlddfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQI, model_frv_ldqi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQFI, model_frv_ldqfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQFI, model_frv_nldqfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STB, model_frv_stb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STH, model_frv_sth, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ST, model_frv_st, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBF, model_frv_stbf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHF, model_frv_sthf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STF, model_frv_stf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STC, model_frv_stc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STD, model_frv_std, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDF, model_frv_stdf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDC, model_frv_stdc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQ, model_frv_stq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQF, model_frv_stqf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQC, model_frv_stqc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBU, model_frv_stbu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHU, model_frv_sthu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STU, model_frv_stu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBFU, model_frv_stbfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHFU, model_frv_sthfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STFU, model_frv_stfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STCU, model_frv_stcu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDU, model_frv_stdu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDFU, model_frv_stdfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDCU, model_frv_stdcu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQU, model_frv_stqu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQFU, model_frv_stqfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQCU, model_frv_stqcu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSB, model_frv_cldsb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUB, model_frv_cldub, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSH, model_frv_cldsh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUH, model_frv_clduh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLD, model_frv_cld, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDBF, model_frv_cldbf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHF, model_frv_cldhf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDF, model_frv_cldf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDD, model_frv_cldd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDF, model_frv_clddf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQ, model_frv_cldq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSBU, model_frv_cldsbu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUBU, model_frv_cldubu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSHU, model_frv_cldshu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUHU, model_frv_clduhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDU, model_frv_cldu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDBFU, model_frv_cldbfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHFU, model_frv_cldhfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDFU, model_frv_cldfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDU, model_frv_clddu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDFU, model_frv_clddfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQU, model_frv_cldqu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTB, model_frv_cstb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTH, model_frv_csth, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CST, model_frv_cst, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBF, model_frv_cstbf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHF, model_frv_csthf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTF, model_frv_cstf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTD, model_frv_cstd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDF, model_frv_cstdf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTQ, model_frv_cstq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBU, model_frv_cstbu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHU, model_frv_csthu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTU, model_frv_cstu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBFU, model_frv_cstbfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHFU, model_frv_csthfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTFU, model_frv_cstfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDU, model_frv_cstdu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDFU, model_frv_cstdfu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBI, model_frv_stbi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHI, model_frv_sthi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STI, model_frv_sti, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBFI, model_frv_stbfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHFI, model_frv_sthfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STFI, model_frv_stfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDI, model_frv_stdi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDFI, model_frv_stdfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQI, model_frv_stqi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQFI, model_frv_stqfi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAP, model_frv_swap, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAPI, model_frv_swapi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSWAP, model_frv_cswap, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGF, model_frv_movgf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFG, model_frv_movfg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFD, model_frv_movgfd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGD, model_frv_movfgd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFQ, model_frv_movgfq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGQ, model_frv_movfgq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGF, model_frv_cmovgf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFG, model_frv_cmovfg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGFD, model_frv_cmovgfd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFGD, model_frv_cmovfgd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGS, model_frv_movgs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVSG, model_frv_movsg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BRA, model_frv_bra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNO, model_frv_bno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQ, model_frv_beq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNE, model_frv_bne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLE, model_frv_ble, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGT, model_frv_bgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLT, model_frv_blt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGE, model_frv_bge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLS, model_frv_bls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BHI, model_frv_bhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BC, model_frv_bc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNC, model_frv_bnc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BN, model_frv_bn, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BP, model_frv_bp, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BV, model_frv_bv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNV, model_frv_bnv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRA, model_frv_fbra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNO, model_frv_fbno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNE, model_frv_fbne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQ, model_frv_fbeq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLG, model_frv_fblg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUE, model_frv_fbue, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUL, model_frv_fbul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGE, model_frv_fbge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLT, model_frv_fblt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGE, model_frv_fbuge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUG, model_frv_fbug, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLE, model_frv_fble, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGT, model_frv_fbgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULE, model_frv_fbule, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBU, model_frv_fbu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBO, model_frv_fbo, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCTRLR, model_frv_bctrlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BRALR, model_frv_bralr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNOLR, model_frv_bnolr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQLR, model_frv_beqlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNELR, model_frv_bnelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLELR, model_frv_blelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGTLR, model_frv_bgtlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLTLR, model_frv_bltlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGELR, model_frv_bgelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLSLR, model_frv_blslr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BHILR, model_frv_bhilr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLR, model_frv_bclr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNCLR, model_frv_bnclr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNLR, model_frv_bnlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BPLR, model_frv_bplr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BVLR, model_frv_bvlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNVLR, model_frv_bnvlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRALR, model_frv_fbralr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNOLR, model_frv_fbnolr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQLR, model_frv_fbeqlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNELR, model_frv_fbnelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLGLR, model_frv_fblglr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUELR, model_frv_fbuelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULLR, model_frv_fbullr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGELR, model_frv_fbgelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLTLR, model_frv_fbltlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGELR, model_frv_fbugelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGLR, model_frv_fbuglr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLELR, model_frv_fblelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGTLR, model_frv_fbgtlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULELR, model_frv_fbulelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULR, model_frv_fbulr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBOLR, model_frv_fbolr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCRALR, model_frv_bcralr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNOLR, model_frv_bcnolr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCEQLR, model_frv_bceqlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNELR, model_frv_bcnelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLELR, model_frv_bclelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGTLR, model_frv_bcgtlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLTLR, model_frv_bcltlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGELR, model_frv_bcgelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLSLR, model_frv_bclslr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCHILR, model_frv_bchilr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCCLR, model_frv_bcclr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNCLR, model_frv_bcnclr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNLR, model_frv_bcnlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCPLR, model_frv_bcplr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCVLR, model_frv_bcvlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNVLR, model_frv_bcnvlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBRALR, model_frv_fcbralr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNOLR, model_frv_fcbnolr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBEQLR, model_frv_fcbeqlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNELR, model_frv_fcbnelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLGLR, model_frv_fcblglr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUELR, model_frv_fcbuelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULLR, model_frv_fcbullr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGELR, model_frv_fcbgelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLTLR, model_frv_fcbltlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGELR, model_frv_fcbugelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGLR, model_frv_fcbuglr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLELR, model_frv_fcblelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGTLR, model_frv_fcbgtlr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULELR, model_frv_fcbulelr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULR, model_frv_fcbulr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBOLR, model_frv_fcbolr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPL, model_frv_jmpl, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLL, model_frv_calll, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPIL, model_frv_jmpil, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLIL, model_frv_callil, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALL, model_frv_call, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_RETT, model_frv_rett, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_REI, model_frv_rei, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TRA, model_frv_tra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNO, model_frv_tno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TEQ, model_frv_teq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNE, model_frv_tne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLE, model_frv_tle, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TGT, model_frv_tgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLT, model_frv_tlt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TGE, model_frv_tge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLS, model_frv_tls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_THI, model_frv_thi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TC, model_frv_tc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNC, model_frv_tnc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TN, model_frv_tn, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TP, model_frv_tp, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TV, model_frv_tv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNV, model_frv_tnv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTRA, model_frv_ftra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNO, model_frv_ftno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNE, model_frv_ftne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTEQ, model_frv_fteq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLG, model_frv_ftlg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUE, model_frv_ftue, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUL, model_frv_ftul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGE, model_frv_ftge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLT, model_frv_ftlt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUGE, model_frv_ftuge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUG, model_frv_ftug, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLE, model_frv_ftle, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGT, model_frv_ftgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTULE, model_frv_ftule, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTU, model_frv_ftu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTO, model_frv_fto, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIRA, model_frv_tira, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINO, model_frv_tino, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIEQ, model_frv_tieq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINE, model_frv_tine, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILE, model_frv_tile, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGT, model_frv_tigt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILT, model_frv_tilt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGE, model_frv_tige, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILS, model_frv_tils, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIHI, model_frv_tihi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIC, model_frv_tic, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINC, model_frv_tinc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIN, model_frv_tin, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIP, model_frv_tip, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIV, model_frv_tiv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINV, model_frv_tinv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIRA, model_frv_ftira, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINO, model_frv_ftino, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINE, model_frv_ftine, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIEQ, model_frv_ftieq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILG, model_frv_ftilg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUE, model_frv_ftiue, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUL, model_frv_ftiul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGE, model_frv_ftige, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILT, model_frv_ftilt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUGE, model_frv_ftiuge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUG, model_frv_ftiug, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILE, model_frv_ftile, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGT, model_frv_ftigt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIULE, model_frv_ftiule, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIU, model_frv_ftiu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIO, model_frv_ftio, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BREAK, model_frv_break, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MTRAP, model_frv_mtrap, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCR, model_frv_andcr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCR, model_frv_orcr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCR, model_frv_xorcr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDCR, model_frv_nandcr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORCR, model_frv_norcr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDNCR, model_frv_andncr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORNCR, model_frv_orncr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDNCR, model_frv_nandncr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORNCR, model_frv_norncr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOTCR, model_frv_notcr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKRA, model_frv_ckra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNO, model_frv_ckno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKEQ, model_frv_ckeq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNE, model_frv_ckne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLE, model_frv_ckle, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGT, model_frv_ckgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLT, model_frv_cklt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGE, model_frv_ckge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLS, model_frv_ckls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKHI, model_frv_ckhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKC, model_frv_ckc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNC, model_frv_cknc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKN, model_frv_ckn, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKP, model_frv_ckp, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKV, model_frv_ckv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNV, model_frv_cknv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKRA, model_frv_fckra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNO, model_frv_fckno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNE, model_frv_fckne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKEQ, model_frv_fckeq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLG, model_frv_fcklg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUE, model_frv_fckue, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUL, model_frv_fckul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGE, model_frv_fckge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLT, model_frv_fcklt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUGE, model_frv_fckuge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUG, model_frv_fckug, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLE, model_frv_fckle, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGT, model_frv_fckgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKULE, model_frv_fckule, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKU, model_frv_fcku, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKO, model_frv_fcko, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKRA, model_frv_cckra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNO, model_frv_cckno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKEQ, model_frv_cckeq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNE, model_frv_cckne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLE, model_frv_cckle, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGT, model_frv_cckgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLT, model_frv_ccklt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGE, model_frv_cckge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLS, model_frv_cckls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKHI, model_frv_cckhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKC, model_frv_cckc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNC, model_frv_ccknc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKN, model_frv_cckn, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKP, model_frv_cckp, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKV, model_frv_cckv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNV, model_frv_ccknv, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKRA, model_frv_cfckra, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNO, model_frv_cfckno, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNE, model_frv_cfckne, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKEQ, model_frv_cfckeq, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLG, model_frv_cfcklg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUE, model_frv_cfckue, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUL, model_frv_cfckul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGE, model_frv_cfckge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLT, model_frv_cfcklt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUGE, model_frv_cfckuge, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUG, model_frv_cfckug, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLE, model_frv_cfckle, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGT, model_frv_cfckgt, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKULE, model_frv_cfckule, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKU, model_frv_cfcku, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKO, model_frv_cfcko, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CJMPL, model_frv_cjmpl, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCALLL, model_frv_ccalll, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICI, model_frv_ici, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCI, model_frv_dci, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICEI, model_frv_icei, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEI, model_frv_dcei, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCF, model_frv_dcf, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEF, model_frv_dcef, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WITLB, model_frv_witlb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WDTLB, model_frv_wdtlb, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ITLBI, model_frv_itlbi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DTLBI, model_frv_dtlbi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICPL, model_frv_icpl, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCPL, model_frv_dcpl, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICUL, model_frv_icul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCUL, model_frv_dcul, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BAR, model_frv_bar, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MEMBAR, model_frv_membar, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAI, model_frv_lrai, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAD, model_frv_lrad, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLBPR, model_frv_tlbpr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP1, model_frv_cop1, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP2, model_frv_cop2, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGR, model_frv_clrgr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFR, model_frv_clrfr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGA, model_frv_clrga, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFA, model_frv_clrfa, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGR, model_frv_commitgr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFR, model_frv_commitfr, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGA, model_frv_commitga, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFA, model_frv_commitfa, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOS, model_frv_fitos, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSTOI, model_frv_fstoi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOD, model_frv_fitod, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDTOI, model_frv_fdtoi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDITOS, model_frv_fditos, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSTOI, model_frv_fdstoi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDITOS, model_frv_nfditos, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSTOI, model_frv_nfdstoi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFITOS, model_frv_cfitos, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSTOI, model_frv_cfstoi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFITOS, model_frv_nfitos, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSTOI, model_frv_nfstoi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVS, model_frv_fmovs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVD, model_frv_fmovd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMOVS, model_frv_fdmovs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMOVS, model_frv_cfmovs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGS, model_frv_fnegs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGD, model_frv_fnegd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDNEGS, model_frv_fdnegs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFNEGS, model_frv_cfnegs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSS, model_frv_fabss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSD, model_frv_fabsd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDABSS, model_frv_fdabss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFABSS, model_frv_cfabss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTS, model_frv_fsqrts, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSQRTS, model_frv_fdsqrts, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSQRTS, model_frv_nfdsqrts, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTD, model_frv_fsqrtd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSQRTS, model_frv_cfsqrts, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSQRTS, model_frv_nfsqrts, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDS, model_frv_fadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBS, model_frv_fsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULS, model_frv_fmuls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVS, model_frv_fdivs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDD, model_frv_faddd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBD, model_frv_fsubd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULD, model_frv_fmuld, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVD, model_frv_fdivd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFADDS, model_frv_cfadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSUBS, model_frv_cfsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMULS, model_frv_cfmuls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFDIVS, model_frv_cfdivs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFADDS, model_frv_nfadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSUBS, model_frv_nfsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMULS, model_frv_nfmuls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDIVS, model_frv_nfdivs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPS, model_frv_fcmps, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPD, model_frv_fcmpd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCMPS, model_frv_cfcmps, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDCMPS, model_frv_fdcmps, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDS, model_frv_fmadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBS, model_frv_fmsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDD, model_frv_fmaddd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBD, model_frv_fmsubd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMADDS, model_frv_fdmadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMADDS, model_frv_nfdmadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMADDS, model_frv_cfmadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSUBS, model_frv_cfmsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMADDS, model_frv_nfmadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSUBS, model_frv_nfmsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAS, model_frv_fmas, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSS, model_frv_fmss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMAS, model_frv_fdmas, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMSS, model_frv_fdmss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMAS, model_frv_nfdmas, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMSS, model_frv_nfdmss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMAS, model_frv_cfmas, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSS, model_frv_cfmss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAD, model_frv_fmad, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSD, model_frv_fmsd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMAS, model_frv_nfmas, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSS, model_frv_nfmss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDADDS, model_frv_fdadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSUBS, model_frv_fdsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULS, model_frv_fdmuls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDDIVS, model_frv_fddivs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSADS, model_frv_fdsads, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULCS, model_frv_fdmulcs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULCS, model_frv_nfdmulcs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDADDS, model_frv_nfdadds, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSUBS, model_frv_nfdsubs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULS, model_frv_nfdmuls, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDDIVS, model_frv_nfddivs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSADS, model_frv_nfdsads, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDCMPS, model_frv_nfdcmps, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOS, model_frv_mhsetlos, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIS, model_frv_mhsethis, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETS, model_frv_mhdsets, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOH, model_frv_mhsetloh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIH, model_frv_mhsethih, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETH, model_frv_mhdseth, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MAND, model_frv_mand, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOR, model_frv_mor, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MXOR, model_frv_mxor, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMAND, model_frv_cmand, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOR, model_frv_cmor, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMXOR, model_frv_cmxor, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOT, model_frv_mnot, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMNOT, model_frv_cmnot, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTLI, model_frv_mrotli, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTRI, model_frv_mrotri, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUT, model_frv_mwcut, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUTI, model_frv_mwcuti, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUT, model_frv_mcut, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTI, model_frv_mcuti, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSS, model_frv_mcutss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSSI, model_frv_mcutssi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDCUTSSI, model_frv_mdcutssi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MAVEH, model_frv_maveh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSLLHI, model_frv_msllhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRLHI, model_frv_msrlhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRAHI, model_frv_msrahi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDROTLI, model_frv_mdrotli, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLHI, model_frv_mcplhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLI, model_frv_mcpli, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHS, model_frv_msaths, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSATHS, model_frv_mqsaths, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHU, model_frv_msathu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPSH, model_frv_mcmpsh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPUH, model_frv_mcmpuh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MABSHS, model_frv_mabshs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHSS, model_frv_maddhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHUS, model_frv_maddhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHSS, model_frv_msubhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHUS, model_frv_msubhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHSS, model_frv_cmaddhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHUS, model_frv_cmaddhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHSS, model_frv_cmsubhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHUS, model_frv_cmsubhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHSS, model_frv_mqaddhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHUS, model_frv_mqaddhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHSS, model_frv_mqsubhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHUS, model_frv_mqsubhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHSS, model_frv_cmqaddhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHUS, model_frv_cmqaddhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHSS, model_frv_cmqsubhss, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHUS, model_frv_cmqsubhus, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLCLRHS, model_frv_mqlclrhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLMTHS, model_frv_mqlmths, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSLLHI, model_frv_mqsllhi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSRAHI, model_frv_mqsrahi, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDACCS, model_frv_maddaccs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBACCS, model_frv_msubaccs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDADDACCS, model_frv_mdaddaccs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDSUBACCS, model_frv_mdsubaccs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MASACCS, model_frv_masaccs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDASACCS, model_frv_mdasaccs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHS, model_frv_mmulhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHU, model_frv_mmulhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULXHS, model_frv_mmulxhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULXHU, model_frv_mmulxhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMULHS, model_frv_cmmulhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMULHU, model_frv_cmmulhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULHS, model_frv_mqmulhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULHU, model_frv_mqmulhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULXHS, model_frv_mqmulxhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULXHU, model_frv_mqmulxhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMULHS, model_frv_cmqmulhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMULHU, model_frv_cmqmulhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMACHS, model_frv_mmachs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMACHU, model_frv_mmachu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMRDHS, model_frv_mmrdhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMRDHU, model_frv_mmrdhu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMACHS, model_frv_cmmachs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMACHU, model_frv_cmmachu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACHS, model_frv_mqmachs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACHU, model_frv_mqmachu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMACHS, model_frv_cmqmachs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHU, model_frv_cmqmachu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQXMACHS, model_frv_mqxmachs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQXMACXHS, model_frv_mqxmacxhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMACXHS, model_frv_mqmacxhs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXRS, model_frv_mcpxrs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXRU, model_frv_mcpxru, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXIS, model_frv_mcpxis, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXIU, model_frv_mcpxiu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXRS, model_frv_cmcpxrs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXRU, model_frv_cmcpxru, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXIS, model_frv_cmcpxis, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXIU, model_frv_cmcpxiu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXRS, model_frv_mqcpxrs, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXRU, model_frv_mqcpxru, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXIS, model_frv_mqcpxis, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXIU, model_frv_mqcpxiu, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MEXPDHW, model_frv_mexpdhw, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMEXPDHW, model_frv_cmexpdhw, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MEXPDHD, model_frv_mexpdhd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMEXPDHD, model_frv_cmexpdhd, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MPACKH, model_frv_mpackh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MDPACKH, model_frv_mdpackh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MUNPACKH, model_frv_munpackh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MDUNPACKH, model_frv_mdunpackh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MBTOH, model_frv_mbtoh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMBTOH, model_frv_cmbtoh, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MHTOB, model_frv_mhtob, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMHTOB, model_frv_cmhtob, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MBTOHE, model_frv_mbtohe, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMBTOHE, model_frv_cmbtohe, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MNOP, model_frv_mnop, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCLRACC_0, model_frv_mclracc_0, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCLRACC_1, model_frv_mclracc_1, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MRDACC, model_frv_mrdacc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MRDACCG, model_frv_mrdaccg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MWTACC, model_frv_mwtacc, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MWTACCG, model_frv_mwtaccg, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCOP1, model_frv_mcop1, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCOP2, model_frv_mcop2, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_FNOP, model_frv_fnop, { { (int) UNIT_FRV_U_EXEC, 1, 1 } } },
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};
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/* Model timing data for `fr550'. */
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static const INSN_TIMING fr550_timing[] = {
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{ FRVBF_INSN_X_INVALID, 0, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_AFTER, 0, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEFORE, 0, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CHAIN, 0, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEGIN, 0, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_ADD, model_fr550_add, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUB, model_fr550_sub, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_AND, model_fr550_and, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_OR, model_fr550_or, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_XOR, model_fr550_xor, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_NOT, model_fr550_not, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SDIV, model_fr550_sdiv, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NSDIV, model_fr550_nsdiv, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_UDIV, model_fr550_udiv, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NUDIV, model_fr550_nudiv, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_SMUL, model_fr550_smul, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_UMUL, model_fr550_umul, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_SMU, model_fr550_smu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SMASS, model_fr550_smass, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SMSSS, model_fr550_smsss, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SLL, model_fr550_sll, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRL, model_fr550_srl, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRA, model_fr550_sra, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLASS, model_fr550_slass, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCUTSS, model_fr550_scutss, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCAN, model_fr550_scan, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CADD, model_fr550_cadd, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSUB, model_fr550_csub, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CAND, model_fr550_cand, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_COR, model_fr550_cor, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CXOR, model_fr550_cxor, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CNOT, model_fr550_cnot, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSMUL, model_fr550_csmul, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_CSDIV, model_fr550_csdiv, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_CUDIV, model_fr550_cudiv, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_CSLL, model_fr550_csll, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRL, model_fr550_csrl, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRA, model_fr550_csra, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSCAN, model_fr550_cscan, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDCC, model_fr550_addcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBCC, model_fr550_subcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ANDCC, model_fr550_andcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ORCC, model_fr550_orcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_XORCC, model_fr550_xorcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLLCC, model_fr550_sllcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_SRLCC, model_fr550_srlcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_SRACC, model_fr550_sracc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_SMULCC, model_fr550_smulcc, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
|
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{ FRVBF_INSN_UMULCC, model_fr550_umulcc, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
|
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{ FRVBF_INSN_CADDCC, model_fr550_caddcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUBCC, model_fr550_csubcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMULCC, model_fr550_csmulcc, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CANDCC, model_fr550_candcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CORCC, model_fr550_corcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CXORCC, model_fr550_cxorcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLLCC, model_fr550_csllcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRLCC, model_fr550_csrlcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRACC, model_fr550_csracc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDX, model_fr550_addx, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBX, model_fr550_subx, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXCC, model_fr550_addxcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXCC, model_fr550_subxcc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDSS, model_fr550_addss, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBSS, model_fr550_subss, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDI, model_fr550_addi, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBI, model_fr550_subi, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDI, model_fr550_andi, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORI, model_fr550_ori, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORI, model_fr550_xori, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIVI, model_fr550_sdivi, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIVI, model_fr550_nsdivi, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIVI, model_fr550_udivi, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIVI, model_fr550_nudivi, { { (int) UNIT_FR550_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULI, model_fr550_smuli, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULI, model_fr550_umuli, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLI, model_fr550_slli, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLI, model_fr550_srli, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAI, model_fr550_srai, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SCANI, model_fr550_scani, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDICC, model_fr550_addicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBICC, model_fr550_subicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDICC, model_fr550_andicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORICC, model_fr550_oricc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORICC, model_fr550_xoricc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULICC, model_fr550_smulicc, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULICC, model_fr550_umulicc, { { (int) UNIT_FR550_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLICC, model_fr550_sllicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLICC, model_fr550_srlicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAICC, model_fr550_sraicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXI, model_fr550_addxi, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXI, model_fr550_subxi, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXICC, model_fr550_addxicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXICC, model_fr550_subxicc, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPB, model_fr550_cmpb, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPBA, model_fr550_cmpba, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLO, model_fr550_setlo, { { (int) UNIT_FR550_U_SET_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_SETHI, model_fr550_sethi, { { (int) UNIT_FR550_U_SET_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLOS, model_fr550_setlos, { { (int) UNIT_FR550_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSB, model_fr550_ldsb, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUB, model_fr550_ldub, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSH, model_fr550_ldsh, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUH, model_fr550_lduh, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LD, model_fr550_ld, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBF, model_fr550_ldbf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHF, model_fr550_ldhf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDF, model_fr550_ldf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDC, model_fr550_ldc, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSB, model_fr550_nldsb, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUB, model_fr550_nldub, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSH, model_fr550_nldsh, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUH, model_fr550_nlduh, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLD, model_fr550_nld, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBF, model_fr550_nldbf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHF, model_fr550_nldhf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDF, model_fr550_nldf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDD, model_fr550_ldd, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDF, model_fr550_lddf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDC, model_fr550_lddc, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDD, model_fr550_nldd, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDF, model_fr550_nlddf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQ, model_fr550_ldq, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQF, model_fr550_ldqf, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQC, model_fr550_ldqc, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQ, model_fr550_nldq, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQF, model_fr550_nldqf, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDSBU, model_fr550_ldsbu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUBU, model_fr550_ldubu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSHU, model_fr550_ldshu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUHU, model_fr550_lduhu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDU, model_fr550_ldu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSBU, model_fr550_nldsbu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUBU, model_fr550_nldubu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSHU, model_fr550_nldshu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUHU, model_fr550_nlduhu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDU, model_fr550_nldu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBFU, model_fr550_ldbfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHFU, model_fr550_ldhfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDFU, model_fr550_ldfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDCU, model_fr550_ldcu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDBFU, model_fr550_nldbfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDHFU, model_fr550_nldhfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDFU, model_fr550_nldfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDU, model_fr550_lddu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDU, model_fr550_nlddu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDFU, model_fr550_lddfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDCU, model_fr550_lddcu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDDFU, model_fr550_nlddfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQU, model_fr550_ldqu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQU, model_fr550_nldqu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQFU, model_fr550_ldqfu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQCU, model_fr550_ldqcu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQFU, model_fr550_nldqfu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDSBI, model_fr550_ldsbi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSHI, model_fr550_ldshi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDI, model_fr550_ldi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUBI, model_fr550_ldubi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUHI, model_fr550_lduhi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBFI, model_fr550_ldbfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHFI, model_fr550_ldhfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDFI, model_fr550_ldfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSBI, model_fr550_nldsbi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUBI, model_fr550_nldubi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSHI, model_fr550_nldshi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUHI, model_fr550_nlduhi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDI, model_fr550_nldi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDBFI, model_fr550_nldbfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDHFI, model_fr550_nldhfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDFI, model_fr550_nldfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDI, model_fr550_lddi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDFI, model_fr550_lddfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDI, model_fr550_nlddi, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDFI, model_fr550_nlddfi, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQI, model_fr550_ldqi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQFI, model_fr550_ldqfi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQFI, model_fr550_nldqfi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STB, model_fr550_stb, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STH, model_fr550_sth, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_ST, model_fr550_st, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBF, model_fr550_stbf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHF, model_fr550_sthf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STF, model_fr550_stf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STC, model_fr550_stc, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STD, model_fr550_std, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDF, model_fr550_stdf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDC, model_fr550_stdc, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQ, model_fr550_stq, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQF, model_fr550_stqf, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQC, model_fr550_stqc, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STBU, model_fr550_stbu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHU, model_fr550_sthu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STU, model_fr550_stu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBFU, model_fr550_stbfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHFU, model_fr550_sthfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STFU, model_fr550_stfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STCU, model_fr550_stcu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STDU, model_fr550_stdu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDFU, model_fr550_stdfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDCU, model_fr550_stdcu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQU, model_fr550_stqu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQFU, model_fr550_stqfu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQCU, model_fr550_stqcu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CLDSB, model_fr550_cldsb, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUB, model_fr550_cldub, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSH, model_fr550_cldsh, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUH, model_fr550_clduh, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLD, model_fr550_cld, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDBF, model_fr550_cldbf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDHF, model_fr550_cldhf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDF, model_fr550_cldf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDD, model_fr550_cldd, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDF, model_fr550_clddf, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDQ, model_fr550_cldq, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CLDSBU, model_fr550_cldsbu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUBU, model_fr550_cldubu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSHU, model_fr550_cldshu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUHU, model_fr550_clduhu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDU, model_fr550_cldu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDBFU, model_fr550_cldbfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDHFU, model_fr550_cldhfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDFU, model_fr550_cldfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDU, model_fr550_clddu, { { (int) UNIT_FR550_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDFU, model_fr550_clddfu, { { (int) UNIT_FR550_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDQU, model_fr550_cldqu, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CSTB, model_fr550_cstb, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTH, model_fr550_csth, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CST, model_fr550_cst, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTBF, model_fr550_cstbf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHF, model_fr550_csthf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTF, model_fr550_cstf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTD, model_fr550_cstd, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDF, model_fr550_cstdf, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTQ, model_fr550_cstq, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CSTBU, model_fr550_cstbu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHU, model_fr550_csthu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTU, model_fr550_cstu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTBFU, model_fr550_cstbfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHFU, model_fr550_csthfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTFU, model_fr550_cstfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDU, model_fr550_cstdu, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDFU, model_fr550_cstdfu, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBI, model_fr550_stbi, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHI, model_fr550_sthi, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STI, model_fr550_sti, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBFI, model_fr550_stbfi, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHFI, model_fr550_sthfi, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STFI, model_fr550_stfi, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDI, model_fr550_stdi, { { (int) UNIT_FR550_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDFI, model_fr550_stdfi, { { (int) UNIT_FR550_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STQI, model_fr550_stqi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQFI, model_fr550_stqfi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SWAP, model_fr550_swap, { { (int) UNIT_FR550_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_SWAPI, model_fr550_swapi, { { (int) UNIT_FR550_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_CSWAP, model_fr550_cswap, { { (int) UNIT_FR550_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_MOVGF, model_fr550_movgf, { { (int) UNIT_FR550_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_MOVFG, model_fr550_movfg, { { (int) UNIT_FR550_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGFD, model_fr550_movgfd, { { (int) UNIT_FR550_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_MOVFGD, model_fr550_movfgd, { { (int) UNIT_FR550_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGFQ, model_fr550_movgfq, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MOVFGQ, model_fr550_movfgq, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMOVGF, model_fr550_cmovgf, { { (int) UNIT_FR550_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_CMOVFG, model_fr550_cmovfg, { { (int) UNIT_FR550_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_CMOVGFD, model_fr550_cmovgfd, { { (int) UNIT_FR550_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_CMOVFGD, model_fr550_cmovfgd, { { (int) UNIT_FR550_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGS, model_fr550_movgs, { { (int) UNIT_FR550_U_GR2SPR, 1, 1 } } },
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{ FRVBF_INSN_MOVSG, model_fr550_movsg, { { (int) UNIT_FR550_U_SPR2GR, 1, 1 } } },
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{ FRVBF_INSN_BRA, model_fr550_bra, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNO, model_fr550_bno, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BEQ, model_fr550_beq, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNE, model_fr550_bne, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLE, model_fr550_ble, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGT, model_fr550_bgt, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLT, model_fr550_blt, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGE, model_fr550_bge, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLS, model_fr550_bls, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BHI, model_fr550_bhi, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BC, model_fr550_bc, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNC, model_fr550_bnc, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BN, model_fr550_bn, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BP, model_fr550_bp, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BV, model_fr550_bv, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_BNV, model_fr550_bnv, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRA, model_fr550_fbra, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNO, model_fr550_fbno, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNE, model_fr550_fbne, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQ, model_fr550_fbeq, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLG, model_fr550_fblg, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUE, model_fr550_fbue, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUL, model_fr550_fbul, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGE, model_fr550_fbge, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLT, model_fr550_fblt, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGE, model_fr550_fbuge, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_FBUG, model_fr550_fbug, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLE, model_fr550_fble, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_FBGT, model_fr550_fbgt, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULE, model_fr550_fbule, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_FBU, model_fr550_fbu, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBO, model_fr550_fbo, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCTRLR, model_fr550_bctrlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BRALR, model_fr550_bralr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNOLR, model_fr550_bnolr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQLR, model_fr550_beqlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNELR, model_fr550_bnelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLELR, model_fr550_blelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGTLR, model_fr550_bgtlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_BLTLR, model_fr550_bltlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGELR, model_fr550_bgelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLSLR, model_fr550_blslr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BHILR, model_fr550_bhilr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLR, model_fr550_bclr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNCLR, model_fr550_bnclr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNLR, model_fr550_bnlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BPLR, model_fr550_bplr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BVLR, model_fr550_bvlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNVLR, model_fr550_bnvlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRALR, model_fr550_fbralr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNOLR, model_fr550_fbnolr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQLR, model_fr550_fbeqlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNELR, model_fr550_fbnelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLGLR, model_fr550_fblglr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUELR, model_fr550_fbuelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULLR, model_fr550_fbullr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGELR, model_fr550_fbgelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLTLR, model_fr550_fbltlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGELR, model_fr550_fbugelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGLR, model_fr550_fbuglr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLELR, model_fr550_fblelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGTLR, model_fr550_fbgtlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULELR, model_fr550_fbulelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULR, model_fr550_fbulr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBOLR, model_fr550_fbolr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCRALR, model_fr550_bcralr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNOLR, model_fr550_bcnolr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCEQLR, model_fr550_bceqlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNELR, model_fr550_bcnelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLELR, model_fr550_bclelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGTLR, model_fr550_bcgtlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLTLR, model_fr550_bcltlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGELR, model_fr550_bcgelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLSLR, model_fr550_bclslr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCHILR, model_fr550_bchilr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCCLR, model_fr550_bcclr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNCLR, model_fr550_bcnclr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNLR, model_fr550_bcnlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCPLR, model_fr550_bcplr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCVLR, model_fr550_bcvlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNVLR, model_fr550_bcnvlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBRALR, model_fr550_fcbralr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNOLR, model_fr550_fcbnolr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBEQLR, model_fr550_fcbeqlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNELR, model_fr550_fcbnelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLGLR, model_fr550_fcblglr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUELR, model_fr550_fcbuelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULLR, model_fr550_fcbullr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGELR, model_fr550_fcbgelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLTLR, model_fr550_fcbltlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGELR, model_fr550_fcbugelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGLR, model_fr550_fcbuglr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLELR, model_fr550_fcblelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGTLR, model_fr550_fcbgtlr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULELR, model_fr550_fcbulelr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULR, model_fr550_fcbulr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBOLR, model_fr550_fcbolr, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPL, model_fr550_jmpl, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLL, model_fr550_calll, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPIL, model_fr550_jmpil, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLIL, model_fr550_callil, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALL, model_fr550_call, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_RETT, model_fr550_rett, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_REI, model_fr550_rei, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TRA, model_fr550_tra, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNO, model_fr550_tno, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TEQ, model_fr550_teq, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNE, model_fr550_tne, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLE, model_fr550_tle, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGT, model_fr550_tgt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLT, model_fr550_tlt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGE, model_fr550_tge, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLS, model_fr550_tls, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_THI, model_fr550_thi, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TC, model_fr550_tc, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNC, model_fr550_tnc, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TN, model_fr550_tn, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TP, model_fr550_tp, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TV, model_fr550_tv, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNV, model_fr550_tnv, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTRA, model_fr550_ftra, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNO, model_fr550_ftno, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNE, model_fr550_ftne, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTEQ, model_fr550_fteq, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLG, model_fr550_ftlg, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUE, model_fr550_ftue, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUL, model_fr550_ftul, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGE, model_fr550_ftge, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLT, model_fr550_ftlt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUGE, model_fr550_ftuge, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUG, model_fr550_ftug, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLE, model_fr550_ftle, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGT, model_fr550_ftgt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTULE, model_fr550_ftule, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTU, model_fr550_ftu, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTO, model_fr550_fto, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIRA, model_fr550_tira, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINO, model_fr550_tino, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIEQ, model_fr550_tieq, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINE, model_fr550_tine, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILE, model_fr550_tile, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGT, model_fr550_tigt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILT, model_fr550_tilt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGE, model_fr550_tige, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILS, model_fr550_tils, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIHI, model_fr550_tihi, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIC, model_fr550_tic, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINC, model_fr550_tinc, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIN, model_fr550_tin, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIP, model_fr550_tip, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIV, model_fr550_tiv, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINV, model_fr550_tinv, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIRA, model_fr550_ftira, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINO, model_fr550_ftino, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINE, model_fr550_ftine, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIEQ, model_fr550_ftieq, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILG, model_fr550_ftilg, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUE, model_fr550_ftiue, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUL, model_fr550_ftiul, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGE, model_fr550_ftige, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILT, model_fr550_ftilt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUGE, model_fr550_ftiuge, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUG, model_fr550_ftiug, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILE, model_fr550_ftile, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGT, model_fr550_ftigt, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIULE, model_fr550_ftiule, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIU, model_fr550_ftiu, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIO, model_fr550_ftio, { { (int) UNIT_FR550_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_BREAK, model_fr550_break, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MTRAP, model_fr550_mtrap, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCR, model_fr550_andcr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCR, model_fr550_orcr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCR, model_fr550_xorcr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDCR, model_fr550_nandcr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORCR, model_fr550_norcr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDNCR, model_fr550_andncr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_ORNCR, model_fr550_orncr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NANDNCR, model_fr550_nandncr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NORNCR, model_fr550_norncr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NOTCR, model_fr550_notcr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CKRA, model_fr550_ckra, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKNO, model_fr550_ckno, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKEQ, model_fr550_ckeq, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKNE, model_fr550_ckne, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKLE, model_fr550_ckle, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKGT, model_fr550_ckgt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKLT, model_fr550_cklt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKGE, model_fr550_ckge, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKLS, model_fr550_ckls, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKHI, model_fr550_ckhi, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKC, model_fr550_ckc, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKNC, model_fr550_cknc, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKN, model_fr550_ckn, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKP, model_fr550_ckp, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKV, model_fr550_ckv, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CKNV, model_fr550_cknv, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKRA, model_fr550_fckra, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKNO, model_fr550_fckno, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKNE, model_fr550_fckne, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKEQ, model_fr550_fckeq, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKLG, model_fr550_fcklg, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKUE, model_fr550_fckue, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKUL, model_fr550_fckul, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKGE, model_fr550_fckge, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKLT, model_fr550_fcklt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKUGE, model_fr550_fckuge, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKUG, model_fr550_fckug, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKLE, model_fr550_fckle, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKGT, model_fr550_fckgt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKULE, model_fr550_fckule, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKU, model_fr550_fcku, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_FCKO, model_fr550_fcko, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKRA, model_fr550_cckra, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKNO, model_fr550_cckno, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKEQ, model_fr550_cckeq, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKNE, model_fr550_cckne, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKLE, model_fr550_cckle, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKGT, model_fr550_cckgt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKLT, model_fr550_ccklt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKGE, model_fr550_cckge, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKLS, model_fr550_cckls, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKHI, model_fr550_cckhi, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKC, model_fr550_cckc, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKNC, model_fr550_ccknc, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKN, model_fr550_cckn, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKP, model_fr550_cckp, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKV, model_fr550_cckv, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKNV, model_fr550_ccknv, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKRA, model_fr550_cfckra, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKNO, model_fr550_cfckno, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKNE, model_fr550_cfckne, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKEQ, model_fr550_cfckeq, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKLG, model_fr550_cfcklg, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUE, model_fr550_cfckue, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUL, model_fr550_cfckul, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKGE, model_fr550_cfckge, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKLT, model_fr550_cfcklt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUGE, model_fr550_cfckuge, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUG, model_fr550_cfckug, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKLE, model_fr550_cfckle, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKGT, model_fr550_cfckgt, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKULE, model_fr550_cfckule, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKU, model_fr550_cfcku, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKO, model_fr550_cfcko, { { (int) UNIT_FR550_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CJMPL, model_fr550_cjmpl, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_CCALLL, model_fr550_ccalll, { { (int) UNIT_FR550_U_BRANCH, 1, 1 } } },
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|
{ FRVBF_INSN_ICI, model_fr550_ici, { { (int) UNIT_FR550_U_ICI, 1, 1 } } },
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|
{ FRVBF_INSN_DCI, model_fr550_dci, { { (int) UNIT_FR550_U_DCI, 1, 1 } } },
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{ FRVBF_INSN_ICEI, model_fr550_icei, { { (int) UNIT_FR550_U_ICI, 1, 1 } } },
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{ FRVBF_INSN_DCEI, model_fr550_dcei, { { (int) UNIT_FR550_U_DCI, 1, 1 } } },
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|
{ FRVBF_INSN_DCF, model_fr550_dcf, { { (int) UNIT_FR550_U_DCF, 1, 1 } } },
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{ FRVBF_INSN_DCEF, model_fr550_dcef, { { (int) UNIT_FR550_U_DCF, 1, 1 } } },
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{ FRVBF_INSN_WITLB, model_fr550_witlb, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_WDTLB, model_fr550_wdtlb, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_ITLBI, model_fr550_itlbi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_DTLBI, model_fr550_dtlbi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_ICPL, model_fr550_icpl, { { (int) UNIT_FR550_U_ICPL, 1, 1 } } },
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|
{ FRVBF_INSN_DCPL, model_fr550_dcpl, { { (int) UNIT_FR550_U_DCPL, 1, 1 } } },
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{ FRVBF_INSN_ICUL, model_fr550_icul, { { (int) UNIT_FR550_U_ICUL, 1, 1 } } },
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{ FRVBF_INSN_DCUL, model_fr550_dcul, { { (int) UNIT_FR550_U_DCUL, 1, 1 } } },
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|
{ FRVBF_INSN_BAR, model_fr550_bar, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_MEMBAR, model_fr550_membar, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_LRAI, model_fr550_lrai, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_LRAD, model_fr550_lrad, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_TLBPR, model_fr550_tlbpr, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_COP1, model_fr550_cop1, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_COP2, model_fr550_cop2, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_CLRGR, model_fr550_clrgr, { { (int) UNIT_FR550_U_CLRGR, 1, 1 } } },
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|
{ FRVBF_INSN_CLRFR, model_fr550_clrfr, { { (int) UNIT_FR550_U_CLRFR, 1, 1 } } },
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|
{ FRVBF_INSN_CLRGA, model_fr550_clrga, { { (int) UNIT_FR550_U_CLRGR, 1, 1 } } },
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|
{ FRVBF_INSN_CLRFA, model_fr550_clrfa, { { (int) UNIT_FR550_U_CLRFR, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGR, model_fr550_commitgr, { { (int) UNIT_FR550_U_COMMIT, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFR, model_fr550_commitfr, { { (int) UNIT_FR550_U_COMMIT, 1, 1 } } },
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|
{ FRVBF_INSN_COMMITGA, model_fr550_commitga, { { (int) UNIT_FR550_U_COMMIT, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFA, model_fr550_commitfa, { { (int) UNIT_FR550_U_COMMIT, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOS, model_fr550_fitos, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FSTOI, model_fr550_fstoi, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOD, model_fr550_fitod, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FDTOI, model_fr550_fdtoi, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FDITOS, model_fr550_fditos, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_FDSTOI, model_fr550_fdstoi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDITOS, model_fr550_nfditos, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSTOI, model_fr550_nfdstoi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFITOS, model_fr550_cfitos, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSTOI, model_fr550_cfstoi, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFITOS, model_fr550_nfitos, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSTOI, model_fr550_nfstoi, { { (int) UNIT_FR550_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVS, model_fr550_fmovs, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVD, model_fr550_fmovd, { { (int) UNIT_FR550_U_FR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMOVS, model_fr550_fdmovs, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMOVS, model_fr550_cfmovs, { { (int) UNIT_FR550_U_FR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGS, model_fr550_fnegs, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGD, model_fr550_fnegd, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDNEGS, model_fr550_fdnegs, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFNEGS, model_fr550_cfnegs, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSS, model_fr550_fabss, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSD, model_fr550_fabsd, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDABSS, model_fr550_fdabss, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFABSS, model_fr550_cfabss, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTS, model_fr550_fsqrts, { { (int) UNIT_FR550_U_FLOAT_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSQRTS, model_fr550_fdsqrts, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSQRTS, model_fr550_nfdsqrts, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTD, model_fr550_fsqrtd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSQRTS, model_fr550_cfsqrts, { { (int) UNIT_FR550_U_FLOAT_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSQRTS, model_fr550_nfsqrts, { { (int) UNIT_FR550_U_FLOAT_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDS, model_fr550_fadds, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBS, model_fr550_fsubs, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULS, model_fr550_fmuls, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVS, model_fr550_fdivs, { { (int) UNIT_FR550_U_FLOAT_DIV, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDD, model_fr550_faddd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBD, model_fr550_fsubd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULD, model_fr550_fmuld, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVD, model_fr550_fdivd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFADDS, model_fr550_cfadds, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSUBS, model_fr550_cfsubs, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMULS, model_fr550_cfmuls, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFDIVS, model_fr550_cfdivs, { { (int) UNIT_FR550_U_FLOAT_DIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NFADDS, model_fr550_nfadds, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSUBS, model_fr550_nfsubs, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMULS, model_fr550_nfmuls, { { (int) UNIT_FR550_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDIVS, model_fr550_nfdivs, { { (int) UNIT_FR550_U_FLOAT_DIV, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPS, model_fr550_fcmps, { { (int) UNIT_FR550_U_FLOAT_COMPARE, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPD, model_fr550_fcmpd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCMPS, model_fr550_cfcmps, { { (int) UNIT_FR550_U_FLOAT_COMPARE, 1, 1 } } },
|
|
{ FRVBF_INSN_FDCMPS, model_fr550_fdcmps, { { (int) UNIT_FR550_U_FLOAT_DUAL_COMPARE, 1, 3 } } },
|
|
{ FRVBF_INSN_FMADDS, model_fr550_fmadds, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBS, model_fr550_fmsubs, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDD, model_fr550_fmaddd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBD, model_fr550_fmsubd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMADDS, model_fr550_fdmadds, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMADDS, model_fr550_nfdmadds, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMADDS, model_fr550_cfmadds, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSUBS, model_fr550_cfmsubs, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMADDS, model_fr550_nfmadds, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSUBS, model_fr550_nfmsubs, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAS, model_fr550_fmas, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FMSS, model_fr550_fmss, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FDMAS, model_fr550_fdmas, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_FDMSS, model_fr550_fdmss, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NFDMAS, model_fr550_nfdmas, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NFDMSS, model_fr550_nfdmss, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CFMAS, model_fr550_cfmas, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_CFMSS, model_fr550_cfmss, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FMAD, model_fr550_fmad, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_FMSD, model_fr550_fmsd, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NFMAS, model_fr550_nfmas, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFMSS, model_fr550_nfmss, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FDADDS, model_fr550_fdadds, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FDSUBS, model_fr550_fdsubs, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FDMULS, model_fr550_fdmuls, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FDDIVS, model_fr550_fddivs, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FDSADS, model_fr550_fdsads, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_FDMULCS, model_fr550_fdmulcs, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFDMULCS, model_fr550_nfdmulcs, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFDADDS, model_fr550_nfdadds, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFDSUBS, model_fr550_nfdsubs, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFDMULS, model_fr550_nfdmuls, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFDDIVS, model_fr550_nfddivs, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFDSADS, model_fr550_nfdsads, { { (int) UNIT_FR550_U_FLOAT_DUAL_ARITH, 1, 3 } } },
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{ FRVBF_INSN_NFDCMPS, model_fr550_nfdcmps, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MHSETLOS, model_fr550_mhsetlos, { { (int) UNIT_FR550_U_MEDIA_SET, 1, 1 } } },
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{ FRVBF_INSN_MHSETHIS, model_fr550_mhsethis, { { (int) UNIT_FR550_U_MEDIA_SET, 1, 1 } } },
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{ FRVBF_INSN_MHDSETS, model_fr550_mhdsets, { { (int) UNIT_FR550_U_MEDIA_SET, 1, 1 } } },
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{ FRVBF_INSN_MHSETLOH, model_fr550_mhsetloh, { { (int) UNIT_FR550_U_MEDIA_SET, 1, 1 } } },
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{ FRVBF_INSN_MHSETHIH, model_fr550_mhsethih, { { (int) UNIT_FR550_U_MEDIA_SET, 1, 1 } } },
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{ FRVBF_INSN_MHDSETH, model_fr550_mhdseth, { { (int) UNIT_FR550_U_MEDIA_SET, 1, 1 } } },
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{ FRVBF_INSN_MAND, model_fr550_mand, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MOR, model_fr550_mor, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MXOR, model_fr550_mxor, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMAND, model_fr550_cmand, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMOR, model_fr550_cmor, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMXOR, model_fr550_cmxor, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MNOT, model_fr550_mnot, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMNOT, model_fr550_cmnot, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MROTLI, model_fr550_mrotli, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MROTRI, model_fr550_mrotri, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MWCUT, model_fr550_mwcut, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MWCUTI, model_fr550_mwcuti, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCUT, model_fr550_mcut, { { (int) UNIT_FR550_U_MEDIA_3_ACC, 1, 1 } } },
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{ FRVBF_INSN_MCUTI, model_fr550_mcuti, { { (int) UNIT_FR550_U_MEDIA_3_ACC, 1, 1 } } },
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{ FRVBF_INSN_MCUTSS, model_fr550_mcutss, { { (int) UNIT_FR550_U_MEDIA_3_ACC, 1, 1 } } },
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{ FRVBF_INSN_MCUTSSI, model_fr550_mcutssi, { { (int) UNIT_FR550_U_MEDIA_3_ACC, 1, 1 } } },
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{ FRVBF_INSN_MDCUTSSI, model_fr550_mdcutssi, { { (int) UNIT_FR550_U_MEDIA_3_ACC_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MAVEH, model_fr550_maveh, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSLLHI, model_fr550_msllhi, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSRLHI, model_fr550_msrlhi, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSRAHI, model_fr550_msrahi, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MDROTLI, model_fr550_mdrotli, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MCPLHI, model_fr550_mcplhi, { { (int) UNIT_FR550_U_MEDIA_3_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MCPLI, model_fr550_mcpli, { { (int) UNIT_FR550_U_MEDIA_3_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MSATHS, model_fr550_msaths, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MQSATHS, model_fr550_mqsaths, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MSATHU, model_fr550_msathu, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCMPSH, model_fr550_mcmpsh, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCMPUH, model_fr550_mcmpuh, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MABSHS, model_fr550_mabshs, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MADDHSS, model_fr550_maddhss, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MADDHUS, model_fr550_maddhus, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSUBHSS, model_fr550_msubhss, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSUBHUS, model_fr550_msubhus, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMADDHSS, model_fr550_cmaddhss, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMADDHUS, model_fr550_cmaddhus, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMSUBHSS, model_fr550_cmsubhss, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMSUBHUS, model_fr550_cmsubhus, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MQADDHSS, model_fr550_mqaddhss, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQADDHUS, model_fr550_mqaddhus, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQSUBHSS, model_fr550_mqsubhss, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQSUBHUS, model_fr550_mqsubhus, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQADDHSS, model_fr550_cmqaddhss, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQADDHUS, model_fr550_cmqaddhus, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQSUBHSS, model_fr550_cmqsubhss, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQSUBHUS, model_fr550_cmqsubhus, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQLCLRHS, model_fr550_mqlclrhs, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQLMTHS, model_fr550_mqlmths, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQSLLHI, model_fr550_mqsllhi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQSRAHI, model_fr550_mqsrahi, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MADDACCS, model_fr550_maddaccs, { { (int) UNIT_FR550_U_MEDIA_4_ACC, 1, 1 } } },
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{ FRVBF_INSN_MSUBACCS, model_fr550_msubaccs, { { (int) UNIT_FR550_U_MEDIA_4_ACC, 1, 1 } } },
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{ FRVBF_INSN_MDADDACCS, model_fr550_mdaddaccs, { { (int) UNIT_FR550_U_MEDIA_4_ACC_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MDSUBACCS, model_fr550_mdsubaccs, { { (int) UNIT_FR550_U_MEDIA_4_ACC_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MASACCS, model_fr550_masaccs, { { (int) UNIT_FR550_U_MEDIA_4_ADD_SUB, 1, 1 } } },
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{ FRVBF_INSN_MDASACCS, model_fr550_mdasaccs, { { (int) UNIT_FR550_U_MEDIA_4_ADD_SUB_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MMULHS, model_fr550_mmulhs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MMULHU, model_fr550_mmulhu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MMULXHS, model_fr550_mmulxhs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MMULXHU, model_fr550_mmulxhu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_CMMULHS, model_fr550_cmmulhs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_CMMULHU, model_fr550_cmmulhu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MQMULHS, model_fr550_mqmulhs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQMULHU, model_fr550_mqmulhu, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQMULXHS, model_fr550_mqmulxhs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQMULXHU, model_fr550_mqmulxhu, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQMULHS, model_fr550_cmqmulhs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQMULHU, model_fr550_cmqmulhu, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MMACHS, model_fr550_mmachs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MMACHU, model_fr550_mmachu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MMRDHS, model_fr550_mmrdhs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MMRDHU, model_fr550_mmrdhu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_CMMACHS, model_fr550_cmmachs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_CMMACHU, model_fr550_cmmachu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MQMACHS, model_fr550_mqmachs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQMACHU, model_fr550_mqmachu, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_CMQMACHS, model_fr550_cmqmachs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHU, model_fr550_cmqmachu, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQXMACHS, model_fr550_mqxmachs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQXMACXHS, model_fr550_mqxmacxhs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQMACXHS, model_fr550_mqmacxhs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MCPXRS, model_fr550_mcpxrs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MCPXRU, model_fr550_mcpxru, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MCPXIS, model_fr550_mcpxis, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MCPXIU, model_fr550_mcpxiu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_CMCPXRS, model_fr550_cmcpxrs, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_CMCPXRU, model_fr550_cmcpxru, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIS, model_fr550_cmcpxis, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIU, model_fr550_cmcpxiu, { { (int) UNIT_FR550_U_MEDIA_4, 1, 1 } } },
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|
{ FRVBF_INSN_MQCPXRS, model_fr550_mqcpxrs, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQCPXRU, model_fr550_mqcpxru, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQCPXIS, model_fr550_mqcpxis, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQCPXIU, model_fr550_mqcpxiu, { { (int) UNIT_FR550_U_MEDIA_4_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHW, model_fr550_mexpdhw, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHW, model_fr550_cmexpdhw, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHD, model_fr550_mexpdhd, { { (int) UNIT_FR550_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHD, model_fr550_cmexpdhd, { { (int) UNIT_FR550_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MPACKH, model_fr550_mpackh, { { (int) UNIT_FR550_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MDPACKH, model_fr550_mdpackh, { { (int) UNIT_FR550_U_MEDIA_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MUNPACKH, model_fr550_munpackh, { { (int) UNIT_FR550_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MDUNPACKH, model_fr550_mdunpackh, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOH, model_fr550_mbtoh, { { (int) UNIT_FR550_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
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|
{ FRVBF_INSN_CMBTOH, model_fr550_cmbtoh, { { (int) UNIT_FR550_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
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|
{ FRVBF_INSN_MHTOB, model_fr550_mhtob, { { (int) UNIT_FR550_U_MEDIA_3_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_CMHTOB, model_fr550_cmhtob, { { (int) UNIT_FR550_U_MEDIA_3_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOHE, model_fr550_mbtohe, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOHE, model_fr550_cmbtohe, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOP, model_fr550_mnop, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_0, model_fr550_mclracc_0, { { (int) UNIT_FR550_U_MEDIA_3_MCLRACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_1, model_fr550_mclracc_1, { { (int) UNIT_FR550_U_MEDIA_3_MCLRACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACC, model_fr550_mrdacc, { { (int) UNIT_FR550_U_MEDIA_3_ACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACCG, model_fr550_mrdaccg, { { (int) UNIT_FR550_U_MEDIA_3_ACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACC, model_fr550_mwtacc, { { (int) UNIT_FR550_U_MEDIA_3_WTACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACCG, model_fr550_mwtaccg, { { (int) UNIT_FR550_U_MEDIA_3_WTACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP1, model_fr550_mcop1, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP2, model_fr550_mcop2, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNOP, model_fr550_fnop, { { (int) UNIT_FR550_U_EXEC, 1, 1 } } },
|
|
};
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|
|
/* Model timing data for `fr500'. */
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|
|
|
static const INSN_TIMING fr500_timing[] = {
|
|
{ FRVBF_INSN_X_INVALID, 0, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_AFTER, 0, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEFORE, 0, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CHAIN, 0, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEGIN, 0, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_ADD, model_fr500_add, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUB, model_fr500_sub, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_AND, model_fr500_and, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_OR, model_fr500_or, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_XOR, model_fr500_xor, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_NOT, model_fr500_not, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SDIV, model_fr500_sdiv, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NSDIV, model_fr500_nsdiv, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_UDIV, model_fr500_udiv, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NUDIV, model_fr500_nudiv, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_SMUL, model_fr500_smul, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_UMUL, model_fr500_umul, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_SMU, model_fr500_smu, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SMASS, model_fr500_smass, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SMSSS, model_fr500_smsss, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SLL, model_fr500_sll, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRL, model_fr500_srl, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRA, model_fr500_sra, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLASS, model_fr500_slass, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCUTSS, model_fr500_scutss, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCAN, model_fr500_scan, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CADD, model_fr500_cadd, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSUB, model_fr500_csub, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CAND, model_fr500_cand, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_COR, model_fr500_cor, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CXOR, model_fr500_cxor, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CNOT, model_fr500_cnot, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSMUL, model_fr500_csmul, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_CSDIV, model_fr500_csdiv, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_CUDIV, model_fr500_cudiv, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_CSLL, model_fr500_csll, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRL, model_fr500_csrl, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRA, model_fr500_csra, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSCAN, model_fr500_cscan, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDCC, model_fr500_addcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBCC, model_fr500_subcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ANDCC, model_fr500_andcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ORCC, model_fr500_orcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_XORCC, model_fr500_xorcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLLCC, model_fr500_sllcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRLCC, model_fr500_srlcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRACC, model_fr500_sracc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SMULCC, model_fr500_smulcc, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_UMULCC, model_fr500_umulcc, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_CADDCC, model_fr500_caddcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSUBCC, model_fr500_csubcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSMULCC, model_fr500_csmulcc, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_CANDCC, model_fr500_candcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CORCC, model_fr500_corcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CXORCC, model_fr500_cxorcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSLLCC, model_fr500_csllcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRLCC, model_fr500_csrlcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRACC, model_fr500_csracc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDX, model_fr500_addx, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBX, model_fr500_subx, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDXCC, model_fr500_addxcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBXCC, model_fr500_subxcc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDSS, model_fr500_addss, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SUBSS, model_fr500_subss, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_ADDI, model_fr500_addi, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBI, model_fr500_subi, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ANDI, model_fr500_andi, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ORI, model_fr500_ori, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_XORI, model_fr500_xori, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SDIVI, model_fr500_sdivi, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NSDIVI, model_fr500_nsdivi, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_UDIVI, model_fr500_udivi, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NUDIVI, model_fr500_nudivi, { { (int) UNIT_FR500_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_SMULI, model_fr500_smuli, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_UMULI, model_fr500_umuli, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_SLLI, model_fr500_slli, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRLI, model_fr500_srli, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRAI, model_fr500_srai, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SCANI, model_fr500_scani, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDICC, model_fr500_addicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBICC, model_fr500_subicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ANDICC, model_fr500_andicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ORICC, model_fr500_oricc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_XORICC, model_fr500_xoricc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SMULICC, model_fr500_smulicc, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_UMULICC, model_fr500_umulicc, { { (int) UNIT_FR500_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_SLLICC, model_fr500_sllicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRLICC, model_fr500_srlicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRAICC, model_fr500_sraicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDXI, model_fr500_addxi, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBXI, model_fr500_subxi, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_ADDXICC, model_fr500_addxicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUBXICC, model_fr500_subxicc, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CMPB, model_fr500_cmpb, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMPBA, model_fr500_cmpba, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SETLO, model_fr500_setlo, { { (int) UNIT_FR500_U_SET_HILO, 1, 1 } } },
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{ FRVBF_INSN_SETHI, model_fr500_sethi, { { (int) UNIT_FR500_U_SET_HILO, 1, 1 } } },
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{ FRVBF_INSN_SETLOS, model_fr500_setlos, { { (int) UNIT_FR500_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_LDSB, model_fr500_ldsb, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUB, model_fr500_ldub, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSH, model_fr500_ldsh, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUH, model_fr500_lduh, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LD, model_fr500_ld, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBF, model_fr500_ldbf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHF, model_fr500_ldhf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDF, model_fr500_ldf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDC, model_fr500_ldc, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDSB, model_fr500_nldsb, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUB, model_fr500_nldub, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSH, model_fr500_nldsh, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUH, model_fr500_nlduh, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLD, model_fr500_nld, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDBF, model_fr500_nldbf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDHF, model_fr500_nldhf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDF, model_fr500_nldf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDD, model_fr500_ldd, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDF, model_fr500_lddf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDC, model_fr500_lddc, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDD, model_fr500_nldd, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDF, model_fr500_nlddf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQ, model_fr500_ldq, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQF, model_fr500_ldqf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQC, model_fr500_ldqc, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQ, model_fr500_nldq, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDQF, model_fr500_nldqf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSBU, model_fr500_ldsbu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUBU, model_fr500_ldubu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSHU, model_fr500_ldshu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUHU, model_fr500_lduhu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDU, model_fr500_ldu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSBU, model_fr500_nldsbu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUBU, model_fr500_nldubu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSHU, model_fr500_nldshu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUHU, model_fr500_nlduhu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDU, model_fr500_nldu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBFU, model_fr500_ldbfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHFU, model_fr500_ldhfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDFU, model_fr500_ldfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDCU, model_fr500_ldcu, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDBFU, model_fr500_nldbfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDHFU, model_fr500_nldhfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDFU, model_fr500_nldfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDU, model_fr500_lddu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDU, model_fr500_nlddu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDFU, model_fr500_lddfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDCU, model_fr500_lddcu, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDDFU, model_fr500_nlddfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQU, model_fr500_ldqu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDQU, model_fr500_nldqu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQFU, model_fr500_ldqfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQCU, model_fr500_ldqcu, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQFU, model_fr500_nldqfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSBI, model_fr500_ldsbi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSHI, model_fr500_ldshi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDI, model_fr500_ldi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUBI, model_fr500_ldubi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUHI, model_fr500_lduhi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBFI, model_fr500_ldbfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHFI, model_fr500_ldhfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDFI, model_fr500_ldfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSBI, model_fr500_nldsbi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUBI, model_fr500_nldubi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSHI, model_fr500_nldshi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDUHI, model_fr500_nlduhi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDI, model_fr500_nldi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDBFI, model_fr500_nldbfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDHFI, model_fr500_nldhfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDFI, model_fr500_nldfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDI, model_fr500_lddi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDFI, model_fr500_lddfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDI, model_fr500_nlddi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDFI, model_fr500_nlddfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQI, model_fr500_ldqi, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDQFI, model_fr500_ldqfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDQFI, model_fr500_nldqfi, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_STB, model_fr500_stb, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STH, model_fr500_sth, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_ST, model_fr500_st, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBF, model_fr500_stbf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHF, model_fr500_sthf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STF, model_fr500_stf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STC, model_fr500_stc, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STD, model_fr500_std, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDF, model_fr500_stdf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDC, model_fr500_stdc, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQ, model_fr500_stq, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STQF, model_fr500_stqf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STQC, model_fr500_stqc, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STBU, model_fr500_stbu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHU, model_fr500_sthu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STU, model_fr500_stu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBFU, model_fr500_stbfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHFU, model_fr500_sthfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STFU, model_fr500_stfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STCU, model_fr500_stcu, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STDU, model_fr500_stdu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDFU, model_fr500_stdfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDCU, model_fr500_stdcu, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQU, model_fr500_stqu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STQFU, model_fr500_stqfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STQCU, model_fr500_stqcu, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CLDSB, model_fr500_cldsb, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUB, model_fr500_cldub, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSH, model_fr500_cldsh, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUH, model_fr500_clduh, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLD, model_fr500_cld, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDBF, model_fr500_cldbf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDHF, model_fr500_cldhf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDF, model_fr500_cldf, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDD, model_fr500_cldd, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDF, model_fr500_clddf, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDQ, model_fr500_cldq, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSBU, model_fr500_cldsbu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUBU, model_fr500_cldubu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSHU, model_fr500_cldshu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUHU, model_fr500_clduhu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDU, model_fr500_cldu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDBFU, model_fr500_cldbfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDHFU, model_fr500_cldhfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDFU, model_fr500_cldfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDU, model_fr500_clddu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDFU, model_fr500_clddfu, { { (int) UNIT_FR500_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDQU, model_fr500_cldqu, { { (int) UNIT_FR500_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CSTB, model_fr500_cstb, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTH, model_fr500_csth, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CST, model_fr500_cst, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTBF, model_fr500_cstbf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHF, model_fr500_csthf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTF, model_fr500_cstf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTD, model_fr500_cstd, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDF, model_fr500_cstdf, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTQ, model_fr500_cstq, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTBU, model_fr500_cstbu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHU, model_fr500_csthu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTU, model_fr500_cstu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTBFU, model_fr500_cstbfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHFU, model_fr500_csthfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTFU, model_fr500_cstfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDU, model_fr500_cstdu, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDFU, model_fr500_cstdfu, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBI, model_fr500_stbi, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHI, model_fr500_sthi, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STI, model_fr500_sti, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBFI, model_fr500_stbfi, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHFI, model_fr500_sthfi, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STFI, model_fr500_stfi, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDI, model_fr500_stdi, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDFI, model_fr500_stdfi, { { (int) UNIT_FR500_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STQI, model_fr500_stqi, { { (int) UNIT_FR500_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STQFI, model_fr500_stqfi, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SWAP, model_fr500_swap, { { (int) UNIT_FR500_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_SWAPI, model_fr500_swapi, { { (int) UNIT_FR500_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_CSWAP, model_fr500_cswap, { { (int) UNIT_FR500_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_MOVGF, model_fr500_movgf, { { (int) UNIT_FR500_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_MOVFG, model_fr500_movfg, { { (int) UNIT_FR500_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGFD, model_fr500_movgfd, { { (int) UNIT_FR500_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_MOVFGD, model_fr500_movfgd, { { (int) UNIT_FR500_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGFQ, model_fr500_movgfq, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MOVFGQ, model_fr500_movfgq, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMOVGF, model_fr500_cmovgf, { { (int) UNIT_FR500_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_CMOVFG, model_fr500_cmovfg, { { (int) UNIT_FR500_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_CMOVGFD, model_fr500_cmovgfd, { { (int) UNIT_FR500_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_CMOVFGD, model_fr500_cmovfgd, { { (int) UNIT_FR500_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGS, model_fr500_movgs, { { (int) UNIT_FR500_U_GR2SPR, 1, 1 } } },
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{ FRVBF_INSN_MOVSG, model_fr500_movsg, { { (int) UNIT_FR500_U_SPR2GR, 1, 1 } } },
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{ FRVBF_INSN_BRA, model_fr500_bra, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNO, model_fr500_bno, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BEQ, model_fr500_beq, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNE, model_fr500_bne, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLE, model_fr500_ble, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGT, model_fr500_bgt, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLT, model_fr500_blt, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGE, model_fr500_bge, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLS, model_fr500_bls, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BHI, model_fr500_bhi, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BC, model_fr500_bc, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNC, model_fr500_bnc, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BN, model_fr500_bn, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BP, model_fr500_bp, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BV, model_fr500_bv, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNV, model_fr500_bnv, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBRA, model_fr500_fbra, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBNO, model_fr500_fbno, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBNE, model_fr500_fbne, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBEQ, model_fr500_fbeq, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBLG, model_fr500_fblg, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBUE, model_fr500_fbue, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBUL, model_fr500_fbul, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBGE, model_fr500_fbge, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBLT, model_fr500_fblt, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBUGE, model_fr500_fbuge, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBUG, model_fr500_fbug, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBLE, model_fr500_fble, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBGT, model_fr500_fbgt, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBULE, model_fr500_fbule, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBU, model_fr500_fbu, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBO, model_fr500_fbo, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BCTRLR, model_fr500_bctrlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BRALR, model_fr500_bralr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNOLR, model_fr500_bnolr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BEQLR, model_fr500_beqlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNELR, model_fr500_bnelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLELR, model_fr500_blelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGTLR, model_fr500_bgtlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLTLR, model_fr500_bltlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGELR, model_fr500_bgelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLSLR, model_fr500_blslr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BHILR, model_fr500_bhilr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BCLR, model_fr500_bclr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNCLR, model_fr500_bnclr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNLR, model_fr500_bnlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BPLR, model_fr500_bplr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BVLR, model_fr500_bvlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNVLR, model_fr500_bnvlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBRALR, model_fr500_fbralr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBNOLR, model_fr500_fbnolr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBEQLR, model_fr500_fbeqlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBNELR, model_fr500_fbnelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBLGLR, model_fr500_fblglr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBUELR, model_fr500_fbuelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBULLR, model_fr500_fbullr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_FBGELR, model_fr500_fbgelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLTLR, model_fr500_fbltlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGELR, model_fr500_fbugelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGLR, model_fr500_fbuglr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLELR, model_fr500_fblelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGTLR, model_fr500_fbgtlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULELR, model_fr500_fbulelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULR, model_fr500_fbulr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBOLR, model_fr500_fbolr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCRALR, model_fr500_bcralr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNOLR, model_fr500_bcnolr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCEQLR, model_fr500_bceqlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNELR, model_fr500_bcnelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLELR, model_fr500_bclelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGTLR, model_fr500_bcgtlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLTLR, model_fr500_bcltlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGELR, model_fr500_bcgelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLSLR, model_fr500_bclslr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCHILR, model_fr500_bchilr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCCLR, model_fr500_bcclr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNCLR, model_fr500_bcnclr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNLR, model_fr500_bcnlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCPLR, model_fr500_bcplr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCVLR, model_fr500_bcvlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNVLR, model_fr500_bcnvlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBRALR, model_fr500_fcbralr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNOLR, model_fr500_fcbnolr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBEQLR, model_fr500_fcbeqlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNELR, model_fr500_fcbnelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLGLR, model_fr500_fcblglr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUELR, model_fr500_fcbuelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULLR, model_fr500_fcbullr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGELR, model_fr500_fcbgelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLTLR, model_fr500_fcbltlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGELR, model_fr500_fcbugelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGLR, model_fr500_fcbuglr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLELR, model_fr500_fcblelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGTLR, model_fr500_fcbgtlr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULELR, model_fr500_fcbulelr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULR, model_fr500_fcbulr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBOLR, model_fr500_fcbolr, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPL, model_fr500_jmpl, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLL, model_fr500_calll, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPIL, model_fr500_jmpil, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLIL, model_fr500_callil, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALL, model_fr500_call, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_RETT, model_fr500_rett, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_REI, model_fr500_rei, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TRA, model_fr500_tra, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNO, model_fr500_tno, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TEQ, model_fr500_teq, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNE, model_fr500_tne, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLE, model_fr500_tle, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGT, model_fr500_tgt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLT, model_fr500_tlt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGE, model_fr500_tge, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLS, model_fr500_tls, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_THI, model_fr500_thi, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TC, model_fr500_tc, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNC, model_fr500_tnc, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TN, model_fr500_tn, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TP, model_fr500_tp, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TV, model_fr500_tv, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNV, model_fr500_tnv, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTRA, model_fr500_ftra, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNO, model_fr500_ftno, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNE, model_fr500_ftne, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTEQ, model_fr500_fteq, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLG, model_fr500_ftlg, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUE, model_fr500_ftue, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUL, model_fr500_ftul, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGE, model_fr500_ftge, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLT, model_fr500_ftlt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUGE, model_fr500_ftuge, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUG, model_fr500_ftug, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLE, model_fr500_ftle, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGT, model_fr500_ftgt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTULE, model_fr500_ftule, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTU, model_fr500_ftu, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTO, model_fr500_fto, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIRA, model_fr500_tira, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINO, model_fr500_tino, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIEQ, model_fr500_tieq, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINE, model_fr500_tine, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILE, model_fr500_tile, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGT, model_fr500_tigt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILT, model_fr500_tilt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGE, model_fr500_tige, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILS, model_fr500_tils, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIHI, model_fr500_tihi, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIC, model_fr500_tic, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINC, model_fr500_tinc, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIN, model_fr500_tin, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIP, model_fr500_tip, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIV, model_fr500_tiv, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINV, model_fr500_tinv, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIRA, model_fr500_ftira, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINO, model_fr500_ftino, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINE, model_fr500_ftine, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIEQ, model_fr500_ftieq, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILG, model_fr500_ftilg, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUE, model_fr500_ftiue, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUL, model_fr500_ftiul, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGE, model_fr500_ftige, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILT, model_fr500_ftilt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUGE, model_fr500_ftiuge, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUG, model_fr500_ftiug, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILE, model_fr500_ftile, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGT, model_fr500_ftigt, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIULE, model_fr500_ftiule, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIU, model_fr500_ftiu, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIO, model_fr500_ftio, { { (int) UNIT_FR500_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_BREAK, model_fr500_break, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MTRAP, model_fr500_mtrap, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCR, model_fr500_andcr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCR, model_fr500_orcr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCR, model_fr500_xorcr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDCR, model_fr500_nandcr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORCR, model_fr500_norcr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDNCR, model_fr500_andncr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORNCR, model_fr500_orncr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDNCR, model_fr500_nandncr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORNCR, model_fr500_norncr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOTCR, model_fr500_notcr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKRA, model_fr500_ckra, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNO, model_fr500_ckno, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKEQ, model_fr500_ckeq, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNE, model_fr500_ckne, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLE, model_fr500_ckle, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGT, model_fr500_ckgt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLT, model_fr500_cklt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGE, model_fr500_ckge, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLS, model_fr500_ckls, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKHI, model_fr500_ckhi, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKC, model_fr500_ckc, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNC, model_fr500_cknc, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKN, model_fr500_ckn, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKP, model_fr500_ckp, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKV, model_fr500_ckv, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNV, model_fr500_cknv, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKRA, model_fr500_fckra, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNO, model_fr500_fckno, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNE, model_fr500_fckne, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKEQ, model_fr500_fckeq, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLG, model_fr500_fcklg, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUE, model_fr500_fckue, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUL, model_fr500_fckul, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGE, model_fr500_fckge, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLT, model_fr500_fcklt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUGE, model_fr500_fckuge, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUG, model_fr500_fckug, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLE, model_fr500_fckle, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGT, model_fr500_fckgt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKULE, model_fr500_fckule, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKU, model_fr500_fcku, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKO, model_fr500_fcko, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKRA, model_fr500_cckra, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNO, model_fr500_cckno, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKEQ, model_fr500_cckeq, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNE, model_fr500_cckne, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLE, model_fr500_cckle, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGT, model_fr500_cckgt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLT, model_fr500_ccklt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGE, model_fr500_cckge, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKLS, model_fr500_cckls, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKHI, model_fr500_cckhi, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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|
{ FRVBF_INSN_CCKC, model_fr500_cckc, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CCKNC, model_fr500_ccknc, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKN, model_fr500_cckn, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKP, model_fr500_cckp, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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|
{ FRVBF_INSN_CCKV, model_fr500_cckv, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNV, model_fr500_ccknv, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKRA, model_fr500_cfckra, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNO, model_fr500_cfckno, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKNE, model_fr500_cfckne, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKEQ, model_fr500_cfckeq, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKLG, model_fr500_cfcklg, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUE, model_fr500_cfckue, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUL, model_fr500_cfckul, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
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{ FRVBF_INSN_CFCKGE, model_fr500_cfckge, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKLT, model_fr500_cfcklt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUGE, model_fr500_cfckuge, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
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{ FRVBF_INSN_CFCKUG, model_fr500_cfckug, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
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{ FRVBF_INSN_CFCKLE, model_fr500_cfckle, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
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{ FRVBF_INSN_CFCKGT, model_fr500_cfckgt, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
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{ FRVBF_INSN_CFCKULE, model_fr500_cfckule, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
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{ FRVBF_INSN_CFCKU, model_fr500_cfcku, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
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{ FRVBF_INSN_CFCKO, model_fr500_cfcko, { { (int) UNIT_FR500_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CJMPL, model_fr500_cjmpl, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_CCALLL, model_fr500_ccalll, { { (int) UNIT_FR500_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_ICI, model_fr500_ici, { { (int) UNIT_FR500_U_ICI, 1, 1 } } },
|
|
{ FRVBF_INSN_DCI, model_fr500_dci, { { (int) UNIT_FR500_U_DCI, 1, 1 } } },
|
|
{ FRVBF_INSN_ICEI, model_fr500_icei, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEI, model_fr500_dcei, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCF, model_fr500_dcf, { { (int) UNIT_FR500_U_DCF, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEF, model_fr500_dcef, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WITLB, model_fr500_witlb, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WDTLB, model_fr500_wdtlb, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ITLBI, model_fr500_itlbi, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DTLBI, model_fr500_dtlbi, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICPL, model_fr500_icpl, { { (int) UNIT_FR500_U_ICPL, 1, 1 } } },
|
|
{ FRVBF_INSN_DCPL, model_fr500_dcpl, { { (int) UNIT_FR500_U_DCPL, 1, 1 } } },
|
|
{ FRVBF_INSN_ICUL, model_fr500_icul, { { (int) UNIT_FR500_U_ICUL, 1, 1 } } },
|
|
{ FRVBF_INSN_DCUL, model_fr500_dcul, { { (int) UNIT_FR500_U_DCUL, 1, 1 } } },
|
|
{ FRVBF_INSN_BAR, model_fr500_bar, { { (int) UNIT_FR500_U_BARRIER, 1, 1 } } },
|
|
{ FRVBF_INSN_MEMBAR, model_fr500_membar, { { (int) UNIT_FR500_U_MEMBAR, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAI, model_fr500_lrai, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAD, model_fr500_lrad, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLBPR, model_fr500_tlbpr, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP1, model_fr500_cop1, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP2, model_fr500_cop2, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGR, model_fr500_clrgr, { { (int) UNIT_FR500_U_CLRGR, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFR, model_fr500_clrfr, { { (int) UNIT_FR500_U_CLRFR, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGA, model_fr500_clrga, { { (int) UNIT_FR500_U_CLRGR, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFA, model_fr500_clrfa, { { (int) UNIT_FR500_U_CLRFR, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGR, model_fr500_commitgr, { { (int) UNIT_FR500_U_COMMIT, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFR, model_fr500_commitfr, { { (int) UNIT_FR500_U_COMMIT, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGA, model_fr500_commitga, { { (int) UNIT_FR500_U_COMMIT, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFA, model_fr500_commitfa, { { (int) UNIT_FR500_U_COMMIT, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOS, model_fr500_fitos, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FSTOI, model_fr500_fstoi, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOD, model_fr500_fitod, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FDTOI, model_fr500_fdtoi, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FDITOS, model_fr500_fditos, { { (int) UNIT_FR500_U_FLOAT_DUAL_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSTOI, model_fr500_fdstoi, { { (int) UNIT_FR500_U_FLOAT_DUAL_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDITOS, model_fr500_nfditos, { { (int) UNIT_FR500_U_FLOAT_DUAL_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSTOI, model_fr500_nfdstoi, { { (int) UNIT_FR500_U_FLOAT_DUAL_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_CFITOS, model_fr500_cfitos, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSTOI, model_fr500_cfstoi, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFITOS, model_fr500_nfitos, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSTOI, model_fr500_nfstoi, { { (int) UNIT_FR500_U_FLOAT_CONVERT, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVS, model_fr500_fmovs, { { (int) UNIT_FR500_U_FR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVD, model_fr500_fmovd, { { (int) UNIT_FR500_U_FR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMOVS, model_fr500_fdmovs, { { (int) UNIT_FR500_U_FR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMOVS, model_fr500_cfmovs, { { (int) UNIT_FR500_U_FR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGS, model_fr500_fnegs, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGD, model_fr500_fnegd, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDNEGS, model_fr500_fdnegs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFNEGS, model_fr500_cfnegs, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSS, model_fr500_fabss, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSD, model_fr500_fabsd, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDABSS, model_fr500_fdabss, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFABSS, model_fr500_cfabss, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTS, model_fr500_fsqrts, { { (int) UNIT_FR500_U_FLOAT_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSQRTS, model_fr500_fdsqrts, { { (int) UNIT_FR500_U_FLOAT_DUAL_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSQRTS, model_fr500_nfdsqrts, { { (int) UNIT_FR500_U_FLOAT_DUAL_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTD, model_fr500_fsqrtd, { { (int) UNIT_FR500_U_FLOAT_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSQRTS, model_fr500_cfsqrts, { { (int) UNIT_FR500_U_FLOAT_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSQRTS, model_fr500_nfsqrts, { { (int) UNIT_FR500_U_FLOAT_SQRT, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDS, model_fr500_fadds, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBS, model_fr500_fsubs, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULS, model_fr500_fmuls, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVS, model_fr500_fdivs, { { (int) UNIT_FR500_U_FLOAT_DIV, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDD, model_fr500_faddd, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBD, model_fr500_fsubd, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULD, model_fr500_fmuld, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVD, model_fr500_fdivd, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFADDS, model_fr500_cfadds, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSUBS, model_fr500_cfsubs, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMULS, model_fr500_cfmuls, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFDIVS, model_fr500_cfdivs, { { (int) UNIT_FR500_U_FLOAT_DIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NFADDS, model_fr500_nfadds, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSUBS, model_fr500_nfsubs, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMULS, model_fr500_nfmuls, { { (int) UNIT_FR500_U_FLOAT_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDIVS, model_fr500_nfdivs, { { (int) UNIT_FR500_U_FLOAT_DIV, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPS, model_fr500_fcmps, { { (int) UNIT_FR500_U_FLOAT_COMPARE, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPD, model_fr500_fcmpd, { { (int) UNIT_FR500_U_FLOAT_COMPARE, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCMPS, model_fr500_cfcmps, { { (int) UNIT_FR500_U_FLOAT_COMPARE, 1, 1 } } },
|
|
{ FRVBF_INSN_FDCMPS, model_fr500_fdcmps, { { (int) UNIT_FR500_U_FLOAT_DUAL_COMPARE, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDS, model_fr500_fmadds, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBS, model_fr500_fmsubs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDD, model_fr500_fmaddd, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBD, model_fr500_fmsubd, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMADDS, model_fr500_fdmadds, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMADDS, model_fr500_nfdmadds, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMADDS, model_fr500_cfmadds, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSUBS, model_fr500_cfmsubs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMADDS, model_fr500_nfmadds, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSUBS, model_fr500_nfmsubs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAS, model_fr500_fmas, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSS, model_fr500_fmss, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMAS, model_fr500_fdmas, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMSS, model_fr500_fdmss, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMAS, model_fr500_nfdmas, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMSS, model_fr500_nfdmss, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMAS, model_fr500_cfmas, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSS, model_fr500_cfmss, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAD, model_fr500_fmad, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSD, model_fr500_fmsd, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMAS, model_fr500_nfmas, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSS, model_fr500_nfmss, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDADDS, model_fr500_fdadds, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSUBS, model_fr500_fdsubs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULS, model_fr500_fdmuls, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDDIVS, model_fr500_fddivs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSADS, model_fr500_fdsads, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULCS, model_fr500_fdmulcs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULCS, model_fr500_nfdmulcs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDADDS, model_fr500_nfdadds, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSUBS, model_fr500_nfdsubs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULS, model_fr500_nfdmuls, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDDIVS, model_fr500_nfddivs, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSADS, model_fr500_nfdsads, { { (int) UNIT_FR500_U_FLOAT_DUAL_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDCMPS, model_fr500_nfdcmps, { { (int) UNIT_FR500_U_FLOAT_DUAL_COMPARE, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOS, model_fr500_mhsetlos, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIS, model_fr500_mhsethis, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETS, model_fr500_mhdsets, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOH, model_fr500_mhsetloh, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIH, model_fr500_mhsethih, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETH, model_fr500_mhdseth, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MAND, model_fr500_mand, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MOR, model_fr500_mor, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MXOR, model_fr500_mxor, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_CMAND, model_fr500_cmand, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOR, model_fr500_cmor, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_CMXOR, model_fr500_cmxor, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOT, model_fr500_mnot, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_CMNOT, model_fr500_cmnot, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTLI, model_fr500_mrotli, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTRI, model_fr500_mrotri, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MWCUT, model_fr500_mwcut, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MWCUTI, model_fr500_mwcuti, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCUT, model_fr500_mcut, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCUTI, model_fr500_mcuti, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCUTSS, model_fr500_mcutss, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCUTSSI, model_fr500_mcutssi, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MDCUTSSI, model_fr500_mdcutssi, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MAVEH, model_fr500_maveh, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSLLHI, model_fr500_msllhi, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSRLHI, model_fr500_msrlhi, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSRAHI, model_fr500_msrahi, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MDROTLI, model_fr500_mdrotli, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPLHI, model_fr500_mcplhi, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPLI, model_fr500_mcpli, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MSATHS, model_fr500_msaths, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MQSATHS, model_fr500_mqsaths, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MSATHU, model_fr500_msathu, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCMPSH, model_fr500_mcmpsh, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MCMPUH, model_fr500_mcmpuh, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MABSHS, model_fr500_mabshs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MADDHSS, model_fr500_maddhss, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MADDHUS, model_fr500_maddhus, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSUBHSS, model_fr500_msubhss, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MSUBHUS, model_fr500_msubhus, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMADDHSS, model_fr500_cmaddhss, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMADDHUS, model_fr500_cmaddhus, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMSUBHSS, model_fr500_cmsubhss, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_CMSUBHUS, model_fr500_cmsubhus, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
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{ FRVBF_INSN_MQADDHSS, model_fr500_mqaddhss, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
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{ FRVBF_INSN_MQADDHUS, model_fr500_mqaddhus, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
|
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{ FRVBF_INSN_MQSUBHSS, model_fr500_mqsubhss, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
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{ FRVBF_INSN_MQSUBHUS, model_fr500_mqsubhus, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
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{ FRVBF_INSN_CMQADDHSS, model_fr500_cmqaddhss, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
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{ FRVBF_INSN_CMQADDHUS, model_fr500_cmqaddhus, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
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{ FRVBF_INSN_CMQSUBHSS, model_fr500_cmqsubhss, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
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{ FRVBF_INSN_CMQSUBHUS, model_fr500_cmqsubhus, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
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{ FRVBF_INSN_MQLCLRHS, model_fr500_mqlclrhs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQLMTHS, model_fr500_mqlmths, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQSLLHI, model_fr500_mqsllhi, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQSRAHI, model_fr500_mqsrahi, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_MADDACCS, model_fr500_maddaccs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MSUBACCS, model_fr500_msubaccs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MDADDACCS, model_fr500_mdaddaccs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MDSUBACCS, model_fr500_mdsubaccs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MASACCS, model_fr500_masaccs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDASACCS, model_fr500_mdasaccs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_MMULHS, model_fr500_mmulhs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MMULHU, model_fr500_mmulhu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MMULXHS, model_fr500_mmulxhs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MMULXHU, model_fr500_mmulxhu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMULHS, model_fr500_cmmulhs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_CMMULHU, model_fr500_cmmulhu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULHS, model_fr500_mqmulhs, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
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{ FRVBF_INSN_MQMULHU, model_fr500_mqmulhu, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
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{ FRVBF_INSN_MQMULXHS, model_fr500_mqmulxhs, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULXHU, model_fr500_mqmulxhu, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
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|
{ FRVBF_INSN_CMQMULHS, model_fr500_cmqmulhs, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMULHU, model_fr500_cmqmulhu, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_MMACHS, model_fr500_mmachs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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|
{ FRVBF_INSN_MMACHU, model_fr500_mmachu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MMRDHS, model_fr500_mmrdhs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MMRDHU, model_fr500_mmrdhu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMACHS, model_fr500_cmmachs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_CMMACHU, model_fr500_cmmachu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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|
{ FRVBF_INSN_MQMACHS, model_fr500_mqmachs, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
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|
{ FRVBF_INSN_MQMACHU, model_fr500_mqmachu, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHS, model_fr500_cmqmachs, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHU, model_fr500_cmqmachu, { { (int) UNIT_FR500_U_MEDIA_QUAD_MUL, 1, 1 } } },
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{ FRVBF_INSN_MQXMACHS, model_fr500_mqxmachs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_MQXMACXHS, model_fr500_mqxmacxhs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMACXHS, model_fr500_mqmacxhs, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_MCPXRS, model_fr500_mcpxrs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MCPXRU, model_fr500_mcpxru, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MCPXIS, model_fr500_mcpxis, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_MCPXIU, model_fr500_mcpxiu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
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{ FRVBF_INSN_CMCPXRS, model_fr500_cmcpxrs, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXRU, model_fr500_cmcpxru, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIS, model_fr500_cmcpxis, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIU, model_fr500_cmcpxiu, { { (int) UNIT_FR500_U_MEDIA_DUAL_MUL, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRS, model_fr500_mqcpxrs, { { (int) UNIT_FR500_U_MEDIA_QUAD_COMPLEX, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRU, model_fr500_mqcpxru, { { (int) UNIT_FR500_U_MEDIA_QUAD_COMPLEX, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIS, model_fr500_mqcpxis, { { (int) UNIT_FR500_U_MEDIA_QUAD_COMPLEX, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIU, model_fr500_mqcpxiu, { { (int) UNIT_FR500_U_MEDIA_QUAD_COMPLEX, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHW, model_fr500_mexpdhw, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHW, model_fr500_cmexpdhw, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHD, model_fr500_mexpdhd, { { (int) UNIT_FR500_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHD, model_fr500_cmexpdhd, { { (int) UNIT_FR500_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MPACKH, model_fr500_mpackh, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MDPACKH, model_fr500_mdpackh, { { (int) UNIT_FR500_U_MEDIA_QUAD_ARITH, 1, 1 } } },
|
|
{ FRVBF_INSN_MUNPACKH, model_fr500_munpackh, { { (int) UNIT_FR500_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MDUNPACKH, model_fr500_mdunpackh, { { (int) UNIT_FR500_U_MEDIA_DUAL_UNPACK, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOH, model_fr500_mbtoh, { { (int) UNIT_FR500_U_MEDIA_DUAL_BTOH, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOH, model_fr500_cmbtoh, { { (int) UNIT_FR500_U_MEDIA_DUAL_BTOH, 1, 1 } } },
|
|
{ FRVBF_INSN_MHTOB, model_fr500_mhtob, { { (int) UNIT_FR500_U_MEDIA_DUAL_HTOB, 1, 1 } } },
|
|
{ FRVBF_INSN_CMHTOB, model_fr500_cmhtob, { { (int) UNIT_FR500_U_MEDIA_DUAL_HTOB, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOHE, model_fr500_mbtohe, { { (int) UNIT_FR500_U_MEDIA_DUAL_BTOHE, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOHE, model_fr500_cmbtohe, { { (int) UNIT_FR500_U_MEDIA_DUAL_BTOHE, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOP, model_fr500_mnop, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_0, model_fr500_mclracc_0, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_1, model_fr500_mclracc_1, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACC, model_fr500_mrdacc, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACCG, model_fr500_mrdaccg, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACC, model_fr500_mwtacc, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACCG, model_fr500_mwtaccg, { { (int) UNIT_FR500_U_MEDIA, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP1, model_fr500_mcop1, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP2, model_fr500_mcop2, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNOP, model_fr500_fnop, { { (int) UNIT_FR500_U_EXEC, 1, 1 } } },
|
|
};
|
|
|
|
/* Model timing data for `tomcat'. */
|
|
|
|
static const INSN_TIMING tomcat_timing[] = {
|
|
{ FRVBF_INSN_X_INVALID, 0, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_AFTER, 0, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_BEFORE, 0, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_CHAIN, 0, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_BEGIN, 0, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADD, model_tomcat_add, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUB, model_tomcat_sub, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_AND, model_tomcat_and, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_OR, model_tomcat_or, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XOR, model_tomcat_xor, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOT, model_tomcat_not, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIV, model_tomcat_sdiv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIV, model_tomcat_nsdiv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIV, model_tomcat_udiv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIV, model_tomcat_nudiv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMUL, model_tomcat_smul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMUL, model_tomcat_umul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMU, model_tomcat_smu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMASS, model_tomcat_smass, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMSSS, model_tomcat_smsss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLL, model_tomcat_sll, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRL, model_tomcat_srl, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRA, model_tomcat_sra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLASS, model_tomcat_slass, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCUTSS, model_tomcat_scutss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCAN, model_tomcat_scan, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CADD, model_tomcat_cadd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUB, model_tomcat_csub, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CAND, model_tomcat_cand, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COR, model_tomcat_cor, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CXOR, model_tomcat_cxor, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CNOT, model_tomcat_cnot, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMUL, model_tomcat_csmul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSDIV, model_tomcat_csdiv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CUDIV, model_tomcat_cudiv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLL, model_tomcat_csll, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRL, model_tomcat_csrl, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRA, model_tomcat_csra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSCAN, model_tomcat_cscan, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDCC, model_tomcat_addcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBCC, model_tomcat_subcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCC, model_tomcat_andcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCC, model_tomcat_orcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCC, model_tomcat_xorcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLCC, model_tomcat_sllcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLCC, model_tomcat_srlcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRACC, model_tomcat_sracc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULCC, model_tomcat_smulcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULCC, model_tomcat_umulcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CADDCC, model_tomcat_caddcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUBCC, model_tomcat_csubcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMULCC, model_tomcat_csmulcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CANDCC, model_tomcat_candcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CORCC, model_tomcat_corcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CXORCC, model_tomcat_cxorcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLLCC, model_tomcat_csllcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRLCC, model_tomcat_csrlcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRACC, model_tomcat_csracc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDX, model_tomcat_addx, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBX, model_tomcat_subx, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXCC, model_tomcat_addxcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXCC, model_tomcat_subxcc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDSS, model_tomcat_addss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBSS, model_tomcat_subss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDI, model_tomcat_addi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBI, model_tomcat_subi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDI, model_tomcat_andi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORI, model_tomcat_ori, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORI, model_tomcat_xori, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIVI, model_tomcat_sdivi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIVI, model_tomcat_nsdivi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIVI, model_tomcat_udivi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIVI, model_tomcat_nudivi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULI, model_tomcat_smuli, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULI, model_tomcat_umuli, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLI, model_tomcat_slli, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLI, model_tomcat_srli, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAI, model_tomcat_srai, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCANI, model_tomcat_scani, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDICC, model_tomcat_addicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBICC, model_tomcat_subicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDICC, model_tomcat_andicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORICC, model_tomcat_oricc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORICC, model_tomcat_xoricc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULICC, model_tomcat_smulicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULICC, model_tomcat_umulicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLICC, model_tomcat_sllicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLICC, model_tomcat_srlicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAICC, model_tomcat_sraicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXI, model_tomcat_addxi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXI, model_tomcat_subxi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXICC, model_tomcat_addxicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXICC, model_tomcat_subxicc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPB, model_tomcat_cmpb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPBA, model_tomcat_cmpba, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLO, model_tomcat_setlo, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETHI, model_tomcat_sethi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLOS, model_tomcat_setlos, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSB, model_tomcat_ldsb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUB, model_tomcat_ldub, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSH, model_tomcat_ldsh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUH, model_tomcat_lduh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LD, model_tomcat_ld, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBF, model_tomcat_ldbf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHF, model_tomcat_ldhf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDF, model_tomcat_ldf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDC, model_tomcat_ldc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSB, model_tomcat_nldsb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUB, model_tomcat_nldub, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSH, model_tomcat_nldsh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUH, model_tomcat_nlduh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLD, model_tomcat_nld, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBF, model_tomcat_nldbf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHF, model_tomcat_nldhf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDF, model_tomcat_nldf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDD, model_tomcat_ldd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDF, model_tomcat_lddf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDC, model_tomcat_lddc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDD, model_tomcat_nldd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDF, model_tomcat_nlddf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQ, model_tomcat_ldq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQF, model_tomcat_ldqf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQC, model_tomcat_ldqc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQ, model_tomcat_nldq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQF, model_tomcat_nldqf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSBU, model_tomcat_ldsbu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUBU, model_tomcat_ldubu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSHU, model_tomcat_ldshu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUHU, model_tomcat_lduhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDU, model_tomcat_ldu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSBU, model_tomcat_nldsbu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUBU, model_tomcat_nldubu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSHU, model_tomcat_nldshu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUHU, model_tomcat_nlduhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDU, model_tomcat_nldu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBFU, model_tomcat_ldbfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHFU, model_tomcat_ldhfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDFU, model_tomcat_ldfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDCU, model_tomcat_ldcu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBFU, model_tomcat_nldbfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHFU, model_tomcat_nldhfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDFU, model_tomcat_nldfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDU, model_tomcat_lddu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDU, model_tomcat_nlddu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDFU, model_tomcat_lddfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDCU, model_tomcat_lddcu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDFU, model_tomcat_nlddfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQU, model_tomcat_ldqu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQU, model_tomcat_nldqu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQFU, model_tomcat_ldqfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQCU, model_tomcat_ldqcu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQFU, model_tomcat_nldqfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSBI, model_tomcat_ldsbi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSHI, model_tomcat_ldshi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDI, model_tomcat_ldi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUBI, model_tomcat_ldubi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUHI, model_tomcat_lduhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBFI, model_tomcat_ldbfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHFI, model_tomcat_ldhfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDFI, model_tomcat_ldfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSBI, model_tomcat_nldsbi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUBI, model_tomcat_nldubi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSHI, model_tomcat_nldshi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUHI, model_tomcat_nlduhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDI, model_tomcat_nldi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBFI, model_tomcat_nldbfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHFI, model_tomcat_nldhfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDFI, model_tomcat_nldfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDI, model_tomcat_lddi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDFI, model_tomcat_lddfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDI, model_tomcat_nlddi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDFI, model_tomcat_nlddfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQI, model_tomcat_ldqi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQFI, model_tomcat_ldqfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQFI, model_tomcat_nldqfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STB, model_tomcat_stb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STH, model_tomcat_sth, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ST, model_tomcat_st, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBF, model_tomcat_stbf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHF, model_tomcat_sthf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STF, model_tomcat_stf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STC, model_tomcat_stc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STD, model_tomcat_std, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDF, model_tomcat_stdf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDC, model_tomcat_stdc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQ, model_tomcat_stq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQF, model_tomcat_stqf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQC, model_tomcat_stqc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBU, model_tomcat_stbu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHU, model_tomcat_sthu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STU, model_tomcat_stu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBFU, model_tomcat_stbfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHFU, model_tomcat_sthfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STFU, model_tomcat_stfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STCU, model_tomcat_stcu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDU, model_tomcat_stdu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDFU, model_tomcat_stdfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDCU, model_tomcat_stdcu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQU, model_tomcat_stqu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQFU, model_tomcat_stqfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQCU, model_tomcat_stqcu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSB, model_tomcat_cldsb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUB, model_tomcat_cldub, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSH, model_tomcat_cldsh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUH, model_tomcat_clduh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLD, model_tomcat_cld, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDBF, model_tomcat_cldbf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHF, model_tomcat_cldhf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDF, model_tomcat_cldf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDD, model_tomcat_cldd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDF, model_tomcat_clddf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQ, model_tomcat_cldq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSBU, model_tomcat_cldsbu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUBU, model_tomcat_cldubu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSHU, model_tomcat_cldshu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUHU, model_tomcat_clduhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDU, model_tomcat_cldu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDBFU, model_tomcat_cldbfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHFU, model_tomcat_cldhfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDFU, model_tomcat_cldfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDU, model_tomcat_clddu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDFU, model_tomcat_clddfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQU, model_tomcat_cldqu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTB, model_tomcat_cstb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTH, model_tomcat_csth, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CST, model_tomcat_cst, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBF, model_tomcat_cstbf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHF, model_tomcat_csthf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTF, model_tomcat_cstf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTD, model_tomcat_cstd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDF, model_tomcat_cstdf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTQ, model_tomcat_cstq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBU, model_tomcat_cstbu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHU, model_tomcat_csthu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTU, model_tomcat_cstu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBFU, model_tomcat_cstbfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHFU, model_tomcat_csthfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTFU, model_tomcat_cstfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDU, model_tomcat_cstdu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDFU, model_tomcat_cstdfu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBI, model_tomcat_stbi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHI, model_tomcat_sthi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STI, model_tomcat_sti, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBFI, model_tomcat_stbfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHFI, model_tomcat_sthfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STFI, model_tomcat_stfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDI, model_tomcat_stdi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDFI, model_tomcat_stdfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQI, model_tomcat_stqi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQFI, model_tomcat_stqfi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAP, model_tomcat_swap, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAPI, model_tomcat_swapi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSWAP, model_tomcat_cswap, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGF, model_tomcat_movgf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFG, model_tomcat_movfg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFD, model_tomcat_movgfd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGD, model_tomcat_movfgd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFQ, model_tomcat_movgfq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGQ, model_tomcat_movfgq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGF, model_tomcat_cmovgf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFG, model_tomcat_cmovfg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGFD, model_tomcat_cmovgfd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFGD, model_tomcat_cmovfgd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGS, model_tomcat_movgs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVSG, model_tomcat_movsg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BRA, model_tomcat_bra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNO, model_tomcat_bno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQ, model_tomcat_beq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNE, model_tomcat_bne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLE, model_tomcat_ble, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGT, model_tomcat_bgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLT, model_tomcat_blt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGE, model_tomcat_bge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLS, model_tomcat_bls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BHI, model_tomcat_bhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BC, model_tomcat_bc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNC, model_tomcat_bnc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BN, model_tomcat_bn, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BP, model_tomcat_bp, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BV, model_tomcat_bv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNV, model_tomcat_bnv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRA, model_tomcat_fbra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNO, model_tomcat_fbno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNE, model_tomcat_fbne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQ, model_tomcat_fbeq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLG, model_tomcat_fblg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUE, model_tomcat_fbue, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUL, model_tomcat_fbul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGE, model_tomcat_fbge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLT, model_tomcat_fblt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGE, model_tomcat_fbuge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUG, model_tomcat_fbug, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLE, model_tomcat_fble, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGT, model_tomcat_fbgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULE, model_tomcat_fbule, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBU, model_tomcat_fbu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBO, model_tomcat_fbo, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCTRLR, model_tomcat_bctrlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BRALR, model_tomcat_bralr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNOLR, model_tomcat_bnolr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQLR, model_tomcat_beqlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNELR, model_tomcat_bnelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLELR, model_tomcat_blelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGTLR, model_tomcat_bgtlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLTLR, model_tomcat_bltlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGELR, model_tomcat_bgelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLSLR, model_tomcat_blslr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BHILR, model_tomcat_bhilr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLR, model_tomcat_bclr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNCLR, model_tomcat_bnclr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNLR, model_tomcat_bnlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BPLR, model_tomcat_bplr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BVLR, model_tomcat_bvlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNVLR, model_tomcat_bnvlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRALR, model_tomcat_fbralr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNOLR, model_tomcat_fbnolr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQLR, model_tomcat_fbeqlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNELR, model_tomcat_fbnelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLGLR, model_tomcat_fblglr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUELR, model_tomcat_fbuelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULLR, model_tomcat_fbullr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGELR, model_tomcat_fbgelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLTLR, model_tomcat_fbltlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGELR, model_tomcat_fbugelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGLR, model_tomcat_fbuglr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLELR, model_tomcat_fblelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGTLR, model_tomcat_fbgtlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULELR, model_tomcat_fbulelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULR, model_tomcat_fbulr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBOLR, model_tomcat_fbolr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCRALR, model_tomcat_bcralr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNOLR, model_tomcat_bcnolr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCEQLR, model_tomcat_bceqlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNELR, model_tomcat_bcnelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLELR, model_tomcat_bclelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGTLR, model_tomcat_bcgtlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLTLR, model_tomcat_bcltlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGELR, model_tomcat_bcgelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLSLR, model_tomcat_bclslr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCHILR, model_tomcat_bchilr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCCLR, model_tomcat_bcclr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNCLR, model_tomcat_bcnclr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNLR, model_tomcat_bcnlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCPLR, model_tomcat_bcplr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCVLR, model_tomcat_bcvlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNVLR, model_tomcat_bcnvlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBRALR, model_tomcat_fcbralr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNOLR, model_tomcat_fcbnolr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBEQLR, model_tomcat_fcbeqlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNELR, model_tomcat_fcbnelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLGLR, model_tomcat_fcblglr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUELR, model_tomcat_fcbuelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULLR, model_tomcat_fcbullr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGELR, model_tomcat_fcbgelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLTLR, model_tomcat_fcbltlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGELR, model_tomcat_fcbugelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGLR, model_tomcat_fcbuglr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLELR, model_tomcat_fcblelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGTLR, model_tomcat_fcbgtlr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULELR, model_tomcat_fcbulelr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULR, model_tomcat_fcbulr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBOLR, model_tomcat_fcbolr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPL, model_tomcat_jmpl, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLL, model_tomcat_calll, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPIL, model_tomcat_jmpil, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLIL, model_tomcat_callil, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALL, model_tomcat_call, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_RETT, model_tomcat_rett, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_REI, model_tomcat_rei, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TRA, model_tomcat_tra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNO, model_tomcat_tno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TEQ, model_tomcat_teq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNE, model_tomcat_tne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLE, model_tomcat_tle, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TGT, model_tomcat_tgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLT, model_tomcat_tlt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TGE, model_tomcat_tge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLS, model_tomcat_tls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_THI, model_tomcat_thi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TC, model_tomcat_tc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNC, model_tomcat_tnc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TN, model_tomcat_tn, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TP, model_tomcat_tp, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TV, model_tomcat_tv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNV, model_tomcat_tnv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTRA, model_tomcat_ftra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNO, model_tomcat_ftno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNE, model_tomcat_ftne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTEQ, model_tomcat_fteq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLG, model_tomcat_ftlg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUE, model_tomcat_ftue, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUL, model_tomcat_ftul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGE, model_tomcat_ftge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLT, model_tomcat_ftlt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUGE, model_tomcat_ftuge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUG, model_tomcat_ftug, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLE, model_tomcat_ftle, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGT, model_tomcat_ftgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTULE, model_tomcat_ftule, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTU, model_tomcat_ftu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTO, model_tomcat_fto, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIRA, model_tomcat_tira, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINO, model_tomcat_tino, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIEQ, model_tomcat_tieq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINE, model_tomcat_tine, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILE, model_tomcat_tile, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGT, model_tomcat_tigt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILT, model_tomcat_tilt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGE, model_tomcat_tige, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILS, model_tomcat_tils, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIHI, model_tomcat_tihi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIC, model_tomcat_tic, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINC, model_tomcat_tinc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIN, model_tomcat_tin, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIP, model_tomcat_tip, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIV, model_tomcat_tiv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINV, model_tomcat_tinv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIRA, model_tomcat_ftira, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINO, model_tomcat_ftino, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINE, model_tomcat_ftine, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIEQ, model_tomcat_ftieq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILG, model_tomcat_ftilg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUE, model_tomcat_ftiue, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUL, model_tomcat_ftiul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGE, model_tomcat_ftige, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILT, model_tomcat_ftilt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUGE, model_tomcat_ftiuge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUG, model_tomcat_ftiug, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILE, model_tomcat_ftile, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGT, model_tomcat_ftigt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIULE, model_tomcat_ftiule, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIU, model_tomcat_ftiu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIO, model_tomcat_ftio, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BREAK, model_tomcat_break, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MTRAP, model_tomcat_mtrap, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCR, model_tomcat_andcr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCR, model_tomcat_orcr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCR, model_tomcat_xorcr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDCR, model_tomcat_nandcr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORCR, model_tomcat_norcr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDNCR, model_tomcat_andncr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORNCR, model_tomcat_orncr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDNCR, model_tomcat_nandncr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORNCR, model_tomcat_norncr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOTCR, model_tomcat_notcr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKRA, model_tomcat_ckra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNO, model_tomcat_ckno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKEQ, model_tomcat_ckeq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNE, model_tomcat_ckne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLE, model_tomcat_ckle, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGT, model_tomcat_ckgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLT, model_tomcat_cklt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGE, model_tomcat_ckge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLS, model_tomcat_ckls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKHI, model_tomcat_ckhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKC, model_tomcat_ckc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNC, model_tomcat_cknc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKN, model_tomcat_ckn, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKP, model_tomcat_ckp, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKV, model_tomcat_ckv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNV, model_tomcat_cknv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKRA, model_tomcat_fckra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNO, model_tomcat_fckno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNE, model_tomcat_fckne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKEQ, model_tomcat_fckeq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLG, model_tomcat_fcklg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUE, model_tomcat_fckue, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUL, model_tomcat_fckul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGE, model_tomcat_fckge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLT, model_tomcat_fcklt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUGE, model_tomcat_fckuge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUG, model_tomcat_fckug, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLE, model_tomcat_fckle, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGT, model_tomcat_fckgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKULE, model_tomcat_fckule, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKU, model_tomcat_fcku, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKO, model_tomcat_fcko, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKRA, model_tomcat_cckra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNO, model_tomcat_cckno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKEQ, model_tomcat_cckeq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNE, model_tomcat_cckne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLE, model_tomcat_cckle, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGT, model_tomcat_cckgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLT, model_tomcat_ccklt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGE, model_tomcat_cckge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLS, model_tomcat_cckls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKHI, model_tomcat_cckhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKC, model_tomcat_cckc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNC, model_tomcat_ccknc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKN, model_tomcat_cckn, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKP, model_tomcat_cckp, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKV, model_tomcat_cckv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNV, model_tomcat_ccknv, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKRA, model_tomcat_cfckra, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNO, model_tomcat_cfckno, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNE, model_tomcat_cfckne, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKEQ, model_tomcat_cfckeq, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLG, model_tomcat_cfcklg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUE, model_tomcat_cfckue, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUL, model_tomcat_cfckul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGE, model_tomcat_cfckge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLT, model_tomcat_cfcklt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUGE, model_tomcat_cfckuge, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUG, model_tomcat_cfckug, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLE, model_tomcat_cfckle, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGT, model_tomcat_cfckgt, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKULE, model_tomcat_cfckule, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKU, model_tomcat_cfcku, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKO, model_tomcat_cfcko, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CJMPL, model_tomcat_cjmpl, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCALLL, model_tomcat_ccalll, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICI, model_tomcat_ici, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCI, model_tomcat_dci, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICEI, model_tomcat_icei, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEI, model_tomcat_dcei, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCF, model_tomcat_dcf, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEF, model_tomcat_dcef, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WITLB, model_tomcat_witlb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WDTLB, model_tomcat_wdtlb, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ITLBI, model_tomcat_itlbi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DTLBI, model_tomcat_dtlbi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICPL, model_tomcat_icpl, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCPL, model_tomcat_dcpl, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICUL, model_tomcat_icul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCUL, model_tomcat_dcul, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BAR, model_tomcat_bar, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MEMBAR, model_tomcat_membar, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAI, model_tomcat_lrai, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAD, model_tomcat_lrad, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLBPR, model_tomcat_tlbpr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP1, model_tomcat_cop1, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP2, model_tomcat_cop2, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGR, model_tomcat_clrgr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFR, model_tomcat_clrfr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGA, model_tomcat_clrga, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFA, model_tomcat_clrfa, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGR, model_tomcat_commitgr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFR, model_tomcat_commitfr, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGA, model_tomcat_commitga, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFA, model_tomcat_commitfa, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOS, model_tomcat_fitos, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSTOI, model_tomcat_fstoi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOD, model_tomcat_fitod, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDTOI, model_tomcat_fdtoi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDITOS, model_tomcat_fditos, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSTOI, model_tomcat_fdstoi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDITOS, model_tomcat_nfditos, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSTOI, model_tomcat_nfdstoi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFITOS, model_tomcat_cfitos, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSTOI, model_tomcat_cfstoi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFITOS, model_tomcat_nfitos, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSTOI, model_tomcat_nfstoi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVS, model_tomcat_fmovs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVD, model_tomcat_fmovd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMOVS, model_tomcat_fdmovs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMOVS, model_tomcat_cfmovs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGS, model_tomcat_fnegs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGD, model_tomcat_fnegd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDNEGS, model_tomcat_fdnegs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFNEGS, model_tomcat_cfnegs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSS, model_tomcat_fabss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSD, model_tomcat_fabsd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDABSS, model_tomcat_fdabss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFABSS, model_tomcat_cfabss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTS, model_tomcat_fsqrts, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSQRTS, model_tomcat_fdsqrts, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSQRTS, model_tomcat_nfdsqrts, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTD, model_tomcat_fsqrtd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSQRTS, model_tomcat_cfsqrts, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSQRTS, model_tomcat_nfsqrts, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDS, model_tomcat_fadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBS, model_tomcat_fsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULS, model_tomcat_fmuls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVS, model_tomcat_fdivs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDD, model_tomcat_faddd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBD, model_tomcat_fsubd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULD, model_tomcat_fmuld, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVD, model_tomcat_fdivd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFADDS, model_tomcat_cfadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSUBS, model_tomcat_cfsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMULS, model_tomcat_cfmuls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFDIVS, model_tomcat_cfdivs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFADDS, model_tomcat_nfadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSUBS, model_tomcat_nfsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMULS, model_tomcat_nfmuls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDIVS, model_tomcat_nfdivs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPS, model_tomcat_fcmps, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPD, model_tomcat_fcmpd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCMPS, model_tomcat_cfcmps, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDCMPS, model_tomcat_fdcmps, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDS, model_tomcat_fmadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBS, model_tomcat_fmsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDD, model_tomcat_fmaddd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBD, model_tomcat_fmsubd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMADDS, model_tomcat_fdmadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMADDS, model_tomcat_nfdmadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMADDS, model_tomcat_cfmadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSUBS, model_tomcat_cfmsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMADDS, model_tomcat_nfmadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSUBS, model_tomcat_nfmsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAS, model_tomcat_fmas, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSS, model_tomcat_fmss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMAS, model_tomcat_fdmas, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMSS, model_tomcat_fdmss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMAS, model_tomcat_nfdmas, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMSS, model_tomcat_nfdmss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMAS, model_tomcat_cfmas, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSS, model_tomcat_cfmss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAD, model_tomcat_fmad, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSD, model_tomcat_fmsd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMAS, model_tomcat_nfmas, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSS, model_tomcat_nfmss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDADDS, model_tomcat_fdadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSUBS, model_tomcat_fdsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULS, model_tomcat_fdmuls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDDIVS, model_tomcat_fddivs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSADS, model_tomcat_fdsads, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULCS, model_tomcat_fdmulcs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULCS, model_tomcat_nfdmulcs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDADDS, model_tomcat_nfdadds, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSUBS, model_tomcat_nfdsubs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULS, model_tomcat_nfdmuls, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDDIVS, model_tomcat_nfddivs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSADS, model_tomcat_nfdsads, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDCMPS, model_tomcat_nfdcmps, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOS, model_tomcat_mhsetlos, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIS, model_tomcat_mhsethis, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETS, model_tomcat_mhdsets, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOH, model_tomcat_mhsetloh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIH, model_tomcat_mhsethih, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETH, model_tomcat_mhdseth, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MAND, model_tomcat_mand, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOR, model_tomcat_mor, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MXOR, model_tomcat_mxor, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMAND, model_tomcat_cmand, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOR, model_tomcat_cmor, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMXOR, model_tomcat_cmxor, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOT, model_tomcat_mnot, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMNOT, model_tomcat_cmnot, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTLI, model_tomcat_mrotli, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTRI, model_tomcat_mrotri, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUT, model_tomcat_mwcut, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUTI, model_tomcat_mwcuti, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUT, model_tomcat_mcut, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTI, model_tomcat_mcuti, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSS, model_tomcat_mcutss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSSI, model_tomcat_mcutssi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDCUTSSI, model_tomcat_mdcutssi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MAVEH, model_tomcat_maveh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSLLHI, model_tomcat_msllhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRLHI, model_tomcat_msrlhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRAHI, model_tomcat_msrahi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDROTLI, model_tomcat_mdrotli, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLHI, model_tomcat_mcplhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLI, model_tomcat_mcpli, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHS, model_tomcat_msaths, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSATHS, model_tomcat_mqsaths, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHU, model_tomcat_msathu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPSH, model_tomcat_mcmpsh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPUH, model_tomcat_mcmpuh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MABSHS, model_tomcat_mabshs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHSS, model_tomcat_maddhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHUS, model_tomcat_maddhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHSS, model_tomcat_msubhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHUS, model_tomcat_msubhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHSS, model_tomcat_cmaddhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHUS, model_tomcat_cmaddhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHSS, model_tomcat_cmsubhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHUS, model_tomcat_cmsubhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHSS, model_tomcat_mqaddhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHUS, model_tomcat_mqaddhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHSS, model_tomcat_mqsubhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHUS, model_tomcat_mqsubhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHSS, model_tomcat_cmqaddhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHUS, model_tomcat_cmqaddhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHSS, model_tomcat_cmqsubhss, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHUS, model_tomcat_cmqsubhus, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLCLRHS, model_tomcat_mqlclrhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLMTHS, model_tomcat_mqlmths, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSLLHI, model_tomcat_mqsllhi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSRAHI, model_tomcat_mqsrahi, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDACCS, model_tomcat_maddaccs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBACCS, model_tomcat_msubaccs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDADDACCS, model_tomcat_mdaddaccs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDSUBACCS, model_tomcat_mdsubaccs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MASACCS, model_tomcat_masaccs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDASACCS, model_tomcat_mdasaccs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHS, model_tomcat_mmulhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHU, model_tomcat_mmulhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MMULXHS, model_tomcat_mmulxhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MMULXHU, model_tomcat_mmulxhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMMULHS, model_tomcat_cmmulhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMMULHU, model_tomcat_cmmulhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_MQMULHS, model_tomcat_mqmulhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMULHU, model_tomcat_mqmulhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMULXHS, model_tomcat_mqmulxhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMULXHU, model_tomcat_mqmulxhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMQMULHS, model_tomcat_cmqmulhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMQMULHU, model_tomcat_cmqmulhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MMACHS, model_tomcat_mmachs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MMACHU, model_tomcat_mmachu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MMRDHS, model_tomcat_mmrdhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MMRDHU, model_tomcat_mmrdhu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMMACHS, model_tomcat_cmmachs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMMACHU, model_tomcat_cmmachu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMACHS, model_tomcat_mqmachs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMACHU, model_tomcat_mqmachu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHS, model_tomcat_cmqmachs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHU, model_tomcat_cmqmachu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQXMACHS, model_tomcat_mqxmachs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQXMACXHS, model_tomcat_mqxmacxhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQMACXHS, model_tomcat_mqmacxhs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXRS, model_tomcat_mcpxrs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXRU, model_tomcat_mcpxru, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXIS, model_tomcat_mcpxis, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCPXIU, model_tomcat_mcpxiu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXRS, model_tomcat_cmcpxrs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXRU, model_tomcat_cmcpxru, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXIS, model_tomcat_cmcpxis, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMCPXIU, model_tomcat_cmcpxiu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXRS, model_tomcat_mqcpxrs, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXRU, model_tomcat_mqcpxru, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXIS, model_tomcat_mqcpxis, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MQCPXIU, model_tomcat_mqcpxiu, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MEXPDHW, model_tomcat_mexpdhw, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMEXPDHW, model_tomcat_cmexpdhw, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MEXPDHD, model_tomcat_mexpdhd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMEXPDHD, model_tomcat_cmexpdhd, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MPACKH, model_tomcat_mpackh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MDPACKH, model_tomcat_mdpackh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MUNPACKH, model_tomcat_munpackh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MDUNPACKH, model_tomcat_mdunpackh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MBTOH, model_tomcat_mbtoh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMBTOH, model_tomcat_cmbtoh, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MHTOB, model_tomcat_mhtob, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMHTOB, model_tomcat_cmhtob, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MBTOHE, model_tomcat_mbtohe, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMBTOHE, model_tomcat_cmbtohe, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MNOP, model_tomcat_mnop, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_MCLRACC_0, model_tomcat_mclracc_0, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCLRACC_1, model_tomcat_mclracc_1, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MRDACC, model_tomcat_mrdacc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MRDACCG, model_tomcat_mrdaccg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_MWTACC, model_tomcat_mwtacc, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MWTACCG, model_tomcat_mwtaccg, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCOP1, model_tomcat_mcop1, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCOP2, model_tomcat_mcop2, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNOP, model_tomcat_fnop, { { (int) UNIT_TOMCAT_U_EXEC, 1, 1 } } },
|
|
};
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/* Model timing data for `fr400'. */
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static const INSN_TIMING fr400_timing[] = {
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{ FRVBF_INSN_X_INVALID, 0, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_AFTER, 0, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEFORE, 0, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CHAIN, 0, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEGIN, 0, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_ADD, model_fr400_add, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUB, model_fr400_sub, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_AND, model_fr400_and, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_OR, model_fr400_or, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_XOR, model_fr400_xor, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_NOT, model_fr400_not, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SDIV, model_fr400_sdiv, { { (int) UNIT_FR400_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NSDIV, model_fr400_nsdiv, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_UDIV, model_fr400_udiv, { { (int) UNIT_FR400_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NUDIV, model_fr400_nudiv, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SMUL, model_fr400_smul, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_UMUL, model_fr400_umul, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_SMU, model_fr400_smu, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SMASS, model_fr400_smass, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SMSSS, model_fr400_smsss, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLL, model_fr400_sll, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRL, model_fr400_srl, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRA, model_fr400_sra, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLASS, model_fr400_slass, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCUTSS, model_fr400_scutss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCAN, model_fr400_scan, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CADD, model_fr400_cadd, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSUB, model_fr400_csub, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CAND, model_fr400_cand, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_COR, model_fr400_cor, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_CXOR, model_fr400_cxor, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_CNOT, model_fr400_cnot, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_CSMUL, model_fr400_csmul, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
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{ FRVBF_INSN_CSDIV, model_fr400_csdiv, { { (int) UNIT_FR400_U_IDIV, 1, 1 } } },
|
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{ FRVBF_INSN_CUDIV, model_fr400_cudiv, { { (int) UNIT_FR400_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLL, model_fr400_csll, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRL, model_fr400_csrl, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRA, model_fr400_csra, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSCAN, model_fr400_cscan, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDCC, model_fr400_addcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBCC, model_fr400_subcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCC, model_fr400_andcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCC, model_fr400_orcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCC, model_fr400_xorcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLCC, model_fr400_sllcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLCC, model_fr400_srlcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRACC, model_fr400_sracc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULCC, model_fr400_smulcc, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULCC, model_fr400_umulcc, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CADDCC, model_fr400_caddcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUBCC, model_fr400_csubcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMULCC, model_fr400_csmulcc, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CANDCC, model_fr400_candcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CORCC, model_fr400_corcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CXORCC, model_fr400_cxorcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLLCC, model_fr400_csllcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRLCC, model_fr400_csrlcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRACC, model_fr400_csracc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDX, model_fr400_addx, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBX, model_fr400_subx, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXCC, model_fr400_addxcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXCC, model_fr400_subxcc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDSS, model_fr400_addss, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBSS, model_fr400_subss, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDI, model_fr400_addi, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBI, model_fr400_subi, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDI, model_fr400_andi, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORI, model_fr400_ori, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORI, model_fr400_xori, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIVI, model_fr400_sdivi, { { (int) UNIT_FR400_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIVI, model_fr400_nsdivi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIVI, model_fr400_udivi, { { (int) UNIT_FR400_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIVI, model_fr400_nudivi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULI, model_fr400_smuli, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULI, model_fr400_umuli, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLI, model_fr400_slli, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLI, model_fr400_srli, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAI, model_fr400_srai, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SCANI, model_fr400_scani, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDICC, model_fr400_addicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBICC, model_fr400_subicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDICC, model_fr400_andicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORICC, model_fr400_oricc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORICC, model_fr400_xoricc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULICC, model_fr400_smulicc, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULICC, model_fr400_umulicc, { { (int) UNIT_FR400_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLICC, model_fr400_sllicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLICC, model_fr400_srlicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAICC, model_fr400_sraicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXI, model_fr400_addxi, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXI, model_fr400_subxi, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXICC, model_fr400_addxicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXICC, model_fr400_subxicc, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPB, model_fr400_cmpb, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPBA, model_fr400_cmpba, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLO, model_fr400_setlo, { { (int) UNIT_FR400_U_SET_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_SETHI, model_fr400_sethi, { { (int) UNIT_FR400_U_SET_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLOS, model_fr400_setlos, { { (int) UNIT_FR400_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSB, model_fr400_ldsb, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUB, model_fr400_ldub, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSH, model_fr400_ldsh, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUH, model_fr400_lduh, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LD, model_fr400_ld, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBF, model_fr400_ldbf, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHF, model_fr400_ldhf, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDF, model_fr400_ldf, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDC, model_fr400_ldc, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDSB, model_fr400_nldsb, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUB, model_fr400_nldub, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDSH, model_fr400_nldsh, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUH, model_fr400_nlduh, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLD, model_fr400_nld, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDBF, model_fr400_nldbf, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDHF, model_fr400_nldhf, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDF, model_fr400_nldf, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDD, model_fr400_ldd, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDF, model_fr400_lddf, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDC, model_fr400_lddc, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDD, model_fr400_nldd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDDF, model_fr400_nlddf, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQ, model_fr400_ldq, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQF, model_fr400_ldqf, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQC, model_fr400_ldqc, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQ, model_fr400_nldq, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQF, model_fr400_nldqf, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDSBU, model_fr400_ldsbu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUBU, model_fr400_ldubu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSHU, model_fr400_ldshu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUHU, model_fr400_lduhu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDU, model_fr400_ldu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSBU, model_fr400_nldsbu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUBU, model_fr400_nldubu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDSHU, model_fr400_nldshu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUHU, model_fr400_nlduhu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDU, model_fr400_nldu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDBFU, model_fr400_ldbfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHFU, model_fr400_ldhfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDFU, model_fr400_ldfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDCU, model_fr400_ldcu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDBFU, model_fr400_nldbfu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDHFU, model_fr400_nldhfu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDFU, model_fr400_nldfu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDDU, model_fr400_lddu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDU, model_fr400_nlddu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDDFU, model_fr400_lddfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDCU, model_fr400_lddcu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDDFU, model_fr400_nlddfu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQU, model_fr400_ldqu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQU, model_fr400_nldqu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQFU, model_fr400_ldqfu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQCU, model_fr400_ldqcu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQFU, model_fr400_nldqfu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDSBI, model_fr400_ldsbi, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSHI, model_fr400_ldshi, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDI, model_fr400_ldi, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUBI, model_fr400_ldubi, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUHI, model_fr400_lduhi, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBFI, model_fr400_ldbfi, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHFI, model_fr400_ldhfi, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDFI, model_fr400_ldfi, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSBI, model_fr400_nldsbi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUBI, model_fr400_nldubi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDSHI, model_fr400_nldshi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUHI, model_fr400_nlduhi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDI, model_fr400_nldi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDBFI, model_fr400_nldbfi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDHFI, model_fr400_nldhfi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDFI, model_fr400_nldfi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDDI, model_fr400_lddi, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDFI, model_fr400_lddfi, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDI, model_fr400_nlddi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDDFI, model_fr400_nlddfi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQI, model_fr400_ldqi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQFI, model_fr400_ldqfi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQFI, model_fr400_nldqfi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STB, model_fr400_stb, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STH, model_fr400_sth, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_ST, model_fr400_st, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBF, model_fr400_stbf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHF, model_fr400_sthf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STF, model_fr400_stf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STC, model_fr400_stc, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STD, model_fr400_std, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDF, model_fr400_stdf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDC, model_fr400_stdc, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQ, model_fr400_stq, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQF, model_fr400_stqf, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQC, model_fr400_stqc, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STBU, model_fr400_stbu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHU, model_fr400_sthu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STU, model_fr400_stu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBFU, model_fr400_stbfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHFU, model_fr400_sthfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STFU, model_fr400_stfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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|
{ FRVBF_INSN_STCU, model_fr400_stcu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STDU, model_fr400_stdu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
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|
{ FRVBF_INSN_STDFU, model_fr400_stdfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
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|
{ FRVBF_INSN_STDCU, model_fr400_stdcu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_STQU, model_fr400_stqu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQFU, model_fr400_stqfu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_STQCU, model_fr400_stqcu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_CLDSB, model_fr400_cldsb, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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|
{ FRVBF_INSN_CLDUB, model_fr400_cldub, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSH, model_fr400_cldsh, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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|
{ FRVBF_INSN_CLDUH, model_fr400_clduh, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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|
{ FRVBF_INSN_CLD, model_fr400_cld, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDBF, model_fr400_cldbf, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHF, model_fr400_cldhf, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDF, model_fr400_cldf, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDD, model_fr400_cldd, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDF, model_fr400_clddf, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQ, model_fr400_cldq, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSBU, model_fr400_cldsbu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUBU, model_fr400_cldubu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSHU, model_fr400_cldshu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUHU, model_fr400_clduhu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDU, model_fr400_cldu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDBFU, model_fr400_cldbfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHFU, model_fr400_cldhfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDFU, model_fr400_cldfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDU, model_fr400_clddu, { { (int) UNIT_FR400_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDFU, model_fr400_clddfu, { { (int) UNIT_FR400_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQU, model_fr400_cldqu, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTB, model_fr400_cstb, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTH, model_fr400_csth, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CST, model_fr400_cst, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBF, model_fr400_cstbf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHF, model_fr400_csthf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTF, model_fr400_cstf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTD, model_fr400_cstd, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDF, model_fr400_cstdf, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTQ, model_fr400_cstq, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBU, model_fr400_cstbu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHU, model_fr400_csthu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTU, model_fr400_cstu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBFU, model_fr400_cstbfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHFU, model_fr400_csthfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTFU, model_fr400_cstfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDU, model_fr400_cstdu, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDFU, model_fr400_cstdfu, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STBI, model_fr400_stbi, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STHI, model_fr400_sthi, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STI, model_fr400_sti, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STBFI, model_fr400_stbfi, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STHFI, model_fr400_sthfi, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STFI, model_fr400_stfi, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STDI, model_fr400_stdi, { { (int) UNIT_FR400_U_GR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STDFI, model_fr400_stdfi, { { (int) UNIT_FR400_U_FR_STORE, 1, 1 } } },
|
|
{ FRVBF_INSN_STQI, model_fr400_stqi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQFI, model_fr400_stqfi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAP, model_fr400_swap, { { (int) UNIT_FR400_U_SWAP, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAPI, model_fr400_swapi, { { (int) UNIT_FR400_U_SWAP, 1, 1 } } },
|
|
{ FRVBF_INSN_CSWAP, model_fr400_cswap, { { (int) UNIT_FR400_U_SWAP, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGF, model_fr400_movgf, { { (int) UNIT_FR400_U_GR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFG, model_fr400_movfg, { { (int) UNIT_FR400_U_FR2GR, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFD, model_fr400_movgfd, { { (int) UNIT_FR400_U_GR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGD, model_fr400_movfgd, { { (int) UNIT_FR400_U_FR2GR, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFQ, model_fr400_movgfq, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGQ, model_fr400_movfgq, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGF, model_fr400_cmovgf, { { (int) UNIT_FR400_U_GR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFG, model_fr400_cmovfg, { { (int) UNIT_FR400_U_FR2GR, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGFD, model_fr400_cmovgfd, { { (int) UNIT_FR400_U_GR2FR, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFGD, model_fr400_cmovfgd, { { (int) UNIT_FR400_U_FR2GR, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGS, model_fr400_movgs, { { (int) UNIT_FR400_U_GR2SPR, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVSG, model_fr400_movsg, { { (int) UNIT_FR400_U_SPR2GR, 1, 1 } } },
|
|
{ FRVBF_INSN_BRA, model_fr400_bra, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNO, model_fr400_bno, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQ, model_fr400_beq, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNE, model_fr400_bne, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLE, model_fr400_ble, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGT, model_fr400_bgt, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLT, model_fr400_blt, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGE, model_fr400_bge, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLS, model_fr400_bls, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BHI, model_fr400_bhi, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BC, model_fr400_bc, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNC, model_fr400_bnc, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BN, model_fr400_bn, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BP, model_fr400_bp, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BV, model_fr400_bv, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNV, model_fr400_bnv, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRA, model_fr400_fbra, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNO, model_fr400_fbno, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNE, model_fr400_fbne, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQ, model_fr400_fbeq, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLG, model_fr400_fblg, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUE, model_fr400_fbue, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUL, model_fr400_fbul, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGE, model_fr400_fbge, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLT, model_fr400_fblt, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGE, model_fr400_fbuge, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUG, model_fr400_fbug, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLE, model_fr400_fble, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGT, model_fr400_fbgt, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULE, model_fr400_fbule, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBU, model_fr400_fbu, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBO, model_fr400_fbo, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCTRLR, model_fr400_bctrlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BRALR, model_fr400_bralr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNOLR, model_fr400_bnolr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQLR, model_fr400_beqlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNELR, model_fr400_bnelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLELR, model_fr400_blelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGTLR, model_fr400_bgtlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLTLR, model_fr400_bltlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGELR, model_fr400_bgelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLSLR, model_fr400_blslr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BHILR, model_fr400_bhilr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLR, model_fr400_bclr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNCLR, model_fr400_bnclr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNLR, model_fr400_bnlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BPLR, model_fr400_bplr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BVLR, model_fr400_bvlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNVLR, model_fr400_bnvlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRALR, model_fr400_fbralr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNOLR, model_fr400_fbnolr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQLR, model_fr400_fbeqlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNELR, model_fr400_fbnelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLGLR, model_fr400_fblglr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUELR, model_fr400_fbuelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULLR, model_fr400_fbullr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGELR, model_fr400_fbgelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLTLR, model_fr400_fbltlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGELR, model_fr400_fbugelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGLR, model_fr400_fbuglr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLELR, model_fr400_fblelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGTLR, model_fr400_fbgtlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULELR, model_fr400_fbulelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULR, model_fr400_fbulr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBOLR, model_fr400_fbolr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCRALR, model_fr400_bcralr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNOLR, model_fr400_bcnolr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCEQLR, model_fr400_bceqlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNELR, model_fr400_bcnelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLELR, model_fr400_bclelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGTLR, model_fr400_bcgtlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLTLR, model_fr400_bcltlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGELR, model_fr400_bcgelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLSLR, model_fr400_bclslr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCHILR, model_fr400_bchilr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCCLR, model_fr400_bcclr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNCLR, model_fr400_bcnclr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNLR, model_fr400_bcnlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCPLR, model_fr400_bcplr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCVLR, model_fr400_bcvlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNVLR, model_fr400_bcnvlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBRALR, model_fr400_fcbralr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNOLR, model_fr400_fcbnolr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBEQLR, model_fr400_fcbeqlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNELR, model_fr400_fcbnelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLGLR, model_fr400_fcblglr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUELR, model_fr400_fcbuelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULLR, model_fr400_fcbullr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGELR, model_fr400_fcbgelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLTLR, model_fr400_fcbltlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGELR, model_fr400_fcbugelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGLR, model_fr400_fcbuglr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLELR, model_fr400_fcblelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGTLR, model_fr400_fcbgtlr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULELR, model_fr400_fcbulelr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULR, model_fr400_fcbulr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBOLR, model_fr400_fcbolr, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPL, model_fr400_jmpl, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLL, model_fr400_calll, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPIL, model_fr400_jmpil, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLIL, model_fr400_callil, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALL, model_fr400_call, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_RETT, model_fr400_rett, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_REI, model_fr400_rei, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TRA, model_fr400_tra, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNO, model_fr400_tno, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TEQ, model_fr400_teq, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNE, model_fr400_tne, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLE, model_fr400_tle, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGT, model_fr400_tgt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLT, model_fr400_tlt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGE, model_fr400_tge, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLS, model_fr400_tls, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_THI, model_fr400_thi, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TC, model_fr400_tc, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNC, model_fr400_tnc, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TN, model_fr400_tn, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TP, model_fr400_tp, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TV, model_fr400_tv, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNV, model_fr400_tnv, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTRA, model_fr400_ftra, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNO, model_fr400_ftno, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNE, model_fr400_ftne, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTEQ, model_fr400_fteq, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLG, model_fr400_ftlg, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUE, model_fr400_ftue, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUL, model_fr400_ftul, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGE, model_fr400_ftge, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLT, model_fr400_ftlt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUGE, model_fr400_ftuge, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUG, model_fr400_ftug, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLE, model_fr400_ftle, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGT, model_fr400_ftgt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTULE, model_fr400_ftule, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTU, model_fr400_ftu, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTO, model_fr400_fto, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIRA, model_fr400_tira, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINO, model_fr400_tino, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIEQ, model_fr400_tieq, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINE, model_fr400_tine, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILE, model_fr400_tile, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGT, model_fr400_tigt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILT, model_fr400_tilt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGE, model_fr400_tige, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILS, model_fr400_tils, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIHI, model_fr400_tihi, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIC, model_fr400_tic, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINC, model_fr400_tinc, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIN, model_fr400_tin, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIP, model_fr400_tip, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIV, model_fr400_tiv, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINV, model_fr400_tinv, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIRA, model_fr400_ftira, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINO, model_fr400_ftino, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINE, model_fr400_ftine, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIEQ, model_fr400_ftieq, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILG, model_fr400_ftilg, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUE, model_fr400_ftiue, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUL, model_fr400_ftiul, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGE, model_fr400_ftige, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILT, model_fr400_ftilt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUGE, model_fr400_ftiuge, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUG, model_fr400_ftiug, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILE, model_fr400_ftile, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGT, model_fr400_ftigt, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIULE, model_fr400_ftiule, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIU, model_fr400_ftiu, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIO, model_fr400_ftio, { { (int) UNIT_FR400_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_BREAK, model_fr400_break, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MTRAP, model_fr400_mtrap, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCR, model_fr400_andcr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCR, model_fr400_orcr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCR, model_fr400_xorcr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDCR, model_fr400_nandcr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORCR, model_fr400_norcr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDNCR, model_fr400_andncr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORNCR, model_fr400_orncr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDNCR, model_fr400_nandncr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORNCR, model_fr400_norncr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOTCR, model_fr400_notcr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKRA, model_fr400_ckra, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNO, model_fr400_ckno, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKEQ, model_fr400_ckeq, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNE, model_fr400_ckne, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLE, model_fr400_ckle, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGT, model_fr400_ckgt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLT, model_fr400_cklt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGE, model_fr400_ckge, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLS, model_fr400_ckls, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKHI, model_fr400_ckhi, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKC, model_fr400_ckc, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNC, model_fr400_cknc, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKN, model_fr400_ckn, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKP, model_fr400_ckp, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKV, model_fr400_ckv, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNV, model_fr400_cknv, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKRA, model_fr400_fckra, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNO, model_fr400_fckno, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNE, model_fr400_fckne, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKEQ, model_fr400_fckeq, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLG, model_fr400_fcklg, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUE, model_fr400_fckue, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUL, model_fr400_fckul, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGE, model_fr400_fckge, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLT, model_fr400_fcklt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUGE, model_fr400_fckuge, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUG, model_fr400_fckug, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLE, model_fr400_fckle, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGT, model_fr400_fckgt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKULE, model_fr400_fckule, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKU, model_fr400_fcku, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKO, model_fr400_fcko, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKRA, model_fr400_cckra, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNO, model_fr400_cckno, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKEQ, model_fr400_cckeq, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNE, model_fr400_cckne, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLE, model_fr400_cckle, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGT, model_fr400_cckgt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLT, model_fr400_ccklt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGE, model_fr400_cckge, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLS, model_fr400_cckls, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKHI, model_fr400_cckhi, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKC, model_fr400_cckc, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNC, model_fr400_ccknc, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKN, model_fr400_cckn, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKP, model_fr400_cckp, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKV, model_fr400_cckv, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNV, model_fr400_ccknv, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKRA, model_fr400_cfckra, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNO, model_fr400_cfckno, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNE, model_fr400_cfckne, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKEQ, model_fr400_cfckeq, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLG, model_fr400_cfcklg, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUE, model_fr400_cfckue, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUL, model_fr400_cfckul, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGE, model_fr400_cfckge, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLT, model_fr400_cfcklt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUGE, model_fr400_cfckuge, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUG, model_fr400_cfckug, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLE, model_fr400_cfckle, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGT, model_fr400_cfckgt, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKULE, model_fr400_cfckule, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKU, model_fr400_cfcku, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKO, model_fr400_cfcko, { { (int) UNIT_FR400_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CJMPL, model_fr400_cjmpl, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CCALLL, model_fr400_ccalll, { { (int) UNIT_FR400_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_ICI, model_fr400_ici, { { (int) UNIT_FR400_U_ICI, 1, 1 } } },
|
|
{ FRVBF_INSN_DCI, model_fr400_dci, { { (int) UNIT_FR400_U_DCI, 1, 1 } } },
|
|
{ FRVBF_INSN_ICEI, model_fr400_icei, { { (int) UNIT_FR400_U_ICI, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEI, model_fr400_dcei, { { (int) UNIT_FR400_U_DCI, 1, 1 } } },
|
|
{ FRVBF_INSN_DCF, model_fr400_dcf, { { (int) UNIT_FR400_U_DCF, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEF, model_fr400_dcef, { { (int) UNIT_FR400_U_DCF, 1, 1 } } },
|
|
{ FRVBF_INSN_WITLB, model_fr400_witlb, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WDTLB, model_fr400_wdtlb, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ITLBI, model_fr400_itlbi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DTLBI, model_fr400_dtlbi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICPL, model_fr400_icpl, { { (int) UNIT_FR400_U_ICPL, 1, 1 } } },
|
|
{ FRVBF_INSN_DCPL, model_fr400_dcpl, { { (int) UNIT_FR400_U_DCPL, 1, 1 } } },
|
|
{ FRVBF_INSN_ICUL, model_fr400_icul, { { (int) UNIT_FR400_U_ICUL, 1, 1 } } },
|
|
{ FRVBF_INSN_DCUL, model_fr400_dcul, { { (int) UNIT_FR400_U_DCUL, 1, 1 } } },
|
|
{ FRVBF_INSN_BAR, model_fr400_bar, { { (int) UNIT_FR400_U_BARRIER, 1, 1 } } },
|
|
{ FRVBF_INSN_MEMBAR, model_fr400_membar, { { (int) UNIT_FR400_U_MEMBAR, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAI, model_fr400_lrai, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAD, model_fr400_lrad, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLBPR, model_fr400_tlbpr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP1, model_fr400_cop1, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP2, model_fr400_cop2, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGR, model_fr400_clrgr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFR, model_fr400_clrfr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGA, model_fr400_clrga, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFA, model_fr400_clrfa, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGR, model_fr400_commitgr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFR, model_fr400_commitfr, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGA, model_fr400_commitga, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFA, model_fr400_commitfa, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOS, model_fr400_fitos, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSTOI, model_fr400_fstoi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOD, model_fr400_fitod, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDTOI, model_fr400_fdtoi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDITOS, model_fr400_fditos, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSTOI, model_fr400_fdstoi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDITOS, model_fr400_nfditos, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSTOI, model_fr400_nfdstoi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFITOS, model_fr400_cfitos, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSTOI, model_fr400_cfstoi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFITOS, model_fr400_nfitos, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSTOI, model_fr400_nfstoi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVS, model_fr400_fmovs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVD, model_fr400_fmovd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMOVS, model_fr400_fdmovs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMOVS, model_fr400_cfmovs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGS, model_fr400_fnegs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGD, model_fr400_fnegd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDNEGS, model_fr400_fdnegs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFNEGS, model_fr400_cfnegs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSS, model_fr400_fabss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSD, model_fr400_fabsd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDABSS, model_fr400_fdabss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFABSS, model_fr400_cfabss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTS, model_fr400_fsqrts, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSQRTS, model_fr400_fdsqrts, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSQRTS, model_fr400_nfdsqrts, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTD, model_fr400_fsqrtd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSQRTS, model_fr400_cfsqrts, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSQRTS, model_fr400_nfsqrts, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDS, model_fr400_fadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBS, model_fr400_fsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULS, model_fr400_fmuls, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVS, model_fr400_fdivs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDD, model_fr400_faddd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBD, model_fr400_fsubd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULD, model_fr400_fmuld, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVD, model_fr400_fdivd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFADDS, model_fr400_cfadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSUBS, model_fr400_cfsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMULS, model_fr400_cfmuls, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFDIVS, model_fr400_cfdivs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFADDS, model_fr400_nfadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSUBS, model_fr400_nfsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMULS, model_fr400_nfmuls, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDIVS, model_fr400_nfdivs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPS, model_fr400_fcmps, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_FCMPD, model_fr400_fcmpd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCMPS, model_fr400_cfcmps, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDCMPS, model_fr400_fdcmps, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDS, model_fr400_fmadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBS, model_fr400_fmsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDD, model_fr400_fmaddd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBD, model_fr400_fmsubd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMADDS, model_fr400_fdmadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_NFDMADDS, model_fr400_nfdmadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_CFMADDS, model_fr400_cfmadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_CFMSUBS, model_fr400_cfmsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_NFMADDS, model_fr400_nfmadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSUBS, model_fr400_nfmsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAS, model_fr400_fmas, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_FMSS, model_fr400_fmss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_FDMAS, model_fr400_fdmas, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_FDMSS, model_fr400_fdmss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_NFDMAS, model_fr400_nfdmas, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
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{ FRVBF_INSN_NFDMSS, model_fr400_nfdmss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMAS, model_fr400_cfmas, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSS, model_fr400_cfmss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAD, model_fr400_fmad, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSD, model_fr400_fmsd, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMAS, model_fr400_nfmas, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSS, model_fr400_nfmss, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDADDS, model_fr400_fdadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSUBS, model_fr400_fdsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULS, model_fr400_fdmuls, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDDIVS, model_fr400_fddivs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSADS, model_fr400_fdsads, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULCS, model_fr400_fdmulcs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULCS, model_fr400_nfdmulcs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDADDS, model_fr400_nfdadds, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSUBS, model_fr400_nfdsubs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULS, model_fr400_nfdmuls, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDDIVS, model_fr400_nfddivs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSADS, model_fr400_nfdsads, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDCMPS, model_fr400_nfdcmps, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOS, model_fr400_mhsetlos, { { (int) UNIT_FR400_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIS, model_fr400_mhsethis, { { (int) UNIT_FR400_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETS, model_fr400_mhdsets, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOH, model_fr400_mhsetloh, { { (int) UNIT_FR400_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIH, model_fr400_mhsethih, { { (int) UNIT_FR400_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETH, model_fr400_mhdseth, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MAND, model_fr400_mand, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MOR, model_fr400_mor, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MXOR, model_fr400_mxor, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMAND, model_fr400_cmand, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOR, model_fr400_cmor, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMXOR, model_fr400_cmxor, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOT, model_fr400_mnot, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMNOT, model_fr400_cmnot, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTLI, model_fr400_mrotli, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTRI, model_fr400_mrotri, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUT, model_fr400_mwcut, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUTI, model_fr400_mwcuti, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUT, model_fr400_mcut, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTI, model_fr400_mcuti, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSS, model_fr400_mcutss, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSSI, model_fr400_mcutssi, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_MDCUTSSI, model_fr400_mdcutssi, { { (int) UNIT_FR400_U_MEDIA_4_ACC_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_MAVEH, model_fr400_maveh, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MSLLHI, model_fr400_msllhi, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRLHI, model_fr400_msrlhi, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRAHI, model_fr400_msrahi, { { (int) UNIT_FR400_U_MEDIA_6, 1, 1 } } },
|
|
{ FRVBF_INSN_MDROTLI, model_fr400_mdrotli, { { (int) UNIT_FR400_U_MEDIA_3_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLHI, model_fr400_mcplhi, { { (int) UNIT_FR400_U_MEDIA_3_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLI, model_fr400_mcpli, { { (int) UNIT_FR400_U_MEDIA_3_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHS, model_fr400_msaths, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSATHS, model_fr400_mqsaths, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHU, model_fr400_msathu, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPSH, model_fr400_mcmpsh, { { (int) UNIT_FR400_U_MEDIA_7, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPUH, model_fr400_mcmpuh, { { (int) UNIT_FR400_U_MEDIA_7, 1, 1 } } },
|
|
{ FRVBF_INSN_MABSHS, model_fr400_mabshs, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHSS, model_fr400_maddhss, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHUS, model_fr400_maddhus, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHSS, model_fr400_msubhss, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHUS, model_fr400_msubhus, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHSS, model_fr400_cmaddhss, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHUS, model_fr400_cmaddhus, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHSS, model_fr400_cmsubhss, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHUS, model_fr400_cmsubhus, { { (int) UNIT_FR400_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHSS, model_fr400_mqaddhss, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHUS, model_fr400_mqaddhus, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHSS, model_fr400_mqsubhss, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHUS, model_fr400_mqsubhus, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHSS, model_fr400_cmqaddhss, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHUS, model_fr400_cmqaddhus, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHSS, model_fr400_cmqsubhss, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHUS, model_fr400_cmqsubhus, { { (int) UNIT_FR400_U_MEDIA_1_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLCLRHS, model_fr400_mqlclrhs, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLMTHS, model_fr400_mqlmths, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSLLHI, model_fr400_mqsllhi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSRAHI, model_fr400_mqsrahi, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDACCS, model_fr400_maddaccs, { { (int) UNIT_FR400_U_MEDIA_2_ACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBACCS, model_fr400_msubaccs, { { (int) UNIT_FR400_U_MEDIA_2_ACC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDADDACCS, model_fr400_mdaddaccs, { { (int) UNIT_FR400_U_MEDIA_2_ACC_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_MDSUBACCS, model_fr400_mdsubaccs, { { (int) UNIT_FR400_U_MEDIA_2_ACC_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_MASACCS, model_fr400_masaccs, { { (int) UNIT_FR400_U_MEDIA_2_ADD_SUB, 1, 1 } } },
|
|
{ FRVBF_INSN_MDASACCS, model_fr400_mdasaccs, { { (int) UNIT_FR400_U_MEDIA_2_ADD_SUB_DUAL, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHS, model_fr400_mmulhs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHU, model_fr400_mmulhu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULXHS, model_fr400_mmulxhs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULXHU, model_fr400_mmulxhu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMULHS, model_fr400_cmmulhs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMULHU, model_fr400_cmmulhu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULHS, model_fr400_mqmulhs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULHU, model_fr400_mqmulhu, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULXHS, model_fr400_mqmulxhs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULXHU, model_fr400_mqmulxhu, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMULHS, model_fr400_cmqmulhs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMULHU, model_fr400_cmqmulhu, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MMACHS, model_fr400_mmachs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MMACHU, model_fr400_mmachu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MMRDHS, model_fr400_mmrdhs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MMRDHU, model_fr400_mmrdhu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMACHS, model_fr400_cmmachs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMACHU, model_fr400_cmmachu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACHS, model_fr400_mqmachs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACHU, model_fr400_mqmachu, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMACHS, model_fr400_cmqmachs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMACHU, model_fr400_cmqmachu, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQXMACHS, model_fr400_mqxmachs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQXMACXHS, model_fr400_mqxmacxhs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACXHS, model_fr400_mqmacxhs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXRS, model_fr400_mcpxrs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXRU, model_fr400_mcpxru, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXIS, model_fr400_mcpxis, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXIU, model_fr400_mcpxiu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXRS, model_fr400_cmcpxrs, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXRU, model_fr400_cmcpxru, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIS, model_fr400_cmcpxis, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIU, model_fr400_cmcpxiu, { { (int) UNIT_FR400_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRS, model_fr400_mqcpxrs, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRU, model_fr400_mqcpxru, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIS, model_fr400_mqcpxis, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIU, model_fr400_mqcpxiu, { { (int) UNIT_FR400_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHW, model_fr400_mexpdhw, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHW, model_fr400_cmexpdhw, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHD, model_fr400_mexpdhd, { { (int) UNIT_FR400_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHD, model_fr400_cmexpdhd, { { (int) UNIT_FR400_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MPACKH, model_fr400_mpackh, { { (int) UNIT_FR400_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MDPACKH, model_fr400_mdpackh, { { (int) UNIT_FR400_U_MEDIA_3_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MUNPACKH, model_fr400_munpackh, { { (int) UNIT_FR400_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MDUNPACKH, model_fr400_mdunpackh, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOH, model_fr400_mbtoh, { { (int) UNIT_FR400_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOH, model_fr400_cmbtoh, { { (int) UNIT_FR400_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MHTOB, model_fr400_mhtob, { { (int) UNIT_FR400_U_MEDIA_DUAL_HTOB, 1, 1 } } },
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|
{ FRVBF_INSN_CMHTOB, model_fr400_cmhtob, { { (int) UNIT_FR400_U_MEDIA_DUAL_HTOB, 1, 1 } } },
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{ FRVBF_INSN_MBTOHE, model_fr400_mbtohe, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMBTOHE, model_fr400_cmbtohe, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MNOP, model_fr400_mnop, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCLRACC_0, model_fr400_mclracc_0, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MCLRACC_1, model_fr400_mclracc_1, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MRDACC, model_fr400_mrdacc, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MRDACCG, model_fr400_mrdaccg, { { (int) UNIT_FR400_U_MEDIA_4_ACCG, 1, 1 } } },
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{ FRVBF_INSN_MWTACC, model_fr400_mwtacc, { { (int) UNIT_FR400_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MWTACCG, model_fr400_mwtaccg, { { (int) UNIT_FR400_U_MEDIA_4_ACCG, 1, 1 } } },
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{ FRVBF_INSN_MCOP1, model_fr400_mcop1, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MCOP2, model_fr400_mcop2, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_FNOP, model_fr400_fnop, { { (int) UNIT_FR400_U_EXEC, 1, 1 } } },
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};
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/* Model timing data for `fr450'. */
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static const INSN_TIMING fr450_timing[] = {
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{ FRVBF_INSN_X_INVALID, 0, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_AFTER, 0, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEFORE, 0, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_CHAIN, 0, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_X_BEGIN, 0, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_ADD, model_fr450_add, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SUB, model_fr450_sub, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_AND, model_fr450_and, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_OR, model_fr450_or, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_XOR, model_fr450_xor, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_NOT, model_fr450_not, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SDIV, model_fr450_sdiv, { { (int) UNIT_FR450_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NSDIV, model_fr450_nsdiv, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_UDIV, model_fr450_udiv, { { (int) UNIT_FR450_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_NUDIV, model_fr450_nudiv, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SMUL, model_fr450_smul, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_UMUL, model_fr450_umul, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_SMU, model_fr450_smu, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SMASS, model_fr450_smass, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SMSSS, model_fr450_smsss, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLL, model_fr450_sll, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRL, model_fr450_srl, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SRA, model_fr450_sra, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_SLASS, model_fr450_slass, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCUTSS, model_fr450_scutss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SCAN, model_fr450_scan, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CADD, model_fr450_cadd, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSUB, model_fr450_csub, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CAND, model_fr450_cand, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_COR, model_fr450_cor, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CXOR, model_fr450_cxor, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CNOT, model_fr450_cnot, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSMUL, model_fr450_csmul, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
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{ FRVBF_INSN_CSDIV, model_fr450_csdiv, { { (int) UNIT_FR450_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_CUDIV, model_fr450_cudiv, { { (int) UNIT_FR450_U_IDIV, 1, 1 } } },
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{ FRVBF_INSN_CSLL, model_fr450_csll, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRL, model_fr450_csrl, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSRA, model_fr450_csra, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
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{ FRVBF_INSN_CSCAN, model_fr450_cscan, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_ADDCC, model_fr450_addcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_SUBCC, model_fr450_subcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
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{ FRVBF_INSN_ANDCC, model_fr450_andcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCC, model_fr450_orcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCC, model_fr450_xorcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLCC, model_fr450_sllcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLCC, model_fr450_srlcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRACC, model_fr450_sracc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULCC, model_fr450_smulcc, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULCC, model_fr450_umulcc, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CADDCC, model_fr450_caddcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUBCC, model_fr450_csubcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMULCC, model_fr450_csmulcc, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_CANDCC, model_fr450_candcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CORCC, model_fr450_corcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CXORCC, model_fr450_cxorcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLLCC, model_fr450_csllcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRLCC, model_fr450_csrlcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRACC, model_fr450_csracc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDX, model_fr450_addx, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBX, model_fr450_subx, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXCC, model_fr450_addxcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXCC, model_fr450_subxcc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDSS, model_fr450_addss, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBSS, model_fr450_subss, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDI, model_fr450_addi, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBI, model_fr450_subi, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDI, model_fr450_andi, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORI, model_fr450_ori, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORI, model_fr450_xori, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIVI, model_fr450_sdivi, { { (int) UNIT_FR450_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIVI, model_fr450_nsdivi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIVI, model_fr450_udivi, { { (int) UNIT_FR450_U_IDIV, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIVI, model_fr450_nudivi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULI, model_fr450_smuli, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULI, model_fr450_umuli, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLI, model_fr450_slli, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLI, model_fr450_srli, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAI, model_fr450_srai, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SCANI, model_fr450_scani, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDICC, model_fr450_addicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBICC, model_fr450_subicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDICC, model_fr450_andicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ORICC, model_fr450_oricc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_XORICC, model_fr450_xoricc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULICC, model_fr450_smulicc, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULICC, model_fr450_umulicc, { { (int) UNIT_FR450_U_IMUL, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLICC, model_fr450_sllicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLICC, model_fr450_srlicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAICC, model_fr450_sraicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXI, model_fr450_addxi, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXI, model_fr450_subxi, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXICC, model_fr450_addxicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXICC, model_fr450_subxicc, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPB, model_fr450_cmpb, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPBA, model_fr450_cmpba, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLO, model_fr450_setlo, { { (int) UNIT_FR450_U_SET_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_SETHI, model_fr450_sethi, { { (int) UNIT_FR450_U_SET_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLOS, model_fr450_setlos, { { (int) UNIT_FR450_U_INTEGER, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSB, model_fr450_ldsb, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUB, model_fr450_ldub, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSH, model_fr450_ldsh, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUH, model_fr450_lduh, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LD, model_fr450_ld, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBF, model_fr450_ldbf, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHF, model_fr450_ldhf, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDF, model_fr450_ldf, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDC, model_fr450_ldc, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSB, model_fr450_nldsb, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUB, model_fr450_nldub, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSH, model_fr450_nldsh, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUH, model_fr450_nlduh, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLD, model_fr450_nld, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBF, model_fr450_nldbf, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHF, model_fr450_nldhf, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDF, model_fr450_nldf, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDD, model_fr450_ldd, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDF, model_fr450_lddf, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDC, model_fr450_lddc, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDD, model_fr450_nldd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDF, model_fr450_nlddf, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQ, model_fr450_ldq, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQF, model_fr450_ldqf, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQC, model_fr450_ldqc, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQ, model_fr450_nldq, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQF, model_fr450_nldqf, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSBU, model_fr450_ldsbu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUBU, model_fr450_ldubu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSHU, model_fr450_ldshu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUHU, model_fr450_lduhu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDU, model_fr450_ldu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSBU, model_fr450_nldsbu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUBU, model_fr450_nldubu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSHU, model_fr450_nldshu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUHU, model_fr450_nlduhu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDU, model_fr450_nldu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBFU, model_fr450_ldbfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHFU, model_fr450_ldhfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDFU, model_fr450_ldfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDCU, model_fr450_ldcu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBFU, model_fr450_nldbfu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHFU, model_fr450_nldhfu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDFU, model_fr450_nldfu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDU, model_fr450_lddu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDU, model_fr450_nlddu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDFU, model_fr450_lddfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDCU, model_fr450_lddcu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDFU, model_fr450_nlddfu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQU, model_fr450_ldqu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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|
{ FRVBF_INSN_NLDQU, model_fr450_nldqu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQFU, model_fr450_ldqfu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQCU, model_fr450_ldqcu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQFU, model_fr450_nldqfu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDSBI, model_fr450_ldsbi, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDSHI, model_fr450_ldshi, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDI, model_fr450_ldi, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUBI, model_fr450_ldubi, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDUHI, model_fr450_lduhi, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDBFI, model_fr450_ldbfi, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDHFI, model_fr450_ldhfi, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDFI, model_fr450_ldfi, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDSBI, model_fr450_nldsbi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUBI, model_fr450_nldubi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDSHI, model_fr450_nldshi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDUHI, model_fr450_nlduhi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDI, model_fr450_nldi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDBFI, model_fr450_nldbfi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDHFI, model_fr450_nldhfi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDFI, model_fr450_nldfi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDDI, model_fr450_lddi, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_LDDFI, model_fr450_lddfi, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_NLDDI, model_fr450_nlddi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDDFI, model_fr450_nlddfi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQI, model_fr450_ldqi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_LDQFI, model_fr450_ldqfi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_NLDQFI, model_fr450_nldqfi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STB, model_fr450_stb, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STH, model_fr450_sth, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_ST, model_fr450_st, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBF, model_fr450_stbf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHF, model_fr450_sthf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STF, model_fr450_stf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STC, model_fr450_stc, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STD, model_fr450_std, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDF, model_fr450_stdf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDC, model_fr450_stdc, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQ, model_fr450_stq, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQF, model_fr450_stqf, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQC, model_fr450_stqc, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STBU, model_fr450_stbu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHU, model_fr450_sthu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STU, model_fr450_stu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBFU, model_fr450_stbfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHFU, model_fr450_sthfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STFU, model_fr450_stfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STCU, model_fr450_stcu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STDU, model_fr450_stdu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDFU, model_fr450_stdfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDCU, model_fr450_stdcu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQU, model_fr450_stqu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQFU, model_fr450_stqfu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQCU, model_fr450_stqcu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CLDSB, model_fr450_cldsb, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUB, model_fr450_cldub, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSH, model_fr450_cldsh, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUH, model_fr450_clduh, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLD, model_fr450_cld, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDBF, model_fr450_cldbf, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDHF, model_fr450_cldhf, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDF, model_fr450_cldf, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDD, model_fr450_cldd, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDF, model_fr450_clddf, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDQ, model_fr450_cldq, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CLDSBU, model_fr450_cldsbu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUBU, model_fr450_cldubu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDSHU, model_fr450_cldshu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDUHU, model_fr450_clduhu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDU, model_fr450_cldu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDBFU, model_fr450_cldbfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDHFU, model_fr450_cldhfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDFU, model_fr450_cldfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDU, model_fr450_clddu, { { (int) UNIT_FR450_U_GR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDDFU, model_fr450_clddfu, { { (int) UNIT_FR450_U_FR_LOAD, 1, 1 } } },
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{ FRVBF_INSN_CLDQU, model_fr450_cldqu, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CSTB, model_fr450_cstb, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTH, model_fr450_csth, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CST, model_fr450_cst, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTBF, model_fr450_cstbf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHF, model_fr450_csthf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTF, model_fr450_cstf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTD, model_fr450_cstd, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDF, model_fr450_cstdf, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTQ, model_fr450_cstq, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CSTBU, model_fr450_cstbu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHU, model_fr450_csthu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTU, model_fr450_cstu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTBFU, model_fr450_cstbfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTHFU, model_fr450_csthfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTFU, model_fr450_cstfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDU, model_fr450_cstdu, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_CSTDFU, model_fr450_cstdfu, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBI, model_fr450_stbi, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHI, model_fr450_sthi, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STI, model_fr450_sti, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STBFI, model_fr450_stbfi, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STHFI, model_fr450_sthfi, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STFI, model_fr450_stfi, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDI, model_fr450_stdi, { { (int) UNIT_FR450_U_GR_STORE, 1, 1 } } },
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{ FRVBF_INSN_STDFI, model_fr450_stdfi, { { (int) UNIT_FR450_U_FR_STORE, 1, 1 } } },
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|
{ FRVBF_INSN_STQI, model_fr450_stqi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_STQFI, model_fr450_stqfi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_SWAP, model_fr450_swap, { { (int) UNIT_FR450_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_SWAPI, model_fr450_swapi, { { (int) UNIT_FR450_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_CSWAP, model_fr450_cswap, { { (int) UNIT_FR450_U_SWAP, 1, 1 } } },
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{ FRVBF_INSN_MOVGF, model_fr450_movgf, { { (int) UNIT_FR450_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_MOVFG, model_fr450_movfg, { { (int) UNIT_FR450_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGFD, model_fr450_movgfd, { { (int) UNIT_FR450_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_MOVFGD, model_fr450_movfgd, { { (int) UNIT_FR450_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGFQ, model_fr450_movgfq, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_MOVFGQ, model_fr450_movfgq, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
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{ FRVBF_INSN_CMOVGF, model_fr450_cmovgf, { { (int) UNIT_FR450_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_CMOVFG, model_fr450_cmovfg, { { (int) UNIT_FR450_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_CMOVGFD, model_fr450_cmovgfd, { { (int) UNIT_FR450_U_GR2FR, 1, 1 } } },
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{ FRVBF_INSN_CMOVFGD, model_fr450_cmovfgd, { { (int) UNIT_FR450_U_FR2GR, 1, 1 } } },
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{ FRVBF_INSN_MOVGS, model_fr450_movgs, { { (int) UNIT_FR450_U_GR2SPR, 1, 1 } } },
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{ FRVBF_INSN_MOVSG, model_fr450_movsg, { { (int) UNIT_FR450_U_SPR2GR, 1, 1 } } },
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{ FRVBF_INSN_BRA, model_fr450_bra, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNO, model_fr450_bno, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BEQ, model_fr450_beq, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BNE, model_fr450_bne, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLE, model_fr450_ble, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGT, model_fr450_bgt, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BLT, model_fr450_blt, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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{ FRVBF_INSN_BGE, model_fr450_bge, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
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|
{ FRVBF_INSN_BLS, model_fr450_bls, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_BHI, model_fr450_bhi, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BC, model_fr450_bc, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_BNC, model_fr450_bnc, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BN, model_fr450_bn, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BP, model_fr450_bp, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BV, model_fr450_bv, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
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{ FRVBF_INSN_BNV, model_fr450_bnv, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRA, model_fr450_fbra, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNO, model_fr450_fbno, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNE, model_fr450_fbne, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQ, model_fr450_fbeq, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLG, model_fr450_fblg, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUE, model_fr450_fbue, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUL, model_fr450_fbul, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGE, model_fr450_fbge, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLT, model_fr450_fblt, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGE, model_fr450_fbuge, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUG, model_fr450_fbug, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLE, model_fr450_fble, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGT, model_fr450_fbgt, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULE, model_fr450_fbule, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBU, model_fr450_fbu, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBO, model_fr450_fbo, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCTRLR, model_fr450_bctrlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BRALR, model_fr450_bralr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNOLR, model_fr450_bnolr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQLR, model_fr450_beqlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNELR, model_fr450_bnelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLELR, model_fr450_blelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGTLR, model_fr450_bgtlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLTLR, model_fr450_bltlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BGELR, model_fr450_bgelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BLSLR, model_fr450_blslr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BHILR, model_fr450_bhilr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLR, model_fr450_bclr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNCLR, model_fr450_bnclr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNLR, model_fr450_bnlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BPLR, model_fr450_bplr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BVLR, model_fr450_bvlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BNVLR, model_fr450_bnvlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRALR, model_fr450_fbralr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNOLR, model_fr450_fbnolr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQLR, model_fr450_fbeqlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNELR, model_fr450_fbnelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLGLR, model_fr450_fblglr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUELR, model_fr450_fbuelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULLR, model_fr450_fbullr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGELR, model_fr450_fbgelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLTLR, model_fr450_fbltlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGELR, model_fr450_fbugelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGLR, model_fr450_fbuglr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLELR, model_fr450_fblelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGTLR, model_fr450_fbgtlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULELR, model_fr450_fbulelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULR, model_fr450_fbulr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FBOLR, model_fr450_fbolr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCRALR, model_fr450_bcralr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNOLR, model_fr450_bcnolr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCEQLR, model_fr450_bceqlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNELR, model_fr450_bcnelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLELR, model_fr450_bclelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGTLR, model_fr450_bcgtlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLTLR, model_fr450_bcltlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGELR, model_fr450_bcgelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLSLR, model_fr450_bclslr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCHILR, model_fr450_bchilr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCCLR, model_fr450_bcclr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNCLR, model_fr450_bcnclr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNLR, model_fr450_bcnlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCPLR, model_fr450_bcplr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCVLR, model_fr450_bcvlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNVLR, model_fr450_bcnvlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBRALR, model_fr450_fcbralr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNOLR, model_fr450_fcbnolr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBEQLR, model_fr450_fcbeqlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNELR, model_fr450_fcbnelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLGLR, model_fr450_fcblglr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUELR, model_fr450_fcbuelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULLR, model_fr450_fcbullr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGELR, model_fr450_fcbgelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLTLR, model_fr450_fcbltlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGELR, model_fr450_fcbugelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGLR, model_fr450_fcbuglr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLELR, model_fr450_fcblelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGTLR, model_fr450_fcbgtlr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULELR, model_fr450_fcbulelr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULR, model_fr450_fcbulr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBOLR, model_fr450_fcbolr, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPL, model_fr450_jmpl, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLL, model_fr450_calll, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPIL, model_fr450_jmpil, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLIL, model_fr450_callil, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CALL, model_fr450_call, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_RETT, model_fr450_rett, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_REI, model_fr450_rei, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TRA, model_fr450_tra, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNO, model_fr450_tno, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TEQ, model_fr450_teq, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNE, model_fr450_tne, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLE, model_fr450_tle, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGT, model_fr450_tgt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLT, model_fr450_tlt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TGE, model_fr450_tge, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TLS, model_fr450_tls, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_THI, model_fr450_thi, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TC, model_fr450_tc, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNC, model_fr450_tnc, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TN, model_fr450_tn, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TP, model_fr450_tp, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TV, model_fr450_tv, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TNV, model_fr450_tnv, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTRA, model_fr450_ftra, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNO, model_fr450_ftno, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNE, model_fr450_ftne, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTEQ, model_fr450_fteq, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLG, model_fr450_ftlg, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUE, model_fr450_ftue, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUL, model_fr450_ftul, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGE, model_fr450_ftge, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLT, model_fr450_ftlt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUGE, model_fr450_ftuge, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUG, model_fr450_ftug, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLE, model_fr450_ftle, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGT, model_fr450_ftgt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTULE, model_fr450_ftule, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTU, model_fr450_ftu, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTO, model_fr450_fto, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIRA, model_fr450_tira, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINO, model_fr450_tino, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIEQ, model_fr450_tieq, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINE, model_fr450_tine, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILE, model_fr450_tile, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGT, model_fr450_tigt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILT, model_fr450_tilt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGE, model_fr450_tige, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TILS, model_fr450_tils, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIHI, model_fr450_tihi, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIC, model_fr450_tic, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINC, model_fr450_tinc, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIN, model_fr450_tin, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIP, model_fr450_tip, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TIV, model_fr450_tiv, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_TINV, model_fr450_tinv, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIRA, model_fr450_ftira, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINO, model_fr450_ftino, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINE, model_fr450_ftine, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIEQ, model_fr450_ftieq, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILG, model_fr450_ftilg, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUE, model_fr450_ftiue, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUL, model_fr450_ftiul, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGE, model_fr450_ftige, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILT, model_fr450_ftilt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUGE, model_fr450_ftiuge, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUG, model_fr450_ftiug, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILE, model_fr450_ftile, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGT, model_fr450_ftigt, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIULE, model_fr450_ftiule, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIU, model_fr450_ftiu, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIO, model_fr450_ftio, { { (int) UNIT_FR450_U_TRAP, 1, 1 } } },
|
|
{ FRVBF_INSN_BREAK, model_fr450_break, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MTRAP, model_fr450_mtrap, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCR, model_fr450_andcr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCR, model_fr450_orcr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCR, model_fr450_xorcr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDCR, model_fr450_nandcr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORCR, model_fr450_norcr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDNCR, model_fr450_andncr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORNCR, model_fr450_orncr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDNCR, model_fr450_nandncr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORNCR, model_fr450_norncr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOTCR, model_fr450_notcr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKRA, model_fr450_ckra, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNO, model_fr450_ckno, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKEQ, model_fr450_ckeq, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNE, model_fr450_ckne, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLE, model_fr450_ckle, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGT, model_fr450_ckgt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLT, model_fr450_cklt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGE, model_fr450_ckge, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLS, model_fr450_ckls, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKHI, model_fr450_ckhi, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKC, model_fr450_ckc, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNC, model_fr450_cknc, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKN, model_fr450_ckn, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKP, model_fr450_ckp, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKV, model_fr450_ckv, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNV, model_fr450_cknv, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKRA, model_fr450_fckra, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNO, model_fr450_fckno, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNE, model_fr450_fckne, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKEQ, model_fr450_fckeq, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLG, model_fr450_fcklg, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUE, model_fr450_fckue, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUL, model_fr450_fckul, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGE, model_fr450_fckge, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLT, model_fr450_fcklt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUGE, model_fr450_fckuge, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUG, model_fr450_fckug, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLE, model_fr450_fckle, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGT, model_fr450_fckgt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKULE, model_fr450_fckule, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKU, model_fr450_fcku, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKO, model_fr450_fcko, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKRA, model_fr450_cckra, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNO, model_fr450_cckno, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKEQ, model_fr450_cckeq, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNE, model_fr450_cckne, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLE, model_fr450_cckle, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGT, model_fr450_cckgt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLT, model_fr450_ccklt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGE, model_fr450_cckge, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLS, model_fr450_cckls, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKHI, model_fr450_cckhi, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKC, model_fr450_cckc, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNC, model_fr450_ccknc, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKN, model_fr450_cckn, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKP, model_fr450_cckp, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKV, model_fr450_cckv, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNV, model_fr450_ccknv, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKRA, model_fr450_cfckra, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNO, model_fr450_cfckno, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNE, model_fr450_cfckne, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKEQ, model_fr450_cfckeq, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLG, model_fr450_cfcklg, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUE, model_fr450_cfckue, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUL, model_fr450_cfckul, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGE, model_fr450_cfckge, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLT, model_fr450_cfcklt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUGE, model_fr450_cfckuge, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUG, model_fr450_cfckug, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLE, model_fr450_cfckle, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGT, model_fr450_cfckgt, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKULE, model_fr450_cfckule, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKU, model_fr450_cfcku, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKO, model_fr450_cfcko, { { (int) UNIT_FR450_U_CHECK, 1, 1 } } },
|
|
{ FRVBF_INSN_CJMPL, model_fr450_cjmpl, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_CCALLL, model_fr450_ccalll, { { (int) UNIT_FR450_U_BRANCH, 1, 1 } } },
|
|
{ FRVBF_INSN_ICI, model_fr450_ici, { { (int) UNIT_FR450_U_ICI, 1, 1 } } },
|
|
{ FRVBF_INSN_DCI, model_fr450_dci, { { (int) UNIT_FR450_U_DCI, 1, 1 } } },
|
|
{ FRVBF_INSN_ICEI, model_fr450_icei, { { (int) UNIT_FR450_U_ICI, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEI, model_fr450_dcei, { { (int) UNIT_FR450_U_DCI, 1, 1 } } },
|
|
{ FRVBF_INSN_DCF, model_fr450_dcf, { { (int) UNIT_FR450_U_DCF, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEF, model_fr450_dcef, { { (int) UNIT_FR450_U_DCF, 1, 1 } } },
|
|
{ FRVBF_INSN_WITLB, model_fr450_witlb, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WDTLB, model_fr450_wdtlb, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ITLBI, model_fr450_itlbi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DTLBI, model_fr450_dtlbi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICPL, model_fr450_icpl, { { (int) UNIT_FR450_U_ICPL, 1, 1 } } },
|
|
{ FRVBF_INSN_DCPL, model_fr450_dcpl, { { (int) UNIT_FR450_U_DCPL, 1, 1 } } },
|
|
{ FRVBF_INSN_ICUL, model_fr450_icul, { { (int) UNIT_FR450_U_ICUL, 1, 1 } } },
|
|
{ FRVBF_INSN_DCUL, model_fr450_dcul, { { (int) UNIT_FR450_U_DCUL, 1, 1 } } },
|
|
{ FRVBF_INSN_BAR, model_fr450_bar, { { (int) UNIT_FR450_U_BARRIER, 1, 1 } } },
|
|
{ FRVBF_INSN_MEMBAR, model_fr450_membar, { { (int) UNIT_FR450_U_MEMBAR, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAI, model_fr450_lrai, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAD, model_fr450_lrad, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLBPR, model_fr450_tlbpr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP1, model_fr450_cop1, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP2, model_fr450_cop2, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGR, model_fr450_clrgr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFR, model_fr450_clrfr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGA, model_fr450_clrga, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFA, model_fr450_clrfa, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGR, model_fr450_commitgr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFR, model_fr450_commitfr, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGA, model_fr450_commitga, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFA, model_fr450_commitfa, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOS, model_fr450_fitos, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSTOI, model_fr450_fstoi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOD, model_fr450_fitod, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDTOI, model_fr450_fdtoi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDITOS, model_fr450_fditos, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSTOI, model_fr450_fdstoi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDITOS, model_fr450_nfditos, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSTOI, model_fr450_nfdstoi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFITOS, model_fr450_cfitos, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSTOI, model_fr450_cfstoi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFITOS, model_fr450_nfitos, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSTOI, model_fr450_nfstoi, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVS, model_fr450_fmovs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVD, model_fr450_fmovd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMOVS, model_fr450_fdmovs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMOVS, model_fr450_cfmovs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGS, model_fr450_fnegs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGD, model_fr450_fnegd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDNEGS, model_fr450_fdnegs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFNEGS, model_fr450_cfnegs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSS, model_fr450_fabss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSD, model_fr450_fabsd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDABSS, model_fr450_fdabss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFABSS, model_fr450_cfabss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTS, model_fr450_fsqrts, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSQRTS, model_fr450_fdsqrts, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSQRTS, model_fr450_nfdsqrts, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTD, model_fr450_fsqrtd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSQRTS, model_fr450_cfsqrts, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSQRTS, model_fr450_nfsqrts, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDS, model_fr450_fadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBS, model_fr450_fsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULS, model_fr450_fmuls, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVS, model_fr450_fdivs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDD, model_fr450_faddd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBD, model_fr450_fsubd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULD, model_fr450_fmuld, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVD, model_fr450_fdivd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFADDS, model_fr450_cfadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSUBS, model_fr450_cfsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMULS, model_fr450_cfmuls, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFDIVS, model_fr450_cfdivs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFADDS, model_fr450_nfadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSUBS, model_fr450_nfsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMULS, model_fr450_nfmuls, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDIVS, model_fr450_nfdivs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPS, model_fr450_fcmps, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPD, model_fr450_fcmpd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCMPS, model_fr450_cfcmps, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDCMPS, model_fr450_fdcmps, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDS, model_fr450_fmadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBS, model_fr450_fmsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDD, model_fr450_fmaddd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBD, model_fr450_fmsubd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMADDS, model_fr450_fdmadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMADDS, model_fr450_nfdmadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMADDS, model_fr450_cfmadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSUBS, model_fr450_cfmsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMADDS, model_fr450_nfmadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSUBS, model_fr450_nfmsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAS, model_fr450_fmas, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSS, model_fr450_fmss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMAS, model_fr450_fdmas, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMSS, model_fr450_fdmss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMAS, model_fr450_nfdmas, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMSS, model_fr450_nfdmss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMAS, model_fr450_cfmas, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSS, model_fr450_cfmss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAD, model_fr450_fmad, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSD, model_fr450_fmsd, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMAS, model_fr450_nfmas, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSS, model_fr450_nfmss, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDADDS, model_fr450_fdadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSUBS, model_fr450_fdsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULS, model_fr450_fdmuls, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDDIVS, model_fr450_fddivs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSADS, model_fr450_fdsads, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULCS, model_fr450_fdmulcs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULCS, model_fr450_nfdmulcs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDADDS, model_fr450_nfdadds, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSUBS, model_fr450_nfdsubs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULS, model_fr450_nfdmuls, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDDIVS, model_fr450_nfddivs, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSADS, model_fr450_nfdsads, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDCMPS, model_fr450_nfdcmps, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOS, model_fr450_mhsetlos, { { (int) UNIT_FR450_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIS, model_fr450_mhsethis, { { (int) UNIT_FR450_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETS, model_fr450_mhdsets, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOH, model_fr450_mhsetloh, { { (int) UNIT_FR450_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIH, model_fr450_mhsethih, { { (int) UNIT_FR450_U_MEDIA_HILO, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETH, model_fr450_mhdseth, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MAND, model_fr450_mand, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
|
|
{ FRVBF_INSN_MOR, model_fr450_mor, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MXOR, model_fr450_mxor, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMAND, model_fr450_cmand, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMOR, model_fr450_cmor, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMXOR, model_fr450_cmxor, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MNOT, model_fr450_mnot, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMNOT, model_fr450_cmnot, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MROTLI, model_fr450_mrotli, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
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{ FRVBF_INSN_MROTRI, model_fr450_mrotri, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
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{ FRVBF_INSN_MWCUT, model_fr450_mwcut, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
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{ FRVBF_INSN_MWCUTI, model_fr450_mwcuti, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
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{ FRVBF_INSN_MCUT, model_fr450_mcut, { { (int) UNIT_FR450_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MCUTI, model_fr450_mcuti, { { (int) UNIT_FR450_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MCUTSS, model_fr450_mcutss, { { (int) UNIT_FR450_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MCUTSSI, model_fr450_mcutssi, { { (int) UNIT_FR450_U_MEDIA_4, 1, 1 } } },
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{ FRVBF_INSN_MDCUTSSI, model_fr450_mdcutssi, { { (int) UNIT_FR450_U_MEDIA_4_ACC_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MAVEH, model_fr450_maveh, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MSLLHI, model_fr450_msllhi, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
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{ FRVBF_INSN_MSRLHI, model_fr450_msrlhi, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
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{ FRVBF_INSN_MSRAHI, model_fr450_msrahi, { { (int) UNIT_FR450_U_MEDIA_6, 1, 1 } } },
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{ FRVBF_INSN_MDROTLI, model_fr450_mdrotli, { { (int) UNIT_FR450_U_MEDIA_3_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MCPLHI, model_fr450_mcplhi, { { (int) UNIT_FR450_U_MEDIA_3_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MCPLI, model_fr450_mcpli, { { (int) UNIT_FR450_U_MEDIA_3_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MSATHS, model_fr450_msaths, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MQSATHS, model_fr450_mqsaths, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MSATHU, model_fr450_msathu, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MCMPSH, model_fr450_mcmpsh, { { (int) UNIT_FR450_U_MEDIA_7, 1, 1 } } },
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{ FRVBF_INSN_MCMPUH, model_fr450_mcmpuh, { { (int) UNIT_FR450_U_MEDIA_7, 1, 1 } } },
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{ FRVBF_INSN_MABSHS, model_fr450_mabshs, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MADDHSS, model_fr450_maddhss, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MADDHUS, model_fr450_maddhus, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MSUBHSS, model_fr450_msubhss, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MSUBHUS, model_fr450_msubhus, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMADDHSS, model_fr450_cmaddhss, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMADDHUS, model_fr450_cmaddhus, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMSUBHSS, model_fr450_cmsubhss, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_CMSUBHUS, model_fr450_cmsubhus, { { (int) UNIT_FR450_U_MEDIA_1, 1, 1 } } },
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{ FRVBF_INSN_MQADDHSS, model_fr450_mqaddhss, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQADDHUS, model_fr450_mqaddhus, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQSUBHSS, model_fr450_mqsubhss, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQSUBHUS, model_fr450_mqsubhus, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQADDHSS, model_fr450_cmqaddhss, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQADDHUS, model_fr450_cmqaddhus, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQSUBHSS, model_fr450_cmqsubhss, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQSUBHUS, model_fr450_cmqsubhus, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQLCLRHS, model_fr450_mqlclrhs, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQLMTHS, model_fr450_mqlmths, { { (int) UNIT_FR450_U_MEDIA_1_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQSLLHI, model_fr450_mqsllhi, { { (int) UNIT_FR450_U_MEDIA_3_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQSRAHI, model_fr450_mqsrahi, { { (int) UNIT_FR450_U_MEDIA_3_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MADDACCS, model_fr450_maddaccs, { { (int) UNIT_FR450_U_MEDIA_2_ACC, 1, 1 } } },
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{ FRVBF_INSN_MSUBACCS, model_fr450_msubaccs, { { (int) UNIT_FR450_U_MEDIA_2_ACC, 1, 1 } } },
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{ FRVBF_INSN_MDADDACCS, model_fr450_mdaddaccs, { { (int) UNIT_FR450_U_MEDIA_2_ACC_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MDSUBACCS, model_fr450_mdsubaccs, { { (int) UNIT_FR450_U_MEDIA_2_ACC_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MASACCS, model_fr450_masaccs, { { (int) UNIT_FR450_U_MEDIA_2_ADD_SUB, 1, 1 } } },
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{ FRVBF_INSN_MDASACCS, model_fr450_mdasaccs, { { (int) UNIT_FR450_U_MEDIA_2_ADD_SUB_DUAL, 1, 1 } } },
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{ FRVBF_INSN_MMULHS, model_fr450_mmulhs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MMULHU, model_fr450_mmulhu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MMULXHS, model_fr450_mmulxhs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MMULXHU, model_fr450_mmulxhu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_CMMULHS, model_fr450_cmmulhs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_CMMULHU, model_fr450_cmmulhu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MQMULHS, model_fr450_mqmulhs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQMULHU, model_fr450_mqmulhu, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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|
{ FRVBF_INSN_MQMULXHS, model_fr450_mqmulxhs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQMULXHU, model_fr450_mqmulxhu, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQMULHS, model_fr450_cmqmulhs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQMULHU, model_fr450_cmqmulhu, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MMACHS, model_fr450_mmachs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MMACHU, model_fr450_mmachu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MMRDHS, model_fr450_mmrdhs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MMRDHU, model_fr450_mmrdhu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_CMMACHS, model_fr450_cmmachs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_CMMACHU, model_fr450_cmmachu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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{ FRVBF_INSN_MQMACHS, model_fr450_mqmachs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQMACHU, model_fr450_mqmachu, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHS, model_fr450_cmqmachs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_CMQMACHU, model_fr450_cmqmachu, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQXMACHS, model_fr450_mqxmachs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQXMACXHS, model_fr450_mqxmacxhs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MQMACXHS, model_fr450_mqmacxhs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
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{ FRVBF_INSN_MCPXRS, model_fr450_mcpxrs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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|
{ FRVBF_INSN_MCPXRU, model_fr450_mcpxru, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXIS, model_fr450_mcpxis, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
|
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{ FRVBF_INSN_MCPXIU, model_fr450_mcpxiu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
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|
{ FRVBF_INSN_CMCPXRS, model_fr450_cmcpxrs, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
|
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{ FRVBF_INSN_CMCPXRU, model_fr450_cmcpxru, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIS, model_fr450_cmcpxis, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIU, model_fr450_cmcpxiu, { { (int) UNIT_FR450_U_MEDIA_2, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRS, model_fr450_mqcpxrs, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRU, model_fr450_mqcpxru, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIS, model_fr450_mqcpxis, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIU, model_fr450_mqcpxiu, { { (int) UNIT_FR450_U_MEDIA_2_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHW, model_fr450_mexpdhw, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHW, model_fr450_cmexpdhw, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHD, model_fr450_mexpdhd, { { (int) UNIT_FR450_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHD, model_fr450_cmexpdhd, { { (int) UNIT_FR450_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MPACKH, model_fr450_mpackh, { { (int) UNIT_FR450_U_MEDIA_3, 1, 1 } } },
|
|
{ FRVBF_INSN_MDPACKH, model_fr450_mdpackh, { { (int) UNIT_FR450_U_MEDIA_3_QUAD, 1, 1 } } },
|
|
{ FRVBF_INSN_MUNPACKH, model_fr450_munpackh, { { (int) UNIT_FR450_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MDUNPACKH, model_fr450_mdunpackh, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOH, model_fr450_mbtoh, { { (int) UNIT_FR450_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOH, model_fr450_cmbtoh, { { (int) UNIT_FR450_U_MEDIA_DUAL_EXPAND, 1, 1 } } },
|
|
{ FRVBF_INSN_MHTOB, model_fr450_mhtob, { { (int) UNIT_FR450_U_MEDIA_DUAL_HTOB, 1, 1 } } },
|
|
{ FRVBF_INSN_CMHTOB, model_fr450_cmhtob, { { (int) UNIT_FR450_U_MEDIA_DUAL_HTOB, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOHE, model_fr450_mbtohe, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOHE, model_fr450_cmbtohe, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOP, model_fr450_mnop, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_0, model_fr450_mclracc_0, { { (int) UNIT_FR450_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_1, model_fr450_mclracc_1, { { (int) UNIT_FR450_U_MEDIA_4_MCLRACCA, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACC, model_fr450_mrdacc, { { (int) UNIT_FR450_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACCG, model_fr450_mrdaccg, { { (int) UNIT_FR450_U_MEDIA_4_ACCG, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACC, model_fr450_mwtacc, { { (int) UNIT_FR450_U_MEDIA_4, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACCG, model_fr450_mwtaccg, { { (int) UNIT_FR450_U_MEDIA_4_ACCG, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP1, model_fr450_mcop1, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP2, model_fr450_mcop2, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNOP, model_fr450_fnop, { { (int) UNIT_FR450_U_EXEC, 1, 1 } } },
|
|
};
|
|
|
|
/* Model timing data for `simple'. */
|
|
|
|
static const INSN_TIMING simple_timing[] = {
|
|
{ FRVBF_INSN_X_INVALID, 0, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_AFTER, 0, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_BEFORE, 0, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_CHAIN, 0, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_X_BEGIN, 0, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADD, model_simple_add, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUB, model_simple_sub, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_AND, model_simple_and, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_OR, model_simple_or, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XOR, model_simple_xor, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOT, model_simple_not, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIV, model_simple_sdiv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIV, model_simple_nsdiv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIV, model_simple_udiv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIV, model_simple_nudiv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMUL, model_simple_smul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMUL, model_simple_umul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMU, model_simple_smu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMASS, model_simple_smass, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMSSS, model_simple_smsss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLL, model_simple_sll, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRL, model_simple_srl, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRA, model_simple_sra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLASS, model_simple_slass, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCUTSS, model_simple_scutss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCAN, model_simple_scan, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CADD, model_simple_cadd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUB, model_simple_csub, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CAND, model_simple_cand, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COR, model_simple_cor, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CXOR, model_simple_cxor, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CNOT, model_simple_cnot, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMUL, model_simple_csmul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSDIV, model_simple_csdiv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CUDIV, model_simple_cudiv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLL, model_simple_csll, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRL, model_simple_csrl, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRA, model_simple_csra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSCAN, model_simple_cscan, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDCC, model_simple_addcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBCC, model_simple_subcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCC, model_simple_andcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCC, model_simple_orcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCC, model_simple_xorcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLCC, model_simple_sllcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLCC, model_simple_srlcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRACC, model_simple_sracc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULCC, model_simple_smulcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULCC, model_simple_umulcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CADDCC, model_simple_caddcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSUBCC, model_simple_csubcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSMULCC, model_simple_csmulcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CANDCC, model_simple_candcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CORCC, model_simple_corcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CXORCC, model_simple_cxorcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSLLCC, model_simple_csllcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRLCC, model_simple_csrlcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSRACC, model_simple_csracc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDX, model_simple_addx, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBX, model_simple_subx, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXCC, model_simple_addxcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXCC, model_simple_subxcc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDSS, model_simple_addss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBSS, model_simple_subss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDI, model_simple_addi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBI, model_simple_subi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDI, model_simple_andi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORI, model_simple_ori, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORI, model_simple_xori, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SDIVI, model_simple_sdivi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NSDIVI, model_simple_nsdivi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UDIVI, model_simple_udivi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NUDIVI, model_simple_nudivi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULI, model_simple_smuli, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULI, model_simple_umuli, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLI, model_simple_slli, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLI, model_simple_srli, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAI, model_simple_srai, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SCANI, model_simple_scani, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDICC, model_simple_addicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBICC, model_simple_subicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDICC, model_simple_andicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORICC, model_simple_oricc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORICC, model_simple_xoricc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SMULICC, model_simple_smulicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_UMULICC, model_simple_umulicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SLLICC, model_simple_sllicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRLICC, model_simple_srlicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SRAICC, model_simple_sraicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXI, model_simple_addxi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXI, model_simple_subxi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ADDXICC, model_simple_addxicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SUBXICC, model_simple_subxicc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPB, model_simple_cmpb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMPBA, model_simple_cmpba, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLO, model_simple_setlo, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETHI, model_simple_sethi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SETLOS, model_simple_setlos, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSB, model_simple_ldsb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUB, model_simple_ldub, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSH, model_simple_ldsh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUH, model_simple_lduh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LD, model_simple_ld, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBF, model_simple_ldbf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHF, model_simple_ldhf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDF, model_simple_ldf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDC, model_simple_ldc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSB, model_simple_nldsb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUB, model_simple_nldub, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSH, model_simple_nldsh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUH, model_simple_nlduh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLD, model_simple_nld, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBF, model_simple_nldbf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHF, model_simple_nldhf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDF, model_simple_nldf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDD, model_simple_ldd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDF, model_simple_lddf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDC, model_simple_lddc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDD, model_simple_nldd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDF, model_simple_nlddf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQ, model_simple_ldq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQF, model_simple_ldqf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQC, model_simple_ldqc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQ, model_simple_nldq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQF, model_simple_nldqf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSBU, model_simple_ldsbu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUBU, model_simple_ldubu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSHU, model_simple_ldshu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUHU, model_simple_lduhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDU, model_simple_ldu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSBU, model_simple_nldsbu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUBU, model_simple_nldubu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSHU, model_simple_nldshu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUHU, model_simple_nlduhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDU, model_simple_nldu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBFU, model_simple_ldbfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHFU, model_simple_ldhfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDFU, model_simple_ldfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDCU, model_simple_ldcu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBFU, model_simple_nldbfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHFU, model_simple_nldhfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDFU, model_simple_nldfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDU, model_simple_lddu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDU, model_simple_nlddu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDFU, model_simple_lddfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDCU, model_simple_lddcu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDFU, model_simple_nlddfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQU, model_simple_ldqu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQU, model_simple_nldqu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQFU, model_simple_ldqfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQCU, model_simple_ldqcu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQFU, model_simple_nldqfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSBI, model_simple_ldsbi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDSHI, model_simple_ldshi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDI, model_simple_ldi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUBI, model_simple_ldubi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDUHI, model_simple_lduhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDBFI, model_simple_ldbfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDHFI, model_simple_ldhfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDFI, model_simple_ldfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSBI, model_simple_nldsbi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUBI, model_simple_nldubi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDSHI, model_simple_nldshi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDUHI, model_simple_nlduhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDI, model_simple_nldi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDBFI, model_simple_nldbfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDHFI, model_simple_nldhfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDFI, model_simple_nldfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDI, model_simple_lddi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDDFI, model_simple_lddfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDI, model_simple_nlddi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDDFI, model_simple_nlddfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQI, model_simple_ldqi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LDQFI, model_simple_ldqfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NLDQFI, model_simple_nldqfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STB, model_simple_stb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STH, model_simple_sth, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ST, model_simple_st, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBF, model_simple_stbf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHF, model_simple_sthf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STF, model_simple_stf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STC, model_simple_stc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STD, model_simple_std, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDF, model_simple_stdf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDC, model_simple_stdc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQ, model_simple_stq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQF, model_simple_stqf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQC, model_simple_stqc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBU, model_simple_stbu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHU, model_simple_sthu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STU, model_simple_stu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBFU, model_simple_stbfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHFU, model_simple_sthfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STFU, model_simple_stfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STCU, model_simple_stcu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDU, model_simple_stdu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDFU, model_simple_stdfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDCU, model_simple_stdcu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQU, model_simple_stqu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQFU, model_simple_stqfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQCU, model_simple_stqcu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSB, model_simple_cldsb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUB, model_simple_cldub, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSH, model_simple_cldsh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUH, model_simple_clduh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLD, model_simple_cld, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDBF, model_simple_cldbf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHF, model_simple_cldhf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDF, model_simple_cldf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDD, model_simple_cldd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDF, model_simple_clddf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQ, model_simple_cldq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSBU, model_simple_cldsbu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUBU, model_simple_cldubu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDSHU, model_simple_cldshu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDUHU, model_simple_clduhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDU, model_simple_cldu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDBFU, model_simple_cldbfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDHFU, model_simple_cldhfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDFU, model_simple_cldfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDU, model_simple_clddu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDDFU, model_simple_clddfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLDQU, model_simple_cldqu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTB, model_simple_cstb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTH, model_simple_csth, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CST, model_simple_cst, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBF, model_simple_cstbf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHF, model_simple_csthf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTF, model_simple_cstf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTD, model_simple_cstd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDF, model_simple_cstdf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTQ, model_simple_cstq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBU, model_simple_cstbu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHU, model_simple_csthu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTU, model_simple_cstu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTBFU, model_simple_cstbfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTHFU, model_simple_csthfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTFU, model_simple_cstfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDU, model_simple_cstdu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSTDFU, model_simple_cstdfu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBI, model_simple_stbi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHI, model_simple_sthi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STI, model_simple_sti, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STBFI, model_simple_stbfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STHFI, model_simple_sthfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STFI, model_simple_stfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDI, model_simple_stdi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STDFI, model_simple_stdfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQI, model_simple_stqi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_STQFI, model_simple_stqfi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAP, model_simple_swap, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_SWAPI, model_simple_swapi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CSWAP, model_simple_cswap, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGF, model_simple_movgf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFG, model_simple_movfg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFD, model_simple_movgfd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGD, model_simple_movfgd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGFQ, model_simple_movgfq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVFGQ, model_simple_movfgq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGF, model_simple_cmovgf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFG, model_simple_cmovfg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVGFD, model_simple_cmovgfd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOVFGD, model_simple_cmovfgd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVGS, model_simple_movgs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOVSG, model_simple_movsg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BRA, model_simple_bra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNO, model_simple_bno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQ, model_simple_beq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNE, model_simple_bne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLE, model_simple_ble, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGT, model_simple_bgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLT, model_simple_blt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGE, model_simple_bge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLS, model_simple_bls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BHI, model_simple_bhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BC, model_simple_bc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNC, model_simple_bnc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BN, model_simple_bn, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BP, model_simple_bp, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BV, model_simple_bv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNV, model_simple_bnv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRA, model_simple_fbra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNO, model_simple_fbno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNE, model_simple_fbne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQ, model_simple_fbeq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLG, model_simple_fblg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUE, model_simple_fbue, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUL, model_simple_fbul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGE, model_simple_fbge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLT, model_simple_fblt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGE, model_simple_fbuge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUG, model_simple_fbug, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLE, model_simple_fble, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGT, model_simple_fbgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULE, model_simple_fbule, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBU, model_simple_fbu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBO, model_simple_fbo, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCTRLR, model_simple_bctrlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BRALR, model_simple_bralr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNOLR, model_simple_bnolr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BEQLR, model_simple_beqlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNELR, model_simple_bnelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLELR, model_simple_blelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGTLR, model_simple_bgtlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLTLR, model_simple_bltlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BGELR, model_simple_bgelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BLSLR, model_simple_blslr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BHILR, model_simple_bhilr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLR, model_simple_bclr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNCLR, model_simple_bnclr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNLR, model_simple_bnlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BPLR, model_simple_bplr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BVLR, model_simple_bvlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BNVLR, model_simple_bnvlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBRALR, model_simple_fbralr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNOLR, model_simple_fbnolr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBEQLR, model_simple_fbeqlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBNELR, model_simple_fbnelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLGLR, model_simple_fblglr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUELR, model_simple_fbuelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULLR, model_simple_fbullr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGELR, model_simple_fbgelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLTLR, model_simple_fbltlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGELR, model_simple_fbugelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBUGLR, model_simple_fbuglr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBLELR, model_simple_fblelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBGTLR, model_simple_fbgtlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULELR, model_simple_fbulelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBULR, model_simple_fbulr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FBOLR, model_simple_fbolr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCRALR, model_simple_bcralr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNOLR, model_simple_bcnolr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCEQLR, model_simple_bceqlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNELR, model_simple_bcnelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLELR, model_simple_bclelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGTLR, model_simple_bcgtlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLTLR, model_simple_bcltlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCGELR, model_simple_bcgelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCLSLR, model_simple_bclslr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCHILR, model_simple_bchilr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCCLR, model_simple_bcclr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNCLR, model_simple_bcnclr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNLR, model_simple_bcnlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCPLR, model_simple_bcplr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCVLR, model_simple_bcvlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BCNVLR, model_simple_bcnvlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBRALR, model_simple_fcbralr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNOLR, model_simple_fcbnolr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBEQLR, model_simple_fcbeqlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBNELR, model_simple_fcbnelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLGLR, model_simple_fcblglr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUELR, model_simple_fcbuelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULLR, model_simple_fcbullr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGELR, model_simple_fcbgelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLTLR, model_simple_fcbltlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGELR, model_simple_fcbugelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBUGLR, model_simple_fcbuglr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBLELR, model_simple_fcblelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBGTLR, model_simple_fcbgtlr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULELR, model_simple_fcbulelr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBULR, model_simple_fcbulr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCBOLR, model_simple_fcbolr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPL, model_simple_jmpl, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLL, model_simple_calll, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_JMPIL, model_simple_jmpil, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALLIL, model_simple_callil, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CALL, model_simple_call, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_RETT, model_simple_rett, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_REI, model_simple_rei, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TRA, model_simple_tra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNO, model_simple_tno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TEQ, model_simple_teq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNE, model_simple_tne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLE, model_simple_tle, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TGT, model_simple_tgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLT, model_simple_tlt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TGE, model_simple_tge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLS, model_simple_tls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_THI, model_simple_thi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TC, model_simple_tc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNC, model_simple_tnc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TN, model_simple_tn, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TP, model_simple_tp, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TV, model_simple_tv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TNV, model_simple_tnv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTRA, model_simple_ftra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNO, model_simple_ftno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTNE, model_simple_ftne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTEQ, model_simple_fteq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLG, model_simple_ftlg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUE, model_simple_ftue, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUL, model_simple_ftul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGE, model_simple_ftge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLT, model_simple_ftlt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUGE, model_simple_ftuge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTUG, model_simple_ftug, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTLE, model_simple_ftle, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTGT, model_simple_ftgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTULE, model_simple_ftule, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTU, model_simple_ftu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTO, model_simple_fto, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIRA, model_simple_tira, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINO, model_simple_tino, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIEQ, model_simple_tieq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINE, model_simple_tine, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILE, model_simple_tile, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGT, model_simple_tigt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILT, model_simple_tilt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIGE, model_simple_tige, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TILS, model_simple_tils, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIHI, model_simple_tihi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIC, model_simple_tic, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINC, model_simple_tinc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIN, model_simple_tin, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIP, model_simple_tip, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TIV, model_simple_tiv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TINV, model_simple_tinv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIRA, model_simple_ftira, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINO, model_simple_ftino, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTINE, model_simple_ftine, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIEQ, model_simple_ftieq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILG, model_simple_ftilg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUE, model_simple_ftiue, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUL, model_simple_ftiul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGE, model_simple_ftige, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILT, model_simple_ftilt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUGE, model_simple_ftiuge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIUG, model_simple_ftiug, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTILE, model_simple_ftile, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIGT, model_simple_ftigt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIULE, model_simple_ftiule, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIU, model_simple_ftiu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FTIO, model_simple_ftio, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BREAK, model_simple_break, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MTRAP, model_simple_mtrap, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDCR, model_simple_andcr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORCR, model_simple_orcr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_XORCR, model_simple_xorcr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDCR, model_simple_nandcr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORCR, model_simple_norcr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ANDNCR, model_simple_andncr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ORNCR, model_simple_orncr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NANDNCR, model_simple_nandncr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NORNCR, model_simple_norncr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NOTCR, model_simple_notcr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKRA, model_simple_ckra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNO, model_simple_ckno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKEQ, model_simple_ckeq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNE, model_simple_ckne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLE, model_simple_ckle, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGT, model_simple_ckgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLT, model_simple_cklt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKGE, model_simple_ckge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKLS, model_simple_ckls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKHI, model_simple_ckhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKC, model_simple_ckc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNC, model_simple_cknc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKN, model_simple_ckn, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKP, model_simple_ckp, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKV, model_simple_ckv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CKNV, model_simple_cknv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKRA, model_simple_fckra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNO, model_simple_fckno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKNE, model_simple_fckne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKEQ, model_simple_fckeq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLG, model_simple_fcklg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUE, model_simple_fckue, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUL, model_simple_fckul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGE, model_simple_fckge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLT, model_simple_fcklt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUGE, model_simple_fckuge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKUG, model_simple_fckug, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKLE, model_simple_fckle, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKGT, model_simple_fckgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKULE, model_simple_fckule, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKU, model_simple_fcku, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCKO, model_simple_fcko, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKRA, model_simple_cckra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNO, model_simple_cckno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKEQ, model_simple_cckeq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNE, model_simple_cckne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLE, model_simple_cckle, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGT, model_simple_cckgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLT, model_simple_ccklt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKGE, model_simple_cckge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKLS, model_simple_cckls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKHI, model_simple_cckhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKC, model_simple_cckc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNC, model_simple_ccknc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKN, model_simple_cckn, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKP, model_simple_cckp, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKV, model_simple_cckv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCKNV, model_simple_ccknv, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKRA, model_simple_cfckra, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNO, model_simple_cfckno, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKNE, model_simple_cfckne, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKEQ, model_simple_cfckeq, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLG, model_simple_cfcklg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUE, model_simple_cfckue, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUL, model_simple_cfckul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGE, model_simple_cfckge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLT, model_simple_cfcklt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUGE, model_simple_cfckuge, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKUG, model_simple_cfckug, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKLE, model_simple_cfckle, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKGT, model_simple_cfckgt, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKULE, model_simple_cfckule, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKU, model_simple_cfcku, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCKO, model_simple_cfcko, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CJMPL, model_simple_cjmpl, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CCALLL, model_simple_ccalll, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICI, model_simple_ici, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCI, model_simple_dci, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICEI, model_simple_icei, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEI, model_simple_dcei, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCF, model_simple_dcf, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCEF, model_simple_dcef, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WITLB, model_simple_witlb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_WDTLB, model_simple_wdtlb, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ITLBI, model_simple_itlbi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DTLBI, model_simple_dtlbi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICPL, model_simple_icpl, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCPL, model_simple_dcpl, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_ICUL, model_simple_icul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_DCUL, model_simple_dcul, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_BAR, model_simple_bar, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MEMBAR, model_simple_membar, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAI, model_simple_lrai, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_LRAD, model_simple_lrad, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_TLBPR, model_simple_tlbpr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP1, model_simple_cop1, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COP2, model_simple_cop2, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGR, model_simple_clrgr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFR, model_simple_clrfr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRGA, model_simple_clrga, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CLRFA, model_simple_clrfa, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGR, model_simple_commitgr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFR, model_simple_commitfr, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITGA, model_simple_commitga, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_COMMITFA, model_simple_commitfa, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOS, model_simple_fitos, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSTOI, model_simple_fstoi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FITOD, model_simple_fitod, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDTOI, model_simple_fdtoi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDITOS, model_simple_fditos, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSTOI, model_simple_fdstoi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDITOS, model_simple_nfditos, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSTOI, model_simple_nfdstoi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFITOS, model_simple_cfitos, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSTOI, model_simple_cfstoi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFITOS, model_simple_nfitos, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSTOI, model_simple_nfstoi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVS, model_simple_fmovs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMOVD, model_simple_fmovd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMOVS, model_simple_fdmovs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMOVS, model_simple_cfmovs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGS, model_simple_fnegs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNEGD, model_simple_fnegd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDNEGS, model_simple_fdnegs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFNEGS, model_simple_cfnegs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSS, model_simple_fabss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FABSD, model_simple_fabsd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDABSS, model_simple_fdabss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFABSS, model_simple_cfabss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTS, model_simple_fsqrts, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSQRTS, model_simple_fdsqrts, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSQRTS, model_simple_nfdsqrts, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSQRTD, model_simple_fsqrtd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSQRTS, model_simple_cfsqrts, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSQRTS, model_simple_nfsqrts, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDS, model_simple_fadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBS, model_simple_fsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULS, model_simple_fmuls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVS, model_simple_fdivs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FADDD, model_simple_faddd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FSUBD, model_simple_fsubd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMULD, model_simple_fmuld, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDIVD, model_simple_fdivd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFADDS, model_simple_cfadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFSUBS, model_simple_cfsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMULS, model_simple_cfmuls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFDIVS, model_simple_cfdivs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFADDS, model_simple_nfadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFSUBS, model_simple_nfsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMULS, model_simple_nfmuls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDIVS, model_simple_nfdivs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPS, model_simple_fcmps, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FCMPD, model_simple_fcmpd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFCMPS, model_simple_cfcmps, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDCMPS, model_simple_fdcmps, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDS, model_simple_fmadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBS, model_simple_fmsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMADDD, model_simple_fmaddd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSUBD, model_simple_fmsubd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMADDS, model_simple_fdmadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMADDS, model_simple_nfdmadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMADDS, model_simple_cfmadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSUBS, model_simple_cfmsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMADDS, model_simple_nfmadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSUBS, model_simple_nfmsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAS, model_simple_fmas, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSS, model_simple_fmss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMAS, model_simple_fdmas, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMSS, model_simple_fdmss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMAS, model_simple_nfdmas, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMSS, model_simple_nfdmss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMAS, model_simple_cfmas, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CFMSS, model_simple_cfmss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMAD, model_simple_fmad, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FMSD, model_simple_fmsd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMAS, model_simple_nfmas, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFMSS, model_simple_nfmss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDADDS, model_simple_fdadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSUBS, model_simple_fdsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULS, model_simple_fdmuls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDDIVS, model_simple_fddivs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDSADS, model_simple_fdsads, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FDMULCS, model_simple_fdmulcs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULCS, model_simple_nfdmulcs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDADDS, model_simple_nfdadds, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSUBS, model_simple_nfdsubs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDMULS, model_simple_nfdmuls, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDDIVS, model_simple_nfddivs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDSADS, model_simple_nfdsads, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_NFDCMPS, model_simple_nfdcmps, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOS, model_simple_mhsetlos, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIS, model_simple_mhsethis, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETS, model_simple_mhdsets, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETLOH, model_simple_mhsetloh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHSETHIH, model_simple_mhsethih, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHDSETH, model_simple_mhdseth, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MAND, model_simple_mand, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MOR, model_simple_mor, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MXOR, model_simple_mxor, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMAND, model_simple_cmand, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMOR, model_simple_cmor, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMXOR, model_simple_cmxor, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOT, model_simple_mnot, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMNOT, model_simple_cmnot, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTLI, model_simple_mrotli, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MROTRI, model_simple_mrotri, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUT, model_simple_mwcut, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWCUTI, model_simple_mwcuti, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUT, model_simple_mcut, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTI, model_simple_mcuti, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSS, model_simple_mcutss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCUTSSI, model_simple_mcutssi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDCUTSSI, model_simple_mdcutssi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MAVEH, model_simple_maveh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSLLHI, model_simple_msllhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRLHI, model_simple_msrlhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSRAHI, model_simple_msrahi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDROTLI, model_simple_mdrotli, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLHI, model_simple_mcplhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPLI, model_simple_mcpli, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHS, model_simple_msaths, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSATHS, model_simple_mqsaths, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSATHU, model_simple_msathu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPSH, model_simple_mcmpsh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCMPUH, model_simple_mcmpuh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MABSHS, model_simple_mabshs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHSS, model_simple_maddhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDHUS, model_simple_maddhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHSS, model_simple_msubhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBHUS, model_simple_msubhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHSS, model_simple_cmaddhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMADDHUS, model_simple_cmaddhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHSS, model_simple_cmsubhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMSUBHUS, model_simple_cmsubhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHSS, model_simple_mqaddhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQADDHUS, model_simple_mqaddhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHSS, model_simple_mqsubhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSUBHUS, model_simple_mqsubhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHSS, model_simple_cmqaddhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQADDHUS, model_simple_cmqaddhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHSS, model_simple_cmqsubhss, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQSUBHUS, model_simple_cmqsubhus, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLCLRHS, model_simple_mqlclrhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQLMTHS, model_simple_mqlmths, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSLLHI, model_simple_mqsllhi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQSRAHI, model_simple_mqsrahi, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MADDACCS, model_simple_maddaccs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MSUBACCS, model_simple_msubaccs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDADDACCS, model_simple_mdaddaccs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDSUBACCS, model_simple_mdsubaccs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MASACCS, model_simple_masaccs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDASACCS, model_simple_mdasaccs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHS, model_simple_mmulhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULHU, model_simple_mmulhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULXHS, model_simple_mmulxhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMULXHU, model_simple_mmulxhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMULHS, model_simple_cmmulhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMULHU, model_simple_cmmulhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULHS, model_simple_mqmulhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULHU, model_simple_mqmulhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULXHS, model_simple_mqmulxhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMULXHU, model_simple_mqmulxhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMULHS, model_simple_cmqmulhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMULHU, model_simple_cmqmulhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMACHS, model_simple_mmachs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMACHU, model_simple_mmachu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMRDHS, model_simple_mmrdhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MMRDHU, model_simple_mmrdhu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMACHS, model_simple_cmmachs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMMACHU, model_simple_cmmachu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACHS, model_simple_mqmachs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACHU, model_simple_mqmachu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMACHS, model_simple_cmqmachs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMQMACHU, model_simple_cmqmachu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQXMACHS, model_simple_mqxmachs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQXMACXHS, model_simple_mqxmacxhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQMACXHS, model_simple_mqmacxhs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXRS, model_simple_mcpxrs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXRU, model_simple_mcpxru, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXIS, model_simple_mcpxis, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCPXIU, model_simple_mcpxiu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXRS, model_simple_cmcpxrs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXRU, model_simple_cmcpxru, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIS, model_simple_cmcpxis, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMCPXIU, model_simple_cmcpxiu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRS, model_simple_mqcpxrs, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXRU, model_simple_mqcpxru, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIS, model_simple_mqcpxis, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MQCPXIU, model_simple_mqcpxiu, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHW, model_simple_mexpdhw, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHW, model_simple_cmexpdhw, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MEXPDHD, model_simple_mexpdhd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMEXPDHD, model_simple_cmexpdhd, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MPACKH, model_simple_mpackh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDPACKH, model_simple_mdpackh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MUNPACKH, model_simple_munpackh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MDUNPACKH, model_simple_mdunpackh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOH, model_simple_mbtoh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOH, model_simple_cmbtoh, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MHTOB, model_simple_mhtob, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMHTOB, model_simple_cmhtob, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MBTOHE, model_simple_mbtohe, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_CMBTOHE, model_simple_cmbtohe, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MNOP, model_simple_mnop, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_0, model_simple_mclracc_0, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCLRACC_1, model_simple_mclracc_1, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACC, model_simple_mrdacc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MRDACCG, model_simple_mrdaccg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACC, model_simple_mwtacc, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MWTACCG, model_simple_mwtaccg, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP1, model_simple_mcop1, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_MCOP2, model_simple_mcop2, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
{ FRVBF_INSN_FNOP, model_simple_fnop, { { (int) UNIT_SIMPLE_U_EXEC, 1, 1 } } },
|
|
};
|
|
|
|
#endif /* WITH_PROFILE_MODEL_P */
|
|
|
|
static void
|
|
frv_model_init (SIM_CPU *cpu)
|
|
{
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FRV_DATA));
|
|
}
|
|
|
|
static void
|
|
fr550_model_init (SIM_CPU *cpu)
|
|
{
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR550_DATA));
|
|
}
|
|
|
|
static void
|
|
fr500_model_init (SIM_CPU *cpu)
|
|
{
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR500_DATA));
|
|
}
|
|
|
|
static void
|
|
tomcat_model_init (SIM_CPU *cpu)
|
|
{
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_TOMCAT_DATA));
|
|
}
|
|
|
|
static void
|
|
fr400_model_init (SIM_CPU *cpu)
|
|
{
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR400_DATA));
|
|
}
|
|
|
|
static void
|
|
fr450_model_init (SIM_CPU *cpu)
|
|
{
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_FR450_DATA));
|
|
}
|
|
|
|
static void
|
|
simple_model_init (SIM_CPU *cpu)
|
|
{
|
|
CPU_MODEL_DATA (cpu) = (void *) zalloc (sizeof (MODEL_SIMPLE_DATA));
|
|
}
|
|
|
|
#if WITH_PROFILE_MODEL_P
|
|
#define TIMING_DATA(td) td
|
|
#else
|
|
#define TIMING_DATA(td) 0
|
|
#endif
|
|
|
|
static const SIM_MODEL frv_models[] =
|
|
{
|
|
{ "frv", & frv_mach, MODEL_FRV, TIMING_DATA (& frv_timing[0]), frv_model_init },
|
|
{ 0 }
|
|
};
|
|
|
|
static const SIM_MODEL fr550_models[] =
|
|
{
|
|
{ "fr550", & fr550_mach, MODEL_FR550, TIMING_DATA (& fr550_timing[0]), fr550_model_init },
|
|
{ 0 }
|
|
};
|
|
|
|
static const SIM_MODEL fr500_models[] =
|
|
{
|
|
{ "fr500", & fr500_mach, MODEL_FR500, TIMING_DATA (& fr500_timing[0]), fr500_model_init },
|
|
{ 0 }
|
|
};
|
|
|
|
static const SIM_MODEL tomcat_models[] =
|
|
{
|
|
{ "tomcat", & tomcat_mach, MODEL_TOMCAT, TIMING_DATA (& tomcat_timing[0]), tomcat_model_init },
|
|
{ 0 }
|
|
};
|
|
|
|
static const SIM_MODEL fr400_models[] =
|
|
{
|
|
{ "fr400", & fr400_mach, MODEL_FR400, TIMING_DATA (& fr400_timing[0]), fr400_model_init },
|
|
{ 0 }
|
|
};
|
|
|
|
static const SIM_MODEL fr450_models[] =
|
|
{
|
|
{ "fr450", & fr450_mach, MODEL_FR450, TIMING_DATA (& fr450_timing[0]), fr450_model_init },
|
|
{ 0 }
|
|
};
|
|
|
|
static const SIM_MODEL simple_models[] =
|
|
{
|
|
{ "simple", & simple_mach, MODEL_SIMPLE, TIMING_DATA (& simple_timing[0]), simple_model_init },
|
|
{ 0 }
|
|
};
|
|
|
|
/* The properties of this cpu's implementation. */
|
|
|
|
static const SIM_MACH_IMP_PROPERTIES frvbf_imp_properties =
|
|
{
|
|
sizeof (SIM_CPU),
|
|
#if WITH_SCACHE
|
|
sizeof (SCACHE)
|
|
#else
|
|
0
|
|
#endif
|
|
};
|
|
|
|
|
|
static void
|
|
frvbf_prepare_run (SIM_CPU *cpu)
|
|
{
|
|
if (CPU_IDESC (cpu) == NULL)
|
|
frvbf_init_idesc_table (cpu);
|
|
}
|
|
|
|
static const CGEN_INSN *
|
|
frvbf_get_idata (SIM_CPU *cpu, int inum)
|
|
{
|
|
return CPU_IDESC (cpu) [inum].idata;
|
|
}
|
|
|
|
static void
|
|
frv_init_cpu (SIM_CPU *cpu)
|
|
{
|
|
CPU_REG_FETCH (cpu) = frvbf_fetch_register;
|
|
CPU_REG_STORE (cpu) = frvbf_store_register;
|
|
CPU_PC_FETCH (cpu) = frvbf_h_pc_get;
|
|
CPU_PC_STORE (cpu) = frvbf_h_pc_set;
|
|
CPU_GET_IDATA (cpu) = frvbf_get_idata;
|
|
CPU_MAX_INSNS (cpu) = FRVBF_INSN__MAX;
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
|
CPU_FULL_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#if WITH_FAST
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_fast;
|
|
#else
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#endif
|
|
}
|
|
|
|
const SIM_MACH frv_mach =
|
|
{
|
|
"frv", "frv", MACH_FRV,
|
|
32, 32, & frv_models[0], & frvbf_imp_properties,
|
|
frv_init_cpu,
|
|
frvbf_prepare_run
|
|
};
|
|
|
|
static void
|
|
fr550_init_cpu (SIM_CPU *cpu)
|
|
{
|
|
CPU_REG_FETCH (cpu) = frvbf_fetch_register;
|
|
CPU_REG_STORE (cpu) = frvbf_store_register;
|
|
CPU_PC_FETCH (cpu) = frvbf_h_pc_get;
|
|
CPU_PC_STORE (cpu) = frvbf_h_pc_set;
|
|
CPU_GET_IDATA (cpu) = frvbf_get_idata;
|
|
CPU_MAX_INSNS (cpu) = FRVBF_INSN__MAX;
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
|
CPU_FULL_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#if WITH_FAST
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_fast;
|
|
#else
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#endif
|
|
}
|
|
|
|
const SIM_MACH fr550_mach =
|
|
{
|
|
"fr550", "fr550", MACH_FR550,
|
|
32, 32, & fr550_models[0], & frvbf_imp_properties,
|
|
fr550_init_cpu,
|
|
frvbf_prepare_run
|
|
};
|
|
|
|
static void
|
|
fr500_init_cpu (SIM_CPU *cpu)
|
|
{
|
|
CPU_REG_FETCH (cpu) = frvbf_fetch_register;
|
|
CPU_REG_STORE (cpu) = frvbf_store_register;
|
|
CPU_PC_FETCH (cpu) = frvbf_h_pc_get;
|
|
CPU_PC_STORE (cpu) = frvbf_h_pc_set;
|
|
CPU_GET_IDATA (cpu) = frvbf_get_idata;
|
|
CPU_MAX_INSNS (cpu) = FRVBF_INSN__MAX;
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
|
CPU_FULL_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#if WITH_FAST
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_fast;
|
|
#else
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#endif
|
|
}
|
|
|
|
const SIM_MACH fr500_mach =
|
|
{
|
|
"fr500", "fr500", MACH_FR500,
|
|
32, 32, & fr500_models[0], & frvbf_imp_properties,
|
|
fr500_init_cpu,
|
|
frvbf_prepare_run
|
|
};
|
|
|
|
static void
|
|
tomcat_init_cpu (SIM_CPU *cpu)
|
|
{
|
|
CPU_REG_FETCH (cpu) = frvbf_fetch_register;
|
|
CPU_REG_STORE (cpu) = frvbf_store_register;
|
|
CPU_PC_FETCH (cpu) = frvbf_h_pc_get;
|
|
CPU_PC_STORE (cpu) = frvbf_h_pc_set;
|
|
CPU_GET_IDATA (cpu) = frvbf_get_idata;
|
|
CPU_MAX_INSNS (cpu) = FRVBF_INSN__MAX;
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
|
CPU_FULL_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#if WITH_FAST
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_fast;
|
|
#else
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#endif
|
|
}
|
|
|
|
const SIM_MACH tomcat_mach =
|
|
{
|
|
"tomcat", "tomcat", MACH_TOMCAT,
|
|
32, 32, & tomcat_models[0], & frvbf_imp_properties,
|
|
tomcat_init_cpu,
|
|
frvbf_prepare_run
|
|
};
|
|
|
|
static void
|
|
fr400_init_cpu (SIM_CPU *cpu)
|
|
{
|
|
CPU_REG_FETCH (cpu) = frvbf_fetch_register;
|
|
CPU_REG_STORE (cpu) = frvbf_store_register;
|
|
CPU_PC_FETCH (cpu) = frvbf_h_pc_get;
|
|
CPU_PC_STORE (cpu) = frvbf_h_pc_set;
|
|
CPU_GET_IDATA (cpu) = frvbf_get_idata;
|
|
CPU_MAX_INSNS (cpu) = FRVBF_INSN__MAX;
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
|
CPU_FULL_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#if WITH_FAST
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_fast;
|
|
#else
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#endif
|
|
}
|
|
|
|
const SIM_MACH fr400_mach =
|
|
{
|
|
"fr400", "fr400", MACH_FR400,
|
|
32, 32, & fr400_models[0], & frvbf_imp_properties,
|
|
fr400_init_cpu,
|
|
frvbf_prepare_run
|
|
};
|
|
|
|
static void
|
|
fr450_init_cpu (SIM_CPU *cpu)
|
|
{
|
|
CPU_REG_FETCH (cpu) = frvbf_fetch_register;
|
|
CPU_REG_STORE (cpu) = frvbf_store_register;
|
|
CPU_PC_FETCH (cpu) = frvbf_h_pc_get;
|
|
CPU_PC_STORE (cpu) = frvbf_h_pc_set;
|
|
CPU_GET_IDATA (cpu) = frvbf_get_idata;
|
|
CPU_MAX_INSNS (cpu) = FRVBF_INSN__MAX;
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
|
CPU_FULL_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#if WITH_FAST
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_fast;
|
|
#else
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#endif
|
|
}
|
|
|
|
const SIM_MACH fr450_mach =
|
|
{
|
|
"fr450", "fr450", MACH_FR450,
|
|
32, 32, & fr450_models[0], & frvbf_imp_properties,
|
|
fr450_init_cpu,
|
|
frvbf_prepare_run
|
|
};
|
|
|
|
static void
|
|
simple_init_cpu (SIM_CPU *cpu)
|
|
{
|
|
CPU_REG_FETCH (cpu) = frvbf_fetch_register;
|
|
CPU_REG_STORE (cpu) = frvbf_store_register;
|
|
CPU_PC_FETCH (cpu) = frvbf_h_pc_get;
|
|
CPU_PC_STORE (cpu) = frvbf_h_pc_set;
|
|
CPU_GET_IDATA (cpu) = frvbf_get_idata;
|
|
CPU_MAX_INSNS (cpu) = FRVBF_INSN__MAX;
|
|
CPU_INSN_NAME (cpu) = cgen_insn_name;
|
|
CPU_FULL_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#if WITH_FAST
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_fast;
|
|
#else
|
|
CPU_FAST_ENGINE_FN (cpu) = frvbf_engine_run_full;
|
|
#endif
|
|
}
|
|
|
|
const SIM_MACH simple_mach =
|
|
{
|
|
"simple", "simple", MACH_SIMPLE,
|
|
32, 32, & simple_models[0], & frvbf_imp_properties,
|
|
simple_init_cpu,
|
|
frvbf_prepare_run
|
|
};
|
|
|