mirrors/binutils-gdb
1
0
Fork 0
mirror of https://sourceware.org/git/binutils-gdb.git synced 2024-11-24 02:24:46 +08:00
Code Issues Actions Packages Projects Releases Wiki Activity
1e85b8e9ec
binutils-gdb/bfd/elf32-s12z.c
Alan Modra 0a1b45a20e Use bool in bfd 
* sysdep.h: POISON_BFD_BOOLEAN: Define.
	* aix5ppc-core.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h,
	* aoutx.h, * arc-got.h, * archive.c, * archive64.c, * archures.c,
	* bfd-in.h, * bfd.c, * bfdwin.c, * binary.c, * cache.c,
	* coff-alpha.c, * coff-arm.c, * coff-arm.h, * coff-bfd.c,
	* coff-bfd.h, * coff-go32.c, * coff-i386.c, * coff-ia64.c,
	* coff-mcore.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c,
	* coff-stgo32.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c,
	* coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c,
	* coffcode.h, * coffgen.c, * cofflink.c, * compress.c,
	* corefile.c, * cpu-aarch64.c, * cpu-aarch64.h, * cpu-alpha.c,
	* cpu-arc.c, * cpu-arm.c, * cpu-arm.h, * cpu-avr.c, * cpu-bfin.c,
	* cpu-bpf.c, * cpu-cr16.c, * cpu-cris.c, * cpu-crx.c,
	* cpu-csky.c, * cpu-d10v.c, * cpu-d30v.c, * cpu-dlx.c,
	* cpu-epiphany.c, * cpu-fr30.c, * cpu-frv.c, * cpu-ft32.c,
	* cpu-h8300.c, * cpu-hppa.c, * cpu-i386.c, * cpu-ia64.c,
	* cpu-iamcu.c, * cpu-ip2k.c, * cpu-iq2000.c, * cpu-k1om.c,
	* cpu-l1om.c, * cpu-lm32.c, * cpu-m10200.c, * cpu-m10300.c,
	* cpu-m32c.c, * cpu-m32r.c, * cpu-m68hc11.c, * cpu-m68hc12.c,
	* cpu-m68k.c, * cpu-m9s12x.c, * cpu-m9s12xg.c, * cpu-mcore.c,
	* cpu-mep.c, * cpu-metag.c, * cpu-microblaze.c, * cpu-mips.c,
	* cpu-mmix.c, * cpu-moxie.c, * cpu-msp430.c, * cpu-mt.c,
	* cpu-nds32.c, * cpu-nfp.c, * cpu-nios2.c, * cpu-ns32k.c,
	* cpu-or1k.c, * cpu-pdp11.c, * cpu-pj.c, * cpu-powerpc.c,
	* cpu-pru.c, * cpu-riscv.c, * cpu-rl78.c, * cpu-rs6000.c,
	* cpu-rx.c, * cpu-s12z.c, * cpu-s390.c, * cpu-score.c,
	* cpu-sh.c, * cpu-sparc.c, * cpu-spu.c, * cpu-tic30.c,
	* cpu-tic4x.c, * cpu-tic54x.c, * cpu-tic6x.c, * cpu-tilegx.c,
	* cpu-tilepro.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-vax.c,
	* cpu-visium.c, * cpu-wasm32.c, * cpu-xc16x.c, * cpu-xgate.c,
	* cpu-xstormy16.c, * cpu-xtensa.c, * cpu-z80.c, * cpu-z8k.c,
	* dwarf1.c, * dwarf2.c, * ecoff-bfd.h, * ecoff.c, * ecofflink.c,
	* elf-attrs.c, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h,
	* elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-nacl.c,
	* elf-nacl.h, * elf-properties.c, * elf-s390-common.c,
	* elf-s390.h, * elf-strtab.c, * elf-vxworks.c, * elf-vxworks.h,
	* elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c,
	* elf32-arm.h, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c,
	* elf32-bfin.h, * elf32-cr16.c, * elf32-cr16.h, * elf32-cris.c,
	* elf32-crx.c, * elf32-csky.c, * elf32-csky.h, * elf32-d10v.c,
	* elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
	* elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c,
	* elf32-h8300.c, * elf32-hppa.c, * elf32-hppa.h, * elf32-i386.c,
	* elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c,
	* elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
	* elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c,
	* elf32-m68k.h, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c,
	* elf32-metag.h, * elf32-microblaze.c, * elf32-mips.c,
	* elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c,
	* elf32-nios2.c, * elf32-nios2.h, * elf32-or1k.c, * elf32-pj.c,
	* elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s12z.c, * elf32-s390.c, * elf32-score.c,
	* elf32-score.h, * elf32-score7.c, * elf32-sh-relocs.h,
	* elf32-sh.c, * elf32-sparc.c, * elf32-spu.c, * elf32-spu.h,
	* elf32-tic6x.c, * elf32-tic6x.h, * elf32-tilegx.c,
	* elf32-tilepro.c, * elf32-v850.c, * elf32-v850.h,
	* elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c,
	* elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c,
	* elf32-xtensa.c, * elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c,
	* elf64-gen.c, * elf64-hppa.c, * elf64-ia64-vms.c,
	* elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c,
	* elf64-ppc.h, * elf64-s390.c, * elf64-sparc.c,
	* elf64-tilegx.c, * elf64-x86-64.c, * elfcode.h,
	* elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c,
	* elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c,
	* elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h,
	* elfxx-mips.c, * elfxx-mips.h, * elfxx-riscv.c, * elfxx-riscv.h,
	* elfxx-sparc.c, * elfxx-sparc.h, * elfxx-target.h,
	* elfxx-tilegx.c, * elfxx-tilegx.h, * elfxx-x86.c, * elfxx-x86.h,
	* format.c, * genlink.h, * hash.c, * i386aout.c, * i386lynx.c,
	* i386msdos.c, * ihex.c, * libaout.h, * libbfd-in.h,
	* libbfd.c, * libcoff-in.h, * libecoff.h, * libpei.h,
	* libxcoff.h, * linker.c, * mach-o-aarch64.c, * mach-o-arm.c,
	* mach-o-i386.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h,
	* merge.c, * mmo.c, * netbsd.h, * opncls.c, * pc532-mach.c,
	* pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-sh.c,
	* pe-x86_64.c, * peXXigen.c, * pef.c, * pei-arm.c, * pei-i386.c,
	* pei-ia64.c, * pei-mcore.c, * pei-sh.c, * pei-x86_64.c,
	* peicode.h, * plugin.c, * plugin.h, * ppcboot.c, * reloc.c,
	* reloc16.c, * rs6000-core.c, * section.c, * simple.c, * som.c,
	* som.h, * srec.c, * stabs.c, * syms.c, * targets.c, * tekhex.c,
	* verilog.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * vms.h,
	* wasm-module.c, * xcofflink.c, * xcofflink.h, * xsym.c,
	* xsym.h: Replace bfd_boolean with bool, FALSE with false, and
	TRUE with true throughout.
	* bfd-in2.h: Regenerate.
	* libbfd.h: Regenerate.
	* libcoff.h: Regenerate.
2021-03-31 10:49:23 +10:30

326 lines
9.9 KiB
C
Raw Blame History

/* Freescale S12Z-specific support for 32-bit ELF
Copyright (C) 1999-2021 Free Software Foundation, Inc.
(Heavily copied from the D10V port by Martin Hunt (hunt@cygnus.com))
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
MA 02110-1301, USA. */
#include "sysdep.h"
#include "bfd.h"
#include "bfdlink.h"
#include "libbfd.h"
#include "elf-bfd.h"
#include "elf/s12z.h"
/* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
#define OCTETS_PER_BYTE(ABFD, SEC) 1
/* Relocation functions. */
static reloc_howto_type *bfd_elf32_bfd_reloc_type_lookup
(bfd *, bfd_reloc_code_real_type);
static bool s12z_info_to_howto_rel
(bfd *, arelent *, Elf_Internal_Rela *);
static bfd_reloc_status_type
opru18_reloc (bfd *abfd, arelent *reloc_entry, struct bfd_symbol *symbol,
void *data, asection *input_section ATTRIBUTE_UNUSED,
bfd *output ATTRIBUTE_UNUSED, char **msg ATTRIBUTE_UNUSED)
{
/* This reloc is used for 18 bit General Operand Addressing Postbyte in the
INST opru18 form. This is an 18 bit reloc, but the most significant bit
is shifted one place to the left of where it would normally be. See
Appendix A.4 of the S12Z reference manual. */
bfd_size_type octets = (reloc_entry->address
* OCTETS_PER_BYTE (abfd, input_section));
bfd_vma result = bfd_get_24 (abfd, (unsigned char *) data + octets);
bfd_vma val = bfd_asymbol_value (symbol);
/* Keep the wanted bits and discard the rest. */
result &= 0xFA0000;
val += symbol->section->output_section->vma;
val += symbol->section->output_offset;
/* The lowest 17 bits are copied verbatim. */
result |= val & 0x1FFFF;
/* The 18th bit is put into the 19th position. */
result |= (val & 0x020000) << 1;
bfd_put_24 (abfd, result, (unsigned char *) data + octets);
return bfd_reloc_ok;
}
static bfd_reloc_status_type
shift_addend_reloc (bfd *abfd, arelent *reloc_entry, struct bfd_symbol *symbol ATTRIBUTE_UNUSED,
void *data ATTRIBUTE_UNUSED, asection *input_section ATTRIBUTE_UNUSED,
bfd *output ATTRIBUTE_UNUSED, char **msg ATTRIBUTE_UNUSED)
{
/* This is a really peculiar reloc, which is done for compatibility
with the Freescale toolchain.
That toolchain appears to (ab)use the lowest 15 bits of the addend for
the purpose of holding flags. The purpose of these flags are unknown.
So in this function, when writing the bfd we left shift the addend by
15, and when reading we right shift it by 15 (discarding the lower bits).
This allows the linker to work with object files generated by Freescale,
as well as by Gas. */
if (abfd->is_linker_input)
reloc_entry->addend >>= 15;
else
reloc_entry->addend <<= 15;
return bfd_reloc_continue;
}
#define USE_REL 0
static reloc_howto_type elf_s12z_howto_table[] =
{
/* This reloc does nothing. */
HOWTO (R_S12Z_NONE, /* type */
0, /* rightshift */
3, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_S12Z_NONE", /* name */
false, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
false), /* pcrel_offset */
/* A 24 bit absolute relocation emitted by the OPR mode operands */
HOWTO (R_S12Z_OPR, /* type */
0, /* rightshift */
5, /* size (0 = byte, 1 = short, 2 = long) */
24, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
shift_addend_reloc,
"R_S12Z_OPR", /* name */
false, /* partial_inplace */
0x00ffffff, /* src_mask */
0x00ffffff, /* dst_mask */
false), /* pcrel_offset */
/* The purpose of this reloc is not known */
HOWTO (R_S12Z_UKNWN_2, /* type */
0, /* rightshift */
3, /* size (0 = byte, 1 = short, 2 = long) */
0, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_dont,/* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_S12Z_UKNWN_2", /* name */
false, /* partial_inplace */
0, /* src_mask */
0, /* dst_mask */
false), /* pcrel_offset */
/* A 15 bit PC-rel relocation */
HOWTO (R_S12Z_PCREL_7_15, /* type */
0, /* rightshift */
1, /* size (0 = byte, 1 = short, 2 = long) */
15, /* bitsize */
true, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
shift_addend_reloc,
"R_S12Z_PCREL_7_15", /* name */
false, /* partial_inplace */
0x00, /* src_mask */
0x007fff, /* dst_mask */
true), /* pcrel_offset */
/* A 24 bit absolute relocation emitted by EXT24 mode operands */
HOWTO (R_S12Z_EXT24, /* type */
0, /* rightshift */
5, /* size (0 = byte, 1 = short, 2 = long) */
24, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_S12Z_EXT24", /* name */
false, /* partial_inplace */
0x00000000, /* src_mask */
0x00ffffff, /* dst_mask */
false), /* pcrel_offset */
/* An 18 bit absolute relocation */
HOWTO (R_S12Z_EXT18, /* type */
0, /* rightshift */
5, /* size (0 = byte, 1 = short, 2 = long) */
18, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
opru18_reloc, /* special_function */
"R_S12Z_EXT18", /* name */
false, /* partial_inplace */
0x00000000, /* src_mask */
0x0005ffff, /* dst_mask */
false), /* pcrel_offset */
/* A 32 bit absolute relocation. This kind of relocation is
schizophrenic - Although they appear in sections named .rela.debug.*
in some sections they behave as RELA relocs, but in others they have
an added of zero and behave as REL.
It is not recommended that new code emits this reloc. It is here
only to support existing elf files generated by third party
applications. */
HOWTO (R_S12Z_CW32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_S12Z_CW32", /* name */
false, /* partial_inplace */
0xffffffff, /* src_mask */
0xffffffff, /* dst_mask */
false), /* pcrel_offset */
/* A 32 bit absolute relocation */
HOWTO (R_S12Z_EXT32, /* type */
0, /* rightshift */
2, /* size (0 = byte, 1 = short, 2 = long) */
32, /* bitsize */
false, /* pc_relative */
0, /* bitpos */
complain_overflow_bitfield, /* complain_on_overflow */
bfd_elf_generic_reloc, /* special_function */
"R_S12Z_EXT32", /* name */
false, /* partial_inplace */
0x00000000, /* src_mask */
0xffffffff, /* dst_mask */
false), /* pcrel_offset */
};
/* Map BFD reloc types to S12Z ELF reloc types. */
struct s12z_reloc_map
{
bfd_reloc_code_real_type bfd_reloc_val;
unsigned char elf_reloc_val;
};
static const struct s12z_reloc_map s12z_reloc_map[] =
{
/* bfd reloc val */ /* elf reloc val */
{BFD_RELOC_NONE, R_S12Z_NONE},
{BFD_RELOC_32, R_S12Z_EXT32},
{BFD_RELOC_24, R_S12Z_EXT24},
{BFD_RELOC_16_PCREL, R_S12Z_PCREL_7_15},
{BFD_RELOC_S12Z_OPR, R_S12Z_OPR}
};
static reloc_howto_type *
bfd_elf32_bfd_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED,
bfd_reloc_code_real_type code)
{
unsigned int i;
for (i = 0;
i < sizeof (s12z_reloc_map) / sizeof (struct s12z_reloc_map);
i++)
{
if (s12z_reloc_map[i].bfd_reloc_val == code)
{
return &elf_s12z_howto_table[s12z_reloc_map[i].elf_reloc_val];
}
}
printf ("%s:%d Not found type %d\n", __FILE__, __LINE__, code);
return NULL;
}
static reloc_howto_type *
bfd_elf32_bfd_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED,
const char *r_name)
{
unsigned int i;
for (i = 0;
i < (sizeof (elf_s12z_howto_table)
/ sizeof (elf_s12z_howto_table[0]));
i++)
if (elf_s12z_howto_table[i].name != NULL
&& strcasecmp (elf_s12z_howto_table[i].name, r_name) == 0)
return &elf_s12z_howto_table[i];
return NULL;
}
/* Set the howto pointer for an S12Z ELF reloc. */
static bool
s12z_info_to_howto_rel (bfd *abfd,
arelent *cache_ptr, Elf_Internal_Rela *dst)
{
unsigned int r_type = ELF32_R_TYPE (dst->r_info);
if (r_type >= (unsigned int) R_S12Z_max)
{
/* xgettext:c-format */
_bfd_error_handler (_("%pB: unsupported relocation type %#x"),
abfd, r_type);
bfd_set_error (bfd_error_bad_value);
return false;
}
cache_ptr->howto = &elf_s12z_howto_table[r_type];
return true;
}
static bool
s12z_elf_set_mach_from_flags (bfd *abfd)
{
bfd_default_set_arch_mach (abfd, bfd_arch_s12z, 0);
return true;
}
#define ELF_ARCH bfd_arch_s12z
#define ELF_MACHINE_CODE EM_S12Z
#define ELF_MAXPAGESIZE 0x1000
#define TARGET_BIG_SYM s12z_elf32_vec
#define TARGET_BIG_NAME "elf32-s12z"
#define elf_info_to_howto NULL
#define elf_info_to_howto_rel s12z_info_to_howto_rel
#define elf_backend_object_p s12z_elf_set_mach_from_flags
#include "elf32-target.h"
Reference in New Issue View Git Blame Copy Permalink