binutils-gdb/cpu
Alan Modra 78933a4ad9 Use bool in opcodes
cpu/
	* frv.opc: Replace bfd_boolean with bool, FALSE with false, and
	TRUE with true throughout.
opcodes/
	* sysdep.h (POISON_BFD_BOOLEAN): Define.
	* aarch64-asm-2.c, * aarch64-asm.c, * aarch64-asm.h,
	* aarch64-dis-2.c, * aarch64-dis.c, * aarch64-dis.h,
	* aarch64-gen.c, * aarch64-opc.c, * aarch64-opc.h, * arc-dis.c,
	* arc-dis.h, * arc-fxi.h, * arc-opc.c, * arm-dis.c, * bfin-dis.c,
	* cris-dis.c, * csky-dis.c, * csky-opc.h, * dis-buf.c,
	* disassemble.c, * frv-opc.c, * frv-opc.h, * h8300-dis.c,
	* i386-dis.c, * m68k-dis.c, * metag-dis.c, * microblaze-dis.c,
	* microblaze-dis.h, * micromips-opc.c, * mips-dis.c,
	* mips-formats.h, * mips-opc.c, * mips16-opc.c, * mmix-dis.c,
	* msp430-dis.c, * nds32-dis.c, * nfp-dis.c, * nios2-dis.c,
	* ppc-dis.c, * riscv-dis.c, * score-dis.c, * score7-dis.c,
	* tic6x-dis.c, * v850-dis.c, * vax-dis.c, * wasm32-dis.c,
	* xtensa-dis.c: Replace bfd_boolean with bool, FALSE with false,
	and TRUE with true throughout.
2021-03-31 10:49:23 +10:30
..
bpf.cpu bpf: xBPF SDIV, SMOD instructions 2020-09-18 10:04:23 -07:00
bpf.opc cpu,gas,opcodes: remove no longer needed workaround from the BPF port 2020-06-04 16:17:42 +02:00
ChangeLog Use bool in opcodes 2021-03-31 10:49:23 +10:30
cris.cpu
epiphany.cpu Remove more shifts for sign/zero extension 2019-12-11 21:14:19 +10:30
epiphany.opc epiphany/disassembler: Improve alignment of output. 2016-02-02 11:09:17 +00:00
fr30.cpu ubsan: fr30: left shift of negative value 2020-01-13 12:12:05 +10:30
fr30.opc
frv.cpu ubsan: frv: left shift of negative value 2020-02-01 23:23:18 +10:30
frv.opc Use bool in opcodes 2021-03-31 10:49:23 +10:30
ip2k.cpu
ip2k.opc
iq10.cpu
iq2000.cpu ubsan: iq2000: left shift of negative value 2019-12-23 18:04:12 +10:30
iq2000.opc
iq2000m.cpu
lm32.cpu Remove more shifts for sign/zero extension 2019-12-11 21:14:19 +10:30
lm32.opc
m32c.cpu ubsan: m32c: left shift of negative value 2020-02-03 15:59:08 +10:30
m32c.opc
m32r.cpu Fix spelling mistakes 2020-10-05 14:20:15 +01:00
m32r.opc
mep-avc2.cpu
mep-avc.cpu
mep-c5.cpu
mep-core.cpu mep: ubsan: mep-ibld.c:1635,1645,1652 left shift of negative value 2020-09-01 16:03:08 +09:30
mep-default.cpu
mep-ext-cop.cpu
mep-fmax.cpu
mep-h1.cpu
mep-ivc2.cpu
mep-rhcop.cpu
mep-sample-ucidsp.cpu
mep.cpu
mep.opc opcodes: discriminate endianness and insn-endianness in CGEN ports 2020-06-04 16:17:42 +02:00
mt.cpu
mt.opc
or1k.cpu or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts 2020-05-19 20:40:27 +09:00
or1k.opc cpu/or1k: Add support for orfp64a32 spec 2019-06-13 06:16:18 +09:00
or1kcommon.cpu or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts 2020-05-19 20:40:27 +09:00
or1korbis.cpu ubsan: or1k: left shift of negative value 2019-12-20 17:57:58 +10:30
or1korfpx.cpu or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts 2020-05-19 20:40:27 +09:00
sh64-compact.cpu
sh64-media.cpu
sh.cpu
sh.opc
simplify.inc
xc16x.cpu
xc16x.opc
xstormy16.cpu ubsan: xstormy16: left shift of negative value 2019-12-16 17:35:13 +10:30
xstormy16.opc