mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-23 18:14:13 +08:00
b763d508db
Commit 6ff00b5e12 ("x86/Intel: correct permitted operand sizes for
AVX512 scatter/gather") brought the assembler side of AVX512 S/G insn
handling in line with AVX2's, but the disassembler side was forgotten.
This has the benefit of
- allowing to fold a number of table entries,
- rendering a few #define-s and enumerators unused.
149 lines
2.8 KiB
C
149 lines
2.8 KiB
C
static const struct dis386 evex_len_table[][3] = {
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/* EVEX_LEN_0F3816 */
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{
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{ Bad_Opcode },
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{ "vpermp%XW", { XM, Vex, EXx }, PREFIX_DATA },
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{ "vpermp%XW", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_LEN_0F3819 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3819_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3819_L_n) },
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},
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/* EVEX_LEN_0F381A_M_0 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F381A_M_0_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F381A_M_0_L_n) },
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},
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/* EVEX_LEN_0F381B_M_0 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F381B_M_0_L_2) },
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},
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/* EVEX_LEN_0F3836 */
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{
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{ Bad_Opcode },
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{ "vperm%DQ", { XM, Vex, EXx }, PREFIX_DATA },
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{ "vperm%DQ", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_LEN_0F385A_M_0 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F385A_M_0_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F385A_M_0_L_n) },
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},
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/* EVEX_LEN_0F385B_M_0 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F385B_M_0_L_2) },
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},
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/* EVEX_LEN_0F38C6_M_0 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ REG_TABLE (REG_EVEX_0F38C6_M_0_L_2) },
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},
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/* EVEX_LEN_0F38C7_M_0 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ REG_TABLE (REG_EVEX_0F38C7_M_0_L_2) },
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},
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/* EVEX_LEN_0F3A00 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (VEX_W_0F3A00_L_1) },
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{ VEX_W_TABLE (VEX_W_0F3A00_L_1) },
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},
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/* EVEX_LEN_0F3A01 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (VEX_W_0F3A01_L_1) },
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{ VEX_W_TABLE (VEX_W_0F3A01_L_1) },
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},
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/* EVEX_LEN_0F3A18 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A18_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3A18_L_n) },
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},
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/* EVEX_LEN_0F3A19 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A19_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3A19_L_n) },
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},
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/* EVEX_LEN_0F3A1A */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A1A_L_2) },
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},
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/* EVEX_LEN_0F3A1B */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A1B_L_2) },
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},
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/* EVEX_LEN_0F3A23 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A23_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3A23_L_n) },
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},
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/* EVEX_LEN_0F3A38 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A38_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3A38_L_n) },
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},
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/* EVEX_LEN_0F3A39 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A39_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3A39_L_n) },
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},
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/* EVEX_LEN_0F3A3A */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A3A_L_2) },
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},
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/* EVEX_LEN_0F3A3B */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A3B_L_2) },
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},
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/* EVEX_LEN_0F3A43 */
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{
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F3A43_L_n) },
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{ VEX_W_TABLE (EVEX_W_0F3A43_L_n) },
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},
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};
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