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0c115f8483
More nonsense fixing "bugs" with left shifts of signed values. Yes, the C standard does say this is undefined (and right shifts of signed values are implementation defined BTW) but in practice there is no problem with current machines. 1's complement is a thing of the past. cpu/ * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting. (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise. (f-dst32-rn-prefixed-QI): Likewise. (f-dsp-32-s32): Mask before shifting left. (f-dsp-48-u32, f-dsp-48-s32): Likewise. (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than shifting left. (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise. (h-gr-SI): Mask before shifting. opcodes/ * m32c-ibld.c: Regenerate.
327 lines
9.3 KiB
Plaintext
327 lines
9.3 KiB
Plaintext
2020-01-30 Alan Modra <amodra@gmail.com>
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* m32c-ibld.c: Regenerate.
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2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
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* bpf-opc.c: Regenerate.
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2020-01-30 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (X86_64_C2, X86_64_C3): New enumerators.
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(dis386): Use them to replace C2/C3 table entries.
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(x86_64_table): Add X86_64_C2 and X86_64_C3 entries.
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* i386-opc.tbl (ret): Split Cpu64 entries into AMD64 and Intel64
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ones. Use Size64 instead of DefaultSize on Intel64 ones.
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* i386-tbl.h: Re-generate.
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2020-01-30 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (call): Drop DefaultSize from Intel64 JumpDword
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forms.
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(fldenv, fnstenv, fstenv, fnsave, fsave, frstor): Drop
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DefaultSize.
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* i386-tbl.h: Re-generate.
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2020-01-30 Alan Modra <amodra@gmail.com>
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* tic4x-dis.c (tic4x_dp): Make unsigned.
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2020-01-27 H.J. Lu <hongjiu.lu@intel.com>
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Jan Beulich <jbeulich@suse.com>
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PR binutils/25445
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* i386-dis.c (MOVSXD_Fixup): New function.
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(movsxd_mode): New enum.
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(x86_64_table): Use MOVSXD_Fixup and movsxd_mode on movsxd.
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(intel_operand_size): Handle movsxd_mode.
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(OP_E_register): Likewise.
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(OP_G): Likewise.
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* i386-opc.tbl: Remove Rex64 and allow 32-bit destination
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register on movsxd. Add movsxd with 16-bit destination register
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for AMD64 and Intel64 ISAs.
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* i386-tbl.h: Regenerated.
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2020-01-27 Tamar Christina <tamar.christina@arm.com>
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PR 25403
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* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
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* aarch64-asm-2.c: Regenerate
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* aarch64-dis-2.c: Likewise.
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* aarch64-opc-2.c: Likewise.
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2020-01-21 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (sysret): Drop DefaultSize.
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* i386-tbl.h: Re-generate.
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2020-01-21 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
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Dword.
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(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
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* i386-tbl.h: Re-generate.
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2020-01-20 Nick Clifton <nickc@redhat.com>
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* po/de.po: Updated German translation.
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* po/pt_BR.po: Updated Brazilian Portuguese translation.
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* po/uk.po: Updated Ukranian translation.
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2020-01-20 Alan Modra <amodra@gmail.com>
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* hppa-dis.c (fput_const): Remove useless cast.
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2020-01-20 Alan Modra <amodra@gmail.com>
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* arm-dis.c (print_insn_arm): Wrap 'T' value.
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2020-01-18 Nick Clifton <nickc@redhat.com>
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* configure: Regenerate.
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* po/opcodes.pot: Regenerate.
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2020-01-18 Nick Clifton <nickc@redhat.com>
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Binutils 2.34 branch created.
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2020-01-17 Christian Biesinger <cbiesinger@google.com>
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* opintl.h: Fix spelling error (seperate).
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2020-01-17 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.tbl: Add {vex} pseudo prefix.
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* i386-tbl.h: Regenerated.
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2020-01-16 Andre Vieira <andre.simoesdiasvieira@arm.com>
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PR 25376
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* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
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(neon_opcodes): Likewise.
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(select_arm_features): Make sure we enable MVE bits when selecting
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armv8.1-m.main. Make sure we do not enable MVE bits when not selecting
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any architecture.
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2020-01-16 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl: Drop stale comment from XOP section.
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2020-01-16 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
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(extractps): Add VexWIG to SSE2AVX forms.
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* i386-tbl.h: Re-generate.
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2020-01-16 Jan Beulich <jbeulich@suse.com>
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* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
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Size64 from and use VexW1 on SSE2AVX forms.
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(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
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VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
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* i386-tbl.h: Re-generate.
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2020-01-15 Alan Modra <amodra@gmail.com>
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* tic4x-dis.c (tic4x_version): Make unsigned long.
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(optab, optab_special, registernames): New file scope vars.
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(tic4x_print_register): Set up registernames rather than
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malloc'd registertable.
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(tic4x_disassemble): Delete optable and optable_special. Use
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optab and optab_special instead. Throw away old optab,
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optab_special and registernames when info->mach changes.
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2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
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PR 25377
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* z80-dis.c (suffix): Use .db instruction to generate double
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prefix.
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2020-01-14 Alan Modra <amodra@gmail.com>
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* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
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values to unsigned before shifting.
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2020-01-13 Thomas Troeger <tstroege@gmx.de>
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* arm-dis.c (print_insn_arm): Fill in insn info fields for control
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flow instructions.
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(print_insn_thumb16, print_insn_thumb32): Likewise.
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(print_insn): Initialize the insn info.
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* i386-dis.c (print_insn): Initialize the insn info fields, and
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detect jumps.
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2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
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* arc-opc.c (C_NE): Make it required.
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2012-01-13 Claudiu Zissulescu <claziss@gmail.com>
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* opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
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reserved register name.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
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(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* wasm32-dis.c (print_insn_wasm32): Localise variables. Store
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result of wasm_read_leb128 in a uint64_t and check that bits
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are not lost when copying to other locals. Use uint32_t for
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most locals. Use PRId64 when printing int64_t.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* score-dis.c: Formatting.
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* score7-dis.c: Formatting.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* score-dis.c (print_insn_score48): Use unsigned variables for
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unsigned values. Don't left shift negative values.
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(print_insn_score32): Likewise.
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* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* tic4x-dis.c (tic4x_print_register): Remove dead code.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* fr30-ibld.c: Regenerate.
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2020-01-13 Alan Modra <amodra@gmail.com>
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* xgate-dis.c (print_insn): Don't left shift signed value.
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(ripBits): Formatting, use 1u.
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2020-01-10 Alan Modra <amodra@gmail.com>
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* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
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* tilegx-opc.c (parse_insn_tilegx): Likewise. Delete raw_opval.
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2020-01-10 Alan Modra <amodra@gmail.com>
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* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
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and XRREG value earlier to avoid a shift with negative exponent.
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* m10200-dis.c (disassemble): Similarly.
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2020-01-09 Nick Clifton <nickc@redhat.com>
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PR 25224
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* z80-dis.c (ld_ii_ii): Use correct cast.
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2020-01-03 Sergey Belyashov <sergey.belyashov@gmail.com>
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PR 25224
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* z80-dis.c (ld_ii_ii): Use character constant when checking
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opcode byte value.
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2020-01-09 Jan Beulich <jbeulich@suse.com>
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* i386-dis.c (SEP_Fixup): New.
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(SEP): Define.
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(dis386_twobyte): Use it for sysenter/sysexit.
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(enum x86_64_isa): Change amd64 enumerator to value 1.
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(OP_J): Compare isa64 against intel64 instead of amd64.
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* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
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forms.
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* i386-tbl.h: Re-generate.
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2020-01-08 Alan Modra <amodra@gmail.com>
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* z8k-dis.c: Include libiberty.h
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(instr_data_s): Make max_fetched unsigned.
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(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
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Don't exceed byte_info bounds.
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(output_instr): Make num_bytes unsigned.
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(unpack_instr): Likewise for nibl_count and loop.
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* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
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idx unsigned.
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* z8k-opc.h: Regenerate.
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2020-01-07 Shahab Vahedi <shahab@synopsys.com>
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* arc-tbl.h (llock): Use 'LLOCK' as class.
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(llockd): Likewise.
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(scond): Use 'SCOND' as class.
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(scondd): Likewise.
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(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
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(scondd): Likewise.
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2020-01-06 Alan Modra <amodra@gmail.com>
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* m32c-ibld.c: Regenerate.
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2020-01-06 Alan Modra <amodra@gmail.com>
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PR 25344
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* z80-dis.c (suffix): Don't use a local struct buffer copy.
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Peek at next byte to prevent recursion on repeated prefix bytes.
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Ensure uninitialised "mybuf" is not accessed.
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(print_insn_z80): Don't zero n_fetch and n_used here,..
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(print_insn_z80_buf): ..do it here instead.
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2020-01-04 Alan Modra <amodra@gmail.com>
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* m32r-ibld.c: Regenerate.
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2020-01-04 Alan Modra <amodra@gmail.com>
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* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
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2020-01-04 Alan Modra <amodra@gmail.com>
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* crx-dis.c (match_opcode): Avoid shift left of signed value.
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2020-01-04 Alan Modra <amodra@gmail.com>
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* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
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2020-01-03 Jan Beulich <jbeulich@suse.com>
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* aarch64-tbl.h (aarch64_opcode_table): Use
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SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
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2020-01-03 Jan Beulich <jbeulich@suse.com>
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* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
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forms of SUDOT and USDOT.
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2020-01-03 Jan Beulich <jbeulich@suse.com>
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* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
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uzip{1,2}.
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* opcodes/aarch64-dis-2.c: Re-generate.
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2020-01-03 Jan Beulich <jbeulich@suse.com>
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* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
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FMMLA encoding.
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* opcodes/aarch64-dis-2.c: Re-generate.
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2020-01-02 Sergey Belyashov <sergey.belyashov@gmail.com>
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* z80-dis.c: Add support for eZ80 and Z80 instructions.
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2020-01-01 Alan Modra <amodra@gmail.com>
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Update year range in copyright notice of all files.
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For older changes see ChangeLog-2019
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Copyright (C) 2020 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved.
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Local Variables:
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mode: change-log
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left-margin: 8
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fill-column: 74
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version-control: never
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End:
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