mirror of
https://sourceware.org/git/binutils-gdb.git
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873e7b6cf6
In disassembler part, for vnni instructions, we extended previous
VEX part using %XE in disassembler to promote them to EVEX by reusing
the original VEX table. For vmpsadbw, we will also use %XE. However,
it is hard to reuse the VEX table, so we are using new ones.
In assmbler part, we put the vnni table entries with previous vnni
instructions since they are just promotion from AVX-VNNI-INT{8,16}.
Since we will prefer VEX encoding, we need to use the different table
order in template <vnni>, which prefers EVEX due to earlier introduction
for AVX512_VNNI than AVX_VNNI. This means a new <vnni>. For vdpphps
and vmpsadbw, we put them at the end of the table, with future AVX10.2
instructions.
Nit: I will remove the arch requirement for avx_vnni_int{8,16} in
evex-promote testcases after AVX10.2 implies AVX-VNNI-INT{8,16}.
gas/Changelog:
* testsuite/gas/i386/i386.exp: Add AVX10.2 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/avx10_2-256-1-intel.d: New.
* testsuite/gas/i386/avx10_2-256-1.d: Ditto.
* testsuite/gas/i386/avx10_2-256-1.s: Ditto.
* testsuite/gas/i386/avx10_2-512-1-intel.d: Ditto.
* testsuite/gas/i386/avx10_2-512-1.d: Ditto.
* testsuite/gas/i386/avx10_2-512-1.s: Ditto.
* testsuite/gas/i386/avx10_2-promote.d: Ditto.
* testsuite/gas/i386/avx10_2-promote.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-1-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-1.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-256-1.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-1-intel.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-1.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-512-1.s: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-promote.d: Ditto.
* testsuite/gas/i386/x86-64-avx10_2-promote.s: Ditto.
opcodes/Changelog:
* i386-dis-evex-prefix.h: Adjust PREFIX_EVEX_0F3852.
Add PREFIX_EVEX_0F3A42_W_0.
* i386-dis-evex-w.h: Adjust EVEX_W_0F3A42.
* i386-dis-evex.h: Add table pass for AVX10.2
instructions.
* i386-dis.c: Adjust PREFIX_VEX_0F3850_W_0, PREFIX_VEX_0F3851_W_0,
PREFIX_VEX_0F38D2_W_0 and PREFIX_VEX_0F38D3_W_0.
* i386-opc.tbl: Add AVX10.2 instructions.
* i386-mnem.h: Regenerated.
* i386-tbl.h: Ditto.
Co-authored-by: Lili Cui <lili.cui@intel.com>
473 lines
10 KiB
C
473 lines
10 KiB
C
/* EVEX_W_0F5B_P_0 */
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{
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{ "%XEvcvtdq2ps", { XM, EXx, EXxEVexR }, 0 },
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{ "vcvtqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
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},
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/* EVEX_W_0F62 */
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{
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{ "%XEvpunpckldq", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F66 */
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{
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{ "vpcmpgtd", { MaskG, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F6A */
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{
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{ "%XEvpunpckhdq", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F6B */
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{
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{ "%XEvpackssdw", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F6C */
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{
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{ Bad_Opcode },
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{ "%XEvpunpcklqdq", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F6D */
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{
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{ Bad_Opcode },
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{ "%XEvpunpckhqdq", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F6F_P_1 */
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{
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{ "vmovdqu32", { XM, EXEvexXNoBcst }, 0 },
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{ "vmovdqu64", { XM, EXEvexXNoBcst }, 0 },
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},
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/* EVEX_W_0F6F_P_2 */
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{
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{ "vmovdqa32", { XM, EXEvexXNoBcst }, 0 },
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{ "vmovdqa64", { XM, EXEvexXNoBcst }, 0 },
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},
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/* EVEX_W_0F6F_P_3 */
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{
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{ "vmovdqu8", { XM, EXx }, 0 },
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{ "vmovdqu16", { XM, EXx }, 0 },
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},
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/* EVEX_W_0F70_P_2 */
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{
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{ "%XEvpshufd", { XM, EXx, Ib }, 0 },
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},
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/* EVEX_W_0F72_R_2 */
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{
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{ "%XEvpsrld", { Vex, EXx, Ib }, PREFIX_DATA },
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},
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/* EVEX_W_0F72_R_6 */
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{
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{ "%XEvpslld", { Vex, EXx, Ib }, PREFIX_DATA },
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},
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/* EVEX_W_0F73_R_2 */
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{
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{ Bad_Opcode },
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{ "%XEvpsrlq", { Vex, EXx, Ib }, PREFIX_DATA },
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},
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/* EVEX_W_0F73_R_6 */
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{
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{ Bad_Opcode },
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{ "%XEvpsllq", { Vex, EXx, Ib }, PREFIX_DATA },
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},
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/* EVEX_W_0F76 */
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{
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{ "vpcmpeqd", { MaskG, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F78_P_0 */
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{
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{ "vcvttps2udq", { XM, EXx, EXxEVexS }, 0 },
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{ "vcvttpd2udq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
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},
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/* EVEX_W_0F78_P_2 */
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{
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{ "vcvttps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
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{ "vcvttpd2uqq", { XM, EXx, EXxEVexS }, 0 },
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},
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/* EVEX_W_0F79_P_0 */
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{
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{ "vcvtps2udq", { XM, EXx, EXxEVexR }, 0 },
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{ "vcvtpd2udq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
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},
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/* EVEX_W_0F79_P_2 */
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{
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{ "vcvtps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
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{ "vcvtpd2uqq", { XM, EXx, EXxEVexR }, 0 },
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},
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/* EVEX_W_0F7A_P_1 */
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{
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{ "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
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{ "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 },
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},
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/* EVEX_W_0F7A_P_2 */
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{
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{ "vcvttps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
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{ "vcvttpd2qq", { XM, EXx, EXxEVexS }, 0 },
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},
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/* EVEX_W_0F7A_P_3 */
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{
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{ "vcvtudq2ps", { XM, EXx, EXxEVexR }, 0 },
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{ "vcvtuqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
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},
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/* EVEX_W_0F7B_P_2 */
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{
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{ "vcvtps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
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{ "vcvtpd2qq", { XM, EXx, EXxEVexR }, 0 },
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},
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/* EVEX_W_0F7E_P_1 */
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{
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{ Bad_Opcode },
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{ VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) },
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},
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/* EVEX_W_0F7F_P_1 */
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{
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{ "vmovdqu32", { EXxS, XM }, 0 },
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{ "vmovdqu64", { EXxS, XM }, 0 },
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},
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/* EVEX_W_0F7F_P_2 */
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{
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{ "vmovdqa32", { EXxS, XM }, 0 },
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{ "vmovdqa64", { EXxS, XM }, 0 },
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},
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/* EVEX_W_0F7F_P_3 */
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{
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{ "vmovdqu8", { EXxS, XM }, 0 },
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{ "vmovdqu16", { EXxS, XM }, 0 },
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},
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/* EVEX_W_0FD2 */
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{
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{ "%XEvpsrld", { XM, Vex, EXxmm }, PREFIX_DATA },
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},
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/* EVEX_W_0FD3 */
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{
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{ Bad_Opcode },
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{ "%XEvpsrlq", { XM, Vex, EXxmm }, PREFIX_DATA },
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},
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/* EVEX_W_0FD4 */
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{
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{ Bad_Opcode },
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{ "%XEvpaddq", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0FD6 */
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{
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{ Bad_Opcode },
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{ VEX_LEN_TABLE (VEX_LEN_0FD6) },
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},
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/* EVEX_W_0FE6_P_1 */
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{
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{ "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
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{ "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 },
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},
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/* EVEX_W_0FE7 */
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{
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{ "%XEvmovntdq", { Mx, XM }, PREFIX_DATA },
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},
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/* EVEX_W_0FF2 */
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{
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{ "%XEvpslld", { XM, Vex, EXxmm }, PREFIX_DATA },
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},
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/* EVEX_W_0FF3 */
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{
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{ Bad_Opcode },
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{ "%XEvpsllq", { XM, Vex, EXxmm }, PREFIX_DATA },
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},
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/* EVEX_W_0FF4 */
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{
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{ Bad_Opcode },
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{ "%XEvpmuludq", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0FFA */
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{
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{ "%XEvpsubd", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0FFB */
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{
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{ Bad_Opcode },
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{ "%XEvpsubq", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0FFE */
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{
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{ "%XEvpaddd", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F3810_P_1 */
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{
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{ "vpmovuswb", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3810_P_2 */
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{
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{ Bad_Opcode },
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{ "vpsrlvw", { XM, Vex, EXx }, 0 },
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},
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/* EVEX_W_0F3811_P_1 */
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{
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{ "vpmovusdb", { EXxmmqd, XM }, 0 },
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},
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/* EVEX_W_0F3811_P_2 */
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{
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{ Bad_Opcode },
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{ "vpsravw", { XM, Vex, EXx }, 0 },
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},
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/* EVEX_W_0F3812_P_1 */
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{
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{ "vpmovusqb", { EXxmmdw, XM }, 0 },
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},
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/* EVEX_W_0F3812_P_2 */
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{
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{ Bad_Opcode },
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{ "vpsllvw", { XM, Vex, EXx }, 0 },
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},
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/* EVEX_W_0F3813_P_1 */
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{
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{ "vpmovusdw", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3814_P_1 */
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{
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{ "vpmovusqw", { EXxmmqd, XM }, 0 },
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},
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/* EVEX_W_0F3815_P_1 */
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{
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{ "vpmovusqd", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3819_L_n */
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{
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{ "vbroadcastf32x2", { XM, EXq }, PREFIX_DATA },
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{ "%XEvbroadcastsd", { XM, EXq }, PREFIX_DATA },
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},
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/* EVEX_W_0F381A_L_n */
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{
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{ "vbroadcastf32x4", { XM, Mxmm }, PREFIX_DATA },
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{ "vbroadcastf64x2", { XM, Mxmm }, PREFIX_DATA },
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},
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/* EVEX_W_0F381B_L_2 */
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{
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{ "vbroadcastf32x8", { XM, Mymm }, PREFIX_DATA },
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{ "vbroadcastf64x4", { XM, Mymm }, PREFIX_DATA },
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},
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/* EVEX_W_0F381E */
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{
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{ "%XEvpabsd", { XM, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F381F */
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{
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{ Bad_Opcode },
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{ "vpabsq", { XM, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F3820_P_1 */
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{
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{ "vpmovswb", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3821_P_1 */
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{
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{ "vpmovsdb", { EXxmmqd, XM }, 0 },
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},
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/* EVEX_W_0F3822_P_1 */
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{
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{ "vpmovsqb", { EXxmmdw, XM }, 0 },
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},
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/* EVEX_W_0F3823_P_1 */
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{
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{ "vpmovsdw", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3824_P_1 */
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{
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{ "vpmovsqw", { EXxmmqd, XM }, 0 },
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},
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/* EVEX_W_0F3825_P_1 */
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{
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{ "vpmovsqd", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3825_P_2 */
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{
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{ "%XEvpmovsxdq", { XM, EXxmmq }, 0 },
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},
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/* EVEX_W_0F3828_P_2 */
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{
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{ Bad_Opcode },
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{ "%XEvpmuldq", { XM, Vex, EXx }, 0 },
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},
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/* EVEX_W_0F3829_P_2 */
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{
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{ Bad_Opcode },
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{ "vpcmpeqq", { MaskG, Vex, EXx }, 0 },
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},
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/* EVEX_W_0F382A_P_1 */
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{
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{ Bad_Opcode },
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{ "vpbroadcastmb2qY", { XM, MaskR }, 0 },
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},
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/* EVEX_W_0F382A_P_2 */
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{
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{ "%XEvmovntdqaY", { XM, Mx }, 0 },
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},
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/* EVEX_W_0F382B */
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{
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{ "%XEvpackusdw", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F3830_P_1 */
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{
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{ "vpmovwb", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3831_P_1 */
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{
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{ "vpmovdb", { EXxmmqd, XM }, 0 },
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},
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/* EVEX_W_0F3832_P_1 */
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{
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{ "vpmovqb", { EXxmmdw, XM }, 0 },
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},
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/* EVEX_W_0F3833_P_1 */
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{
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{ "vpmovdw", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3834_P_1 */
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{
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{ "vpmovqw", { EXxmmqd, XM }, 0 },
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},
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/* EVEX_W_0F3835_P_1 */
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{
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{ "vpmovqd", { EXxmmq, XM }, 0 },
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},
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/* EVEX_W_0F3835_P_2 */
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{
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{ "%XEvpmovzxdq", { XM, EXxmmq }, 0 },
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},
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/* EVEX_W_0F3837 */
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{
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{ Bad_Opcode },
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{ "vpcmpgtq", { MaskG, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F383A_P_1 */
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{
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{ "vpbroadcastmw2dY", { XM, MaskR }, 0 },
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},
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/* EVEX_W_0F3859 */
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{
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{ "vbroadcasti32x2", { XM, EXq }, PREFIX_DATA },
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{ "%XEvpbroadcastq", { XM, EXq }, PREFIX_DATA },
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},
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/* EVEX_W_0F385A_L_n */
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{
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{ "vbroadcasti32x4", { XM, Mxmm }, PREFIX_DATA },
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{ "vbroadcasti64x2", { XM, Mxmm }, PREFIX_DATA },
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},
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/* EVEX_W_0F385B_L_2 */
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{
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{ "vbroadcasti32x8", { XM, Mymm }, PREFIX_DATA },
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{ "vbroadcasti64x4", { XM, Mymm }, PREFIX_DATA },
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},
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/* EVEX_W_0F3870 */
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{
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{ Bad_Opcode },
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{ "vpshldvw", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F3872_P_2 */
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{
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{ Bad_Opcode },
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{ "vpshrdvw", { XM, Vex, EXx }, 0 },
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},
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/* EVEX_W_0F387A */
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{
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{ "vpbroadcastb", { XM, Rd }, PREFIX_DATA },
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},
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/* EVEX_W_0F387B */
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{
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{ "vpbroadcastw", { XM, Rd }, PREFIX_DATA },
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},
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/* EVEX_W_0F3883 */
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{
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{ Bad_Opcode },
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{ "vpmultishiftqb", { XM, Vex, EXx }, PREFIX_DATA },
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},
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/* EVEX_W_0F3A18_L_n */
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{
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{ "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
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{ "vinsertf64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
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},
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/* EVEX_W_0F3A19_L_n */
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{
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{ "vextractf32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
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{ "vextractf64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
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},
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/* EVEX_W_0F3A1A_L_2 */
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{
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{ "vinsertf32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
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{ "vinsertf64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
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},
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/* EVEX_W_0F3A1B_L_2 */
|
|
{
|
|
{ "vextractf32x8", { EXymm, XM, Ib }, PREFIX_DATA },
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{ "vextractf64x4", { EXymm, XM, Ib }, PREFIX_DATA },
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|
},
|
|
/* EVEX_W_0F3A21 */
|
|
{
|
|
{ VEX_LEN_TABLE (VEX_LEN_0F3A21) },
|
|
},
|
|
/* EVEX_W_0F3A23_L_n */
|
|
{
|
|
{ "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
|
|
{ "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
|
|
},
|
|
/* EVEX_W_0F3A38_L_n */
|
|
{
|
|
{ "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
|
|
{ "vinserti64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
|
|
},
|
|
/* EVEX_W_0F3A39_L_n */
|
|
{
|
|
{ "vextracti32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
|
|
{ "vextracti64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
|
|
},
|
|
/* EVEX_W_0F3A3A_L_2 */
|
|
{
|
|
{ "vinserti32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
|
|
{ "vinserti64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
|
|
},
|
|
/* EVEX_W_0F3A3B_L_2 */
|
|
{
|
|
{ "vextracti32x8", { EXymm, XM, Ib }, PREFIX_DATA },
|
|
{ "vextracti64x4", { EXymm, XM, Ib }, PREFIX_DATA },
|
|
},
|
|
/* EVEX_W_0F3A42 */
|
|
{
|
|
{ PREFIX_TABLE (PREFIX_EVEX_0F3A42_W_0) },
|
|
},
|
|
/* EVEX_W_0F3A43_L_n */
|
|
{
|
|
{ "vshufi32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
|
|
{ "vshufi64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
|
|
},
|
|
/* EVEX_W_0F3A70 */
|
|
{
|
|
{ Bad_Opcode },
|
|
{ "vpshldw", { XM, Vex, EXx, Ib }, 0 },
|
|
},
|
|
/* EVEX_W_0F3A72 */
|
|
{
|
|
{ Bad_Opcode },
|
|
{ "vpshrdw", { XM, Vex, EXx, Ib }, 0 },
|
|
},
|
|
/* EVEX_W_MAP4_8F_R_0 */
|
|
{
|
|
{ "pop2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
|
|
{ "pop2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, NO_PREFIX },
|
|
},
|
|
/* EVEX_W_MAP4_F8_P1_M_1 */
|
|
{
|
|
{ "uwrmsr", { Gq, Eq }, 0 },
|
|
},
|
|
/* EVEX_W_MAP4_F8_P3_M_1 */
|
|
{
|
|
{ "urdmsr", { Eq, Gq }, 0 },
|
|
},
|
|
/* EVEX_W_MAP4_FF_R_6 */
|
|
{
|
|
{ "push2", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
|
|
{ "push2p", { { PUSH2_POP2_Fixup, q_mode}, Eq }, 0 },
|
|
},
|
|
/* EVEX_W_MAP5_5B_P_0 */
|
|
{
|
|
{ "vcvtdq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
|
|
{ "vcvtqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
|
|
},
|
|
/* EVEX_W_MAP5_7A_P_3 */
|
|
{
|
|
{ "vcvtudq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
|
|
{ "vcvtuqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
|
|
},
|