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08a98d4c13
PPX functionality for PUSH/POP is not implemented in this patch
and will be implemented separately.
gas/ChangeLog:
2023-12-28 Zewei Mo <zewei.mo@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
Lili Cui <lili.cui@intel.com>
* config/tc-i386.c: (enum i386_error):
New unsupported_rsp_register and invalid_src_register_set.
(md_assemble): Add handler for unsupported_rsp_register and
invalid_src_register_set.
(check_APX_operands): Add invalid check for push2/pop2.
(match_template): Handle check_APX_operands.
* testsuite/gas/i386/i386.exp: Add apx-push2pop2 tests.
* testsuite/gas/i386/x86-64.exp: Ditto.
* testsuite/gas/i386/x86-64-apx-push2pop2.d: New test.
* testsuite/gas/i386/x86-64-apx-push2pop2.s: Ditto.
* testsuite/gas/i386/x86-64-apx-push2pop2-intel.d: Ditto.
* testsuite/gas/i386/x86-64-apx-push2pop2-inval.l: Ditto.
* testsuite/gas/i386/x86-64-apx-push2pop2-inval.s: Ditto.
* testsuite/gas/i386/apx-push2pop2-inval.s: Ditto.
* testsuite/gas/i386/apx-push2pop2-inval.d: Ditto.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.d: Added bad
testcases for POP2.
* testsuite/gas/i386/x86-64-apx-evex-promoted-bad.s: Ditto.
opcodes/ChangeLog:
* i386-dis-evex-reg.h: Add REG_EVEX_MAP4_8F.
* i386-dis-evex-w.h: Add EVEX_W_MAP4_8F_R_0 and EVEX_W_MAP4_FF_R_6
* i386-dis-evex.h: Add REG_EVEX_MAP4_8F.
* i386-dis.c (PUSH2_POP2_Fixup): Add special handling for PUSH2/POP2.
(get_valid_dis386): Add handler for vector length and address_mode for
APX-Push2/Pop2 insn.
(nd): define nd as b for EVEX-promoted instrutions.
(OP_VEX): Add handler of 64-bit vvvv register for APX-Push2/Pop2 insn.
* i386-gen.c: Add Push2Pop2 bitfield.
* i386-opc.h: Regenerated.
* i386-opc.tbl: Regenerated.
115 lines
3.4 KiB
C
115 lines
3.4 KiB
C
/* REG_EVEX_0F71 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "%XEvpsrlw", { Vex, EXx, Ib }, PREFIX_DATA },
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{ Bad_Opcode },
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{ "%XEvpsraw", { Vex, EXx, Ib }, PREFIX_DATA },
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{ Bad_Opcode },
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{ "%XEvpsllw", { Vex, EXx, Ib }, PREFIX_DATA },
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},
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/* REG_EVEX_0F72 */
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{
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{ "vpror%DQ", { Vex, EXx, Ib }, PREFIX_DATA },
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{ "vprol%DQ", { Vex, EXx, Ib }, PREFIX_DATA },
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{ VEX_W_TABLE (EVEX_W_0F72_R_2) },
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{ Bad_Opcode },
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{ "%XEvpsra%DQ", { Vex, EXx, Ib }, PREFIX_DATA },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F72_R_6) },
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},
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/* REG_EVEX_0F73 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F73_R_2) },
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{ "%XEvpsrldqY", { Vex, EXx, Ib }, PREFIX_DATA },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_0F73_R_6) },
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{ "%XEvpslldqY", { Vex, EXx, Ib }, PREFIX_DATA },
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},
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/* REG_EVEX_0F38C6_L_2 */
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{
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{ Bad_Opcode },
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{ "vgatherpf0dp%XW", { MVexVSIBDWpX }, PREFIX_DATA },
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{ "vgatherpf1dp%XW", { MVexVSIBDWpX }, PREFIX_DATA },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vscatterpf0dp%XW", { MVexVSIBDWpX }, PREFIX_DATA },
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{ "vscatterpf1dp%XW", { MVexVSIBDWpX }, PREFIX_DATA },
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},
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/* REG_EVEX_0F38C7_L_2 */
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{
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{ Bad_Opcode },
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{ "vgatherpf0qp%XW", { MVexVSIBQWpX }, PREFIX_DATA },
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{ "vgatherpf1qp%XW", { MVexVSIBQWpX }, PREFIX_DATA },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "vscatterpf0qp%XW", { MVexVSIBQWpX }, PREFIX_DATA },
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{ "vscatterpf1qp%XW", { MVexVSIBQWpX }, PREFIX_DATA },
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},
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/* REG_EVEX_MAP4_80 */
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{
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{ "addA", { VexGb, Eb, Ib }, NO_PREFIX },
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{ "orA", { VexGb, Eb, Ib }, NO_PREFIX },
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{ "adcA", { VexGb, Eb, Ib }, NO_PREFIX },
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{ "sbbA", { VexGb, Eb, Ib }, NO_PREFIX },
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{ "andA", { VexGb, Eb, Ib }, NO_PREFIX },
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{ "subA", { VexGb, Eb, Ib }, NO_PREFIX },
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{ "xorA", { VexGb, Eb, Ib }, NO_PREFIX },
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},
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/* REG_EVEX_MAP4_81 */
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{
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{ "addQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
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{ "orQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
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{ "adcQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
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{ "sbbQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
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{ "andQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
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{ "subQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
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{ "xorQ", { VexGv, Ev, Iv }, PREFIX_NP_OR_DATA },
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},
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/* REG_EVEX_MAP4_83 */
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{
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{ "addQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
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{ "orQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
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{ "adcQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
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{ "sbbQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
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{ "andQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
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{ "subQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
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{ "xorQ", { VexGv, Ev, sIb }, PREFIX_NP_OR_DATA },
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},
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/* REG_EVEX_MAP4_8F */
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{
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{ VEX_W_TABLE (EVEX_W_MAP4_8F_R_0) },
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},
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/* REG_EVEX_MAP4_F6 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "notA", { VexGb, Eb }, NO_PREFIX },
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{ "negA", { VexGb, Eb }, NO_PREFIX },
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},
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/* REG_EVEX_MAP4_F7 */
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{
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ "notQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
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{ "negQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
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},
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/* REG_EVEX_MAP4_FE */
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{
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{ "incA", { VexGb, Eb }, NO_PREFIX },
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{ "decA", { VexGb, Eb }, NO_PREFIX },
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},
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/* REG_EVEX_MAP4_FF */
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{
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{ "incQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
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{ "decQ", { VexGv, Ev }, PREFIX_NP_OR_DATA },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ Bad_Opcode },
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{ VEX_W_TABLE (EVEX_W_MAP4_FF_R_6) },
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},
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