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434 lines
12 KiB
C
434 lines
12 KiB
C
/* Assembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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This file is used to generate @arch@-asm.c.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include "sysdep.h"
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#include <ctype.h>
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#include <stdio.h>
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#include "ansidecl.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "@arch@-opc.h"
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/* ??? The layout of this stuff is still work in progress.
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For speed in assembly/disassembly, we use inline functions. That of course
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will only work for GCC. When this stuff is finished, we can decide whether
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to keep the inline functions (and only get the performance increase when
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compiled with GCC), or switch to macros, or use something else.
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*/
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static const char * insert_normal
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PARAMS ((long, unsigned int, int, int, int, char *));
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static const char * parse_insn_normal
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PARAMS ((const CGEN_INSN *, const char **, CGEN_FIELDS *));
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static const char * insert_insn_normal
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PARAMS ((const CGEN_INSN *, CGEN_FIELDS *, cgen_insn_t *));
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/* -- assembler routines inserted here */
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/* Default insertion routine.
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ATTRS is a mask of the boolean attributes.
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LENGTH is the length of VALUE in bits.
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TOTAL_LENGTH is the total length of the insn (currently 8,16,32).
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The result is an error message or NULL if success. */
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/* ??? This duplicates functionality with bfd's howto table and
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bfd_install_relocation. */
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/* ??? For architectures where insns can be representable as ints,
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store insn in `field' struct and add registers, etc. while parsing? */
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static const char *
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insert_normal (value, attrs, start, length, total_length, buffer)
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long value;
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unsigned int attrs;
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int start;
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int length;
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int total_length;
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char * buffer;
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{
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bfd_vma x;
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static char buf[100];
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/* Ensure VALUE will fit. */
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if ((attrs & (1 << CGEN_OPERAND_UNSIGNED)) != 0)
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{
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unsigned long max = (1 << length) - 1;
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if ((unsigned long) value > max)
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{
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const char *err = "operand out of range (%lu not between 0 and %lu)";
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sprintf (buf, err, value, max);
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return buf;
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}
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}
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else
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{
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long min = - (1 << (length - 1));
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long max = (1 << (length - 1)) - 1;
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if (value < min || value > max)
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{
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const char *err = "operand out of range (%ld not between %ld and %ld)";
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sprintf (buf, err, value, min, max);
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return buf;
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}
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}
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#if 0 /*def CGEN_INT_INSN*/
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*buffer |= ((value & ((1 << length) - 1))
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<< (total_length - (start + length)));
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#else
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switch (total_length)
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{
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case 8:
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x = * (unsigned char *) buffer;
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break;
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case 16:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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x = bfd_getb16 (buffer);
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else
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x = bfd_getl16 (buffer);
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break;
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case 32:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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x = bfd_getb32 (buffer);
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else
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x = bfd_getl32 (buffer);
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break;
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default :
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abort ();
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}
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x |= ((value & ((1 << length) - 1))
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<< (total_length - (start + length)));
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switch (total_length)
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{
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case 8:
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* buffer = value;
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break;
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case 16:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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bfd_putb16 (x, buffer);
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else
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bfd_putl16 (x, buffer);
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break;
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case 32:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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bfd_putb32 (x, buffer);
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else
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bfd_putl32 (x, buffer);
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break;
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default :
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abort ();
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}
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#endif
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return NULL;
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}
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/* Default insn parser.
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The syntax string is scanned and operands are parsed and stored in FIELDS.
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Relocs are queued as we go via other callbacks.
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??? Note that this is currently an all-or-nothing parser. If we fail to
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parse the instruction, we return 0 and the caller will start over from
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the beginning. Backtracking will be necessary in parsing subexpressions,
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but that can be handled there. Not handling backtracking here may get
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expensive in the case of the m68k. Deal with later.
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Returns NULL for success, an error message for failure.
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*/
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static const char *
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parse_insn_normal (insn, strp, fields)
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const CGEN_INSN * insn;
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const char ** strp;
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CGEN_FIELDS * fields;
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{
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const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
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const char * str = *strp;
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const char * errmsg;
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const char * p;
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const unsigned char * syn;
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#ifdef CGEN_MNEMONIC_OPERANDS
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int past_opcode_p;
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#endif
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/* For now we assume the mnemonic is first (there are no leading operands).
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We can parse it without needing to set up operand parsing. */
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p = CGEN_INSN_MNEMONIC (insn);
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while (* p && * p == * str)
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++ p, ++ str;
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if (* p || (* str && !isspace (* str)))
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return "unrecognized instruction";
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CGEN_INIT_PARSE ();
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cgen_init_parse_operand ();
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#ifdef CGEN_MNEMONIC_OPERANDS
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past_opcode_p = 0;
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#endif
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/* We don't check for (*str != '\0') here because we want to parse
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any trailing fake arguments in the syntax string. */
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syn = CGEN_SYNTAX_STRING (CGEN_INSN_SYNTAX (insn));
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/* Mnemonics come first for now, ensure valid string. */
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if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
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abort ();
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++syn;
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while (* syn != 0)
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{
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/* Non operand chars must match exactly. */
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/* FIXME: Need to better handle whitespace. */
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if (CGEN_SYNTAX_CHAR_P (* syn))
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{
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if (*str == CGEN_SYNTAX_CHAR (* syn))
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{
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#ifdef CGEN_MNEMONIC_OPERANDS
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if (* syn == ' ')
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past_opcode_p = 1;
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#endif
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++ syn;
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++ str;
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}
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else
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{
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/* Syntax char didn't match. Can't be this insn. */
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/* FIXME: would like to return something like
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"expected char `c'" */
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return "syntax error";
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}
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continue;
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}
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/* We have an operand of some sort. */
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errmsg = @arch@_cgen_parse_operand (CGEN_SYNTAX_FIELD (*syn),
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&str, fields);
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if (errmsg)
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return errmsg;
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/* Done with this operand, continue with next one. */
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++ syn;
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}
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/* If we're at the end of the syntax string, we're done. */
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if (* syn == '\0')
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{
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/* FIXME: For the moment we assume a valid `str' can only contain
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blanks now. IE: We needn't try again with a longer version of
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the insn and it is assumed that longer versions of insns appear
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before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
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while (isspace (* str))
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++ str;
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if (* str != '\0')
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return "junk at end of line"; /* FIXME: would like to include `str' */
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return NULL;
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}
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/* We couldn't parse it. */
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return "unrecognized instruction";
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}
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/* Default insn builder (insert handler).
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The instruction is recorded in target byte order.
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The result is an error message or NULL if success. */
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/* FIXME: change buffer to char *? */
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static const char *
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insert_insn_normal (insn, fields, buffer)
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const CGEN_INSN * insn;
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CGEN_FIELDS * fields;
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cgen_insn_t * buffer;
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{
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const CGEN_SYNTAX * syntax = CGEN_INSN_SYNTAX (insn);
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bfd_vma value;
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const unsigned char * syn;
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CGEN_INIT_INSERT ();
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value = CGEN_INSN_VALUE (insn);
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/* If we're recording insns as numbers (rather than a string of bytes),
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target byte order handling is deferred until later. */
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#undef min
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#define min(a,b) ((a) < (b) ? (a) : (b))
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#if 0 /*def CGEN_INT_INSN*/
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*buffer = value;
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#else
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switch (min (CGEN_BASE_INSN_BITSIZE, CGEN_FIELDS_BITSIZE (fields)))
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{
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case 8:
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* buffer = value;
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break;
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case 16:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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bfd_putb16 (value, (char *) buffer);
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else
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bfd_putl16 (value, (char *) buffer);
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break;
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case 32:
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if (CGEN_CURRENT_ENDIAN == CGEN_ENDIAN_BIG)
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bfd_putb32 (value, (char *) buffer);
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else
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bfd_putl32 (value, (char *) buffer);
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break;
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default:
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abort ();
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}
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#endif
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/* ??? Rather than scanning the syntax string again, we could store
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in `fields' a null terminated list of the fields that are present. */
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for (syn = CGEN_SYNTAX_STRING (syntax); * syn != '\0'; ++ syn)
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{
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const char *errmsg;
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if (CGEN_SYNTAX_CHAR_P (* syn))
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continue;
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errmsg = @arch@_cgen_insert_operand (CGEN_SYNTAX_FIELD (*syn), fields,
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(char *) buffer);
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if (errmsg)
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return errmsg;
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}
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return NULL;
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}
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/* Main entry point.
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This routine is called for each instruction to be assembled.
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STR points to the insn to be assembled.
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We assume all necessary tables have been initialized.
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The assembled instruction, less any fixups, is stored in buf.
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[??? What byte order?]
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The result is a pointer to the insn's entry in the opcode table,
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or NULL if an error occured (an error message will have already been
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printed).
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Note that when processing (non-alias) macro-insns,
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this function recurses. */
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const CGEN_INSN *
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@arch@_cgen_assemble_insn (str, fields, buf, errmsg)
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const char * str;
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CGEN_FIELDS * fields;
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cgen_insn_t * buf;
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char ** errmsg;
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{
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const char * start;
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CGEN_INSN_LIST * ilist;
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/* Skip leading white space. */
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while (isspace (* str))
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++ str;
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/* The instructions are stored in hashed lists.
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Get the first in the list. */
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ilist = CGEN_ASM_LOOKUP_INSN (str);
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/* Keep looking until we find a match. */
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start = str;
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for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
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{
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const CGEN_INSN *insn = ilist->insn;
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#if 0 /* not needed as unsupported opcodes shouldn't be in the hash lists */
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/* Is this insn supported by the selected cpu? */
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if (! @arch@_cgen_insn_supported (insn))
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continue;
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#endif
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#if 1 /* FIXME: wip */
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/* If the RELAX attribute is set, this is an insn that shouldn't be
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chosen immediately. Instead, it is used during assembler/linker
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relaxation if possible. */
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if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAX) != 0)
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continue;
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#endif
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str = start;
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/* Record a default length for the insn. This will get set to the
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correct value while parsing. */
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/* FIXME: wip */
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CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
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if (! CGEN_PARSE_FN (insn) (insn, & str, fields))
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{
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if (CGEN_INSERT_FN (insn) (insn, fields, buf) != NULL)
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continue;
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/* It is up to the caller to actually output the insn and any
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queued relocs. */
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return insn;
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}
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/* Try the next entry. */
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}
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/* FIXME: We can return a better error message than this.
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Need to track why it failed and pick the right one. */
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{
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static char errbuf[100];
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sprintf (errbuf, "bad instruction `%.50s%s'",
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start, strlen (start) > 50 ? "..." : "");
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*errmsg = errbuf;
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return NULL;
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}
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}
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#if 0 /* This calls back to GAS which we can't do without care. */
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/* Record each member of OPVALS in the assembler's symbol table.
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This lets GAS parse registers for us.
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??? Interesting idea but not currently used. */
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/* Record each member of OPVALS in the assembler's symbol table.
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FIXME: Not currently used. */
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void
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@arch@_cgen_asm_hash_keywords (opvals)
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CGEN_KEYWORD * opvals;
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{
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CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
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const CGEN_KEYWORD_ENTRY * ke;
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while ((ke = cgen_keyword_search_next (& search)) != NULL)
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{
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#if 0 /* Unnecessary, should be done in the search routine. */
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if (! @arch@_cgen_opval_supported (ke))
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continue;
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#endif
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cgen_asm_record_register (ke->name, ke->value);
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}
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}
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#endif /* 0 */
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