mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-27 03:54:41 +08:00
1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
389 lines
12 KiB
Makefile
389 lines
12 KiB
Makefile
## See sim/Makefile.am
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##
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## Copyright (C) 1995-2024 Free Software Foundation, Inc.
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## Written by Cygnus Support.
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 3 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program. If not, see <http://www.gnu.org/licenses/>.
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AM_CPPFLAGS_%C% = \
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@SIM_MIPS_SUBTARGET@ \
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-DWITH_TARGET_WORD_BITSIZE=@SIM_MIPS_BITSIZE@ -DWITH_TARGET_WORD_MSB=WITH_TARGET_WORD_BITSIZE-1 \
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-DWITH_FLOATING_POINT=HARD_FLOATING_POINT -DWITH_TARGET_FLOATING_POINT_BITSIZE=@SIM_MIPS_FPU_BITSIZE@
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%C%_GEN_OBJ =
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if SIM_MIPS_GEN_MODE_SINGLE
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%C%_GEN_OBJ += \
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%D%/support.o \
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%D%/itable.o \
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%D%/semantics.o \
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%D%/idecode.o \
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%D%/icache.o \
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%D%/engine.o \
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%D%/irun.o
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endif
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if SIM_MIPS_GEN_MODE_M16
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%C%_GEN_OBJ += \
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%D%/m16_support.o \
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%D%/m16_semantics.o \
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%D%/m16_idecode.o \
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%D%/m16_icache.o \
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\
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%D%/m32_support.o \
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%D%/m32_semantics.o \
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%D%/m32_idecode.o \
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%D%/m32_icache.o \
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\
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%D%/itable.o \
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%D%/m16run.o
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endif
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if SIM_MIPS_GEN_MODE_MULTI
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%C%_GEN_OBJ += \
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$(SIM_MIPS_MULTI_OBJ) \
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%D%/itable.o \
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%D%/multi-run.o
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endif
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nodist_%C%_libsim_a_SOURCES = \
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%D%/modules.c
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%C%_libsim_a_SOURCES = \
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$(common_libcommon_a_SOURCES)
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%C%_libsim_a_LIBADD = \
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%D%/interp.o \
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$(%C%_GEN_OBJ) \
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$(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \
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$(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \
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$(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \
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%D%/cp1.o \
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%D%/dsp.o \
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%D%/mdmx.o \
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%D%/sim-main.o \
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%D%/sim-resume.o
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## Workaround Automake bug where $(SIM_MIPS_MULTI_OBJ) isn't copied from LIBADD
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## to DEPENDENCIES automatically.
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EXTRA_mips_libsim_a_DEPENDENCIES = $(SIM_MIPS_MULTI_OBJ)
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$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h
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noinst_LIBRARIES += %D%/libsim.a
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## Override wildcards that trigger common/modules.c to be (incorrectly) used.
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%D%/modules.o: %D%/modules.c
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%D%/%.o: common/%.c ; $(SIM_COMPILE)
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-@am__include@ %D%/$(DEPDIR)/*.Po
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%C%_run_SOURCES =
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%C%_run_LDADD = \
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%D%/nrun.o \
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%D%/libsim.a \
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$(SIM_COMMON_LIBS)
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noinst_PROGRAMS += %D%/run
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%C%_SIM_EXTRA_HW_DEVICES = tx3904cpu tx3904irc tx3904tmr tx3904sio
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## List all generated headers to help Automake dependency tracking.
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BUILT_SOURCES += %D%/itable.h
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## The multi files are a bit of a mess with generated multirun files depending
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## on generated igen files. Be lazy for now and declare them all built so they
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## are generated early on.
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BUILT_SOURCES += $(SIM_MIPS_MULTI_SRC)
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%C%_BUILT_SRC_FROM_IGEN_ITABLE = \
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%D%/itable.h \
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%D%/itable.c
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%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE = \
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%D%/icache.h \
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%D%/icache.c \
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%D%/idecode.h \
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%D%/idecode.c \
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%D%/semantics.h \
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%D%/semantics.c \
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%D%/model.h \
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%D%/model.c \
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%D%/support.h \
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%D%/support.c \
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%D%/engine.h \
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%D%/engine.c \
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%D%/irun.c
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%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16 = \
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%D%/m16_icache.h \
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%D%/m16_icache.c \
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%D%/m16_idecode.h \
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%D%/m16_idecode.c \
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%D%/m16_semantics.h \
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%D%/m16_semantics.c \
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%D%/m16_model.h \
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%D%/m16_model.c \
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%D%/m16_support.h \
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%D%/m16_support.c \
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%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32 = \
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%D%/m32_icache.h \
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%D%/m32_icache.c \
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%D%/m32_idecode.h \
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%D%/m32_idecode.c \
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%D%/m32_semantics.h \
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%D%/m32_semantics.c \
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%D%/m32_model.h \
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%D%/m32_model.c \
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%D%/m32_support.h \
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%D%/m32_support.c
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%C%_BUILD_OUTPUTS = \
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$(%C%_BUILT_SRC_FROM_IGEN_ITABLE) \
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%D%/stamp-igen-itable
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if SIM_MIPS_GEN_MODE_SINGLE
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%C%_BUILD_OUTPUTS += \
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$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE) \
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%D%/stamp-gen-mode-single
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endif
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if SIM_MIPS_GEN_MODE_M16
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%C%_BUILD_OUTPUTS += \
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$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16) \
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$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32) \
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%D%/stamp-gen-mode-m16-m16 \
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%D%/stamp-gen-mode-m16-m32
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endif
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if SIM_MIPS_GEN_MODE_MULTI
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%C%_BUILD_OUTPUTS += \
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$(SIM_MIPS_MULTI_SRC) \
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%D%/stamp-gen-mode-multi-igen \
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%D%/stamp-gen-mode-multi-run
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endif
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## Generating modules.c requires all sources to scan.
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%D%/modules.c: | $(%C%_BUILD_OUTPUTS)
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$(%C%_BUILT_SRC_FROM_IGEN_ITABLE): %D%/stamp-igen-itable
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$(%C%_BUILT_SRC_FROM_GEN_MODE_SINGLE): %D%/stamp-gen-mode-single
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$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M16): %D%/stamp-gen-mode-m16-m16
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$(%C%_BUILT_SRC_FROM_GEN_MODE_M16_M32): %D%/stamp-gen-mode-m16-m32
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$(SIM_MIPS_MULTI_SRC): %D%/stamp-gen-mode-multi-igen %D%/stamp-gen-mode-multi-run
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%C%_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all
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%C%_IGEN_INSN = $(srcdir)/%D%/mips.igen
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%C%_IGEN_INSN_INC = \
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%D%/dsp.igen \
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%D%/dsp2.igen \
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%D%/m16.igen \
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%D%/m16e.igen \
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%D%/mdmx.igen \
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%D%/micromipsdsp.igen \
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%D%/micromips.igen \
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%D%/mips3264r2.igen \
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%D%/mips3264r6.igen \
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%D%/mips3d.igen \
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%D%/sb1.igen \
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%D%/tx.igen \
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%D%/vr.igen
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%C%_IGEN_DC = $(srcdir)/%D%/mips.dc
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%C%_M16_DC = $(srcdir)/%D%/m16.dc
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%C%_MICROMIPS32_DC = $(srcdir)/%D%/micromips.dc
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%C%_MICROMIPS16_DC = $(srcdir)/%D%/micromips16.dc
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## NB: Since these can be built by a number of generators, care
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## must be taken to ensure that they are only dependant on
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## one of those generators.
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%D%/stamp-igen-itable: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(IGEN)
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$(AM_V_GEN)$(IGEN_RUN) \
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$(%C%_IGEN_TRACE) \
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-I $(srcdir)/%D% \
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-Werror \
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-Wnodiscard \
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-Wnowidth \
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-Wnounimplemented \
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$(SIM_MIPS_IGEN_ITABLE_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-i $(%C%_IGEN_INSN) \
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-n itable.h -ht %D%/itable.h \
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-n itable.c -t %D%/itable.c
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$(AM_V_at)touch $@
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%D%/stamp-gen-mode-single: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(IGEN)
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$(AM_V_GEN)$(IGEN_RUN) \
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$(%C%_IGEN_TRACE) \
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-I $(srcdir)/%D% \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_SINGLE_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(%C%_IGEN_INSN) \
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-o $(%C%_IGEN_DC) \
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-x \
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-n icache.h -hc %D%/icache.h \
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-n icache.c -c %D%/icache.c \
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-n semantics.h -hs %D%/semantics.h \
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-n semantics.c -s %D%/semantics.c \
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-n idecode.h -hd %D%/idecode.h \
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-n idecode.c -d %D%/idecode.c \
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-n model.h -hm %D%/model.h \
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-n model.c -m %D%/model.c \
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-n support.h -hf %D%/support.h \
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-n support.c -f %D%/support.c \
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-n engine.h -he %D%/engine.h \
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-n engine.c -e %D%/engine.c \
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-n irun.c -r %D%/irun.c
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$(AM_V_at)touch $@
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%D%/stamp-gen-mode-m16-m16: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_M16_DC) $(IGEN)
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$(AM_V_GEN)$(IGEN_RUN) \
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$(%C%_IGEN_TRACE) \
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-I $(srcdir)/%D% \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_M16_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 16 \
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-H 15 \
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-i $(%C%_IGEN_INSN) \
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-o $(%C%_M16_DC) \
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-P m16_ \
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-x \
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-n m16_icache.h -hc %D%/m16_icache.h \
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-n m16_icache.c -c %D%/m16_icache.c \
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-n m16_semantics.h -hs %D%/m16_semantics.h \
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-n m16_semantics.c -s %D%/m16_semantics.c \
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-n m16_idecode.h -hd %D%/m16_idecode.h \
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-n m16_idecode.c -d %D%/m16_idecode.c \
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-n m16_model.h -hm %D%/m16_model.h \
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-n m16_model.c -m %D%/m16_model.c \
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-n m16_support.h -hf %D%/m16_support.h \
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-n m16_support.c -f %D%/m16_support.c
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$(AM_V_at)touch $@
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%D%/stamp-gen-mode-m16-m32: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(IGEN)
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$(AM_V_GEN)$(IGEN_RUN) \
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$(%C%_IGEN_TRACE) \
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-I $(srcdir)/%D% \
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-Werror \
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-Wnodiscard \
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$(SIM_MIPS_SINGLE_FLAGS) \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-B 32 \
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-H 31 \
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-i $(%C%_IGEN_INSN) \
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-o $(%C%_IGEN_DC) \
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-P m32_ \
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-x \
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-n m32_icache.h -hc %D%/m32_icache.h \
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-n m32_icache.c -c %D%/m32_icache.c \
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-n m32_semantics.h -hs %D%/m32_semantics.h \
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-n m32_semantics.c -s %D%/m32_semantics.c \
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-n m32_idecode.h -hd %D%/m32_idecode.h \
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-n m32_idecode.c -d %D%/m32_idecode.c \
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-n m32_model.h -hm %D%/m32_model.h \
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-n m32_model.c -m %D%/m32_model.c \
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-n m32_support.h -hf %D%/m32_support.h \
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-n m32_support.c -f %D%/m32_support.c
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$(AM_V_at)touch $@
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%D%/stamp-gen-mode-multi-igen: $(%C%_IGEN_INSN) $(%C%_IGEN_INSN_INC) $(%C%_IGEN_DC) $(%C%_M16_DC) $(%C%_MICROMIPS32_DC) $(%C%_MICROMIPS16_DC) $(IGEN)
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$(AM_V_GEN)\
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for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
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p=`echo $${t} | sed -e 's/:.*//'` ; \
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m=`echo $${t} | sed -e 's/.*:\(.*\):.*/\1/'` ; \
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f=`echo $${t} | sed -e 's/.*://'` ; \
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case $${p} in \
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micromips16*) \
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e="-B 16 -H 15 -o $(%C%_MICROMIPS16_DC) -F 16" ;; \
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micromips32* | micromips64*) \
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e="-B 32 -H 31 -o $(%C%_MICROMIPS32_DC) -F $${f}" ;; \
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micromips_m32*) \
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e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
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m="mips32r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
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micromips_m64*) \
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e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}"; \
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m="mips64r2,mips3d,mdmx,dsp,dsp2,smartmips" ;; \
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m16*) \
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e="-B 16 -H 15 -o $(%C%_M16_DC) -F 16" ;; \
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*) \
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e="-B 32 -H 31 -o $(%C%_IGEN_DC) -F $${f}" ;; \
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esac; \
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$(IGEN_RUN) \
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$(%C%_IGEN_TRACE) \
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$${e} \
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-I $(srcdir)/%D% \
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-Werror \
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-Wnodiscard \
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-M $${m} \
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-G gen-direct-access \
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-G gen-zero-r0 \
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-i $(%C%_IGEN_INSN) \
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-P $${p}_ \
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-x \
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-n $${p}_icache.h -hc %D%/$${p}_icache.h \
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-n $${p}_icache.c -c %D%/$${p}_icache.c \
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-n $${p}_semantics.h -hs %D%/$${p}_semantics.h \
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-n $${p}_semantics.c -s %D%/$${p}_semantics.c \
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-n $${p}_idecode.h -hd %D%/$${p}_idecode.h \
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-n $${p}_idecode.c -d %D%/$${p}_idecode.c \
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-n $${p}_model.h -hm %D%/$${p}_model.h \
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-n $${p}_model.c -m %D%/$${p}_model.c \
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-n $${p}_support.h -hf %D%/$${p}_support.h \
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-n $${p}_support.c -f %D%/$${p}_support.c \
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-n $${p}_engine.h -he %D%/$${p}_engine.h \
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-n $${p}_engine.c -e %D%/$${p}_engine.c \
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|| exit; \
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done
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$(AM_V_at)touch $@
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%D%/stamp-gen-mode-multi-run: %D%/m16run.c %D%/micromipsrun.c
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$(AM_V_GEN)\
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for t in $(SIM_MIPS_MULTI_IGEN_CONFIGS); do \
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case $${t} in \
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m16*) \
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m=`echo $${t} | sed -e 's/^m16//' -e 's/:.*//'`; \
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o=%D%/m16$${m}_run.c; \
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sed < $(srcdir)/%D%/m16run.c > $$o.tmp \
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-e "s/^sim_/m16$${m}_/" \
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-e "/include/s/sim-engine/m16$${m}_engine/" \
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-e "s/m16_/m16$${m}_/" \
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-e "s/m32_/m32$${m}_/" \
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|| exit 1; \
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$(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
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;;\
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micromips32*) \
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m=`echo $${t} | sed -e 's/^micromips32//' -e 's/:.*//'`; \
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o=%D%/micromips$${m}_run.c; \
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sed < $(srcdir)/%D%/micromipsrun.c > $$o.tmp \
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-e "s/^sim_/micromips32$${m}_/" \
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-e "/include/s/sim-engine/micromips32$${m}_engine/" \
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-e "s/micromips16_/micromips16$${m}_/" \
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-e "s/micromips32_/micromips32$${m}_/" \
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-e "s/m32_/m32$${m}_/" \
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|| exit 1; \
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$(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
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;;\
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micromips64*) \
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m=`echo $${t} | sed -e 's/^micromips64//' -e 's/:.*//'`; \
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o=%D%/micromips$${m}_run.c; \
|
|
sed < $(srcdir)/%D%/micromipsrun.c > $$o.tmp \
|
|
-e "s/^sim_/micromips64$${m}_/" \
|
|
-e "/include/s/sim-engine/micromips64$${m}_engine/" \
|
|
-e "s/micromips16_/micromips16$${m}_/" \
|
|
-e "s/micromips32_/micromips64$${m}_/" \
|
|
-e "s/m32_/m64$${m}_/" \
|
|
|| exit 1; \
|
|
$(SHELL) $(srcroot)/move-if-change $$o.tmp $$o; \
|
|
;;\
|
|
esac \
|
|
done
|
|
$(AM_V_at)touch $@
|
|
|
|
MOSTLYCLEANFILES += $(%C%_BUILD_OUTPUTS)
|
|
## These are created by mips/acinclude.m4 during configure time.
|
|
DISTCLEANFILES += %D%/multi-include.h %D%/multi-run.c
|