mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-11-23 01:53:38 +08:00
18d2988e5d
Now that defs.h, server.h and common-defs.h are included via the `-include` option, it is no longer necessary for source files to include them. Remove all the inclusions of these files I could find. Update the generation scripts where relevant. Change-Id: Ia026cff269c1b7ae7386dd3619bc9bb6a5332837 Approved-By: Pedro Alves <pedro@palves.net>
347 lines
10 KiB
C
347 lines
10 KiB
C
/* Target-dependent code for FreeBSD/amd64.
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Copyright (C) 2003-2024 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "osabi.h"
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#include "regset.h"
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#include "target.h"
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#include "trad-frame.h"
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#include "tramp-frame.h"
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#include "i386-fbsd-tdep.h"
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#include "gdbsupport/x86-xstate.h"
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#include "amd64-tdep.h"
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#include "amd64-fbsd-tdep.h"
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#include "fbsd-tdep.h"
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#include "solib-svr4.h"
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#include "inferior.h"
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/* The general-purpose regset consists of 22 64-bit slots, most of
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which contain individual registers, but a few contain multiple
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16-bit segment registers. */
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#define AMD64_FBSD_SIZEOF_GREGSET (22 * 8)
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/* The segment base register set consists of 2 64-bit registers. */
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#define AMD64_FBSD_SIZEOF_SEGBASES_REGSET (2 * 8)
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/* Register maps. */
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static const struct regcache_map_entry amd64_fbsd_gregmap[] =
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{
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{ 1, AMD64_R15_REGNUM, 0 },
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{ 1, AMD64_R14_REGNUM, 0 },
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{ 1, AMD64_R13_REGNUM, 0 },
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{ 1, AMD64_R12_REGNUM, 0 },
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{ 1, AMD64_R11_REGNUM, 0 },
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{ 1, AMD64_R10_REGNUM, 0 },
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{ 1, AMD64_R9_REGNUM, 0 },
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{ 1, AMD64_R8_REGNUM, 0 },
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{ 1, AMD64_RDI_REGNUM, 0 },
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{ 1, AMD64_RSI_REGNUM, 0 },
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{ 1, AMD64_RBP_REGNUM, 0 },
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{ 1, AMD64_RBX_REGNUM, 0 },
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{ 1, AMD64_RDX_REGNUM, 0 },
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{ 1, AMD64_RCX_REGNUM, 0 },
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{ 1, AMD64_RAX_REGNUM, 0 },
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{ 1, REGCACHE_MAP_SKIP, 4 }, /* trapno */
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{ 1, AMD64_FS_REGNUM, 2 },
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{ 1, AMD64_GS_REGNUM, 2 },
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{ 1, REGCACHE_MAP_SKIP, 4 }, /* err */
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{ 1, AMD64_ES_REGNUM, 2 },
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{ 1, AMD64_DS_REGNUM, 2 },
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{ 1, AMD64_RIP_REGNUM, 0 },
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{ 1, AMD64_CS_REGNUM, 8 },
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{ 1, AMD64_EFLAGS_REGNUM, 8 },
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{ 1, AMD64_RSP_REGNUM, 0 },
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{ 1, AMD64_SS_REGNUM, 8 },
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{ 0 }
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};
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static const struct regcache_map_entry amd64_fbsd_segbases_regmap[] =
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{
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{ 1, AMD64_FSBASE_REGNUM, 0 },
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{ 1, AMD64_GSBASE_REGNUM, 0 },
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{ 0 }
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};
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/* This layout including fsbase and gsbase was adopted in FreeBSD
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8.0. */
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static const struct regcache_map_entry amd64_fbsd_mcregmap[] =
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{
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{ 1, REGCACHE_MAP_SKIP, 8 }, /* mc_onstack */
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{ 1, AMD64_RDI_REGNUM, 0 },
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{ 1, AMD64_RSI_REGNUM, 0 },
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{ 1, AMD64_RDX_REGNUM, 0 },
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{ 1, AMD64_RCX_REGNUM, 0 },
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{ 1, AMD64_R8_REGNUM, 0 },
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{ 1, AMD64_R9_REGNUM, 0 },
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{ 1, AMD64_RAX_REGNUM, 0 },
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{ 1, AMD64_RBX_REGNUM, 0 },
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{ 1, AMD64_RBP_REGNUM, 0 },
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{ 1, AMD64_R10_REGNUM, 0 },
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{ 1, AMD64_R11_REGNUM, 0 },
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{ 1, AMD64_R12_REGNUM, 0 },
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{ 1, AMD64_R13_REGNUM, 0 },
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{ 1, AMD64_R14_REGNUM, 0 },
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{ 1, AMD64_R15_REGNUM, 0 },
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{ 1, REGCACHE_MAP_SKIP, 4 }, /* mc_trapno */
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{ 1, AMD64_FS_REGNUM, 2 },
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{ 1, AMD64_GS_REGNUM, 2 },
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{ 1, REGCACHE_MAP_SKIP, 8 }, /* mc_addr */
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{ 1, REGCACHE_MAP_SKIP, 4 }, /* mc_flags */
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{ 1, AMD64_ES_REGNUM, 2 },
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{ 1, AMD64_DS_REGNUM, 2 },
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{ 1, REGCACHE_MAP_SKIP, 8 }, /* mc_err */
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{ 1, AMD64_RIP_REGNUM, 0 },
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{ 1, AMD64_CS_REGNUM, 8 },
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{ 1, AMD64_EFLAGS_REGNUM, 8 },
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{ 1, AMD64_RSP_REGNUM, 0 },
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{ 1, AMD64_SS_REGNUM, 8 },
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{ 1, REGCACHE_MAP_SKIP, 8 }, /* mc_len */
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{ 1, REGCACHE_MAP_SKIP, 8 }, /* mc_fpformat */
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{ 1, REGCACHE_MAP_SKIP, 8 }, /* mc_ownedfp */
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{ 64, REGCACHE_MAP_SKIP, 8 }, /* mc_fpstate */
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{ 1, AMD64_FSBASE_REGNUM, 0 },
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{ 1, AMD64_GSBASE_REGNUM, 0 },
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{ 0 }
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};
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/* Register set definitions. */
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const struct regset amd64_fbsd_gregset =
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{
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amd64_fbsd_gregmap, regcache_supply_regset, regcache_collect_regset
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};
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const struct regset amd64_fbsd_segbases_regset =
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{
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amd64_fbsd_segbases_regmap, regcache_supply_regset, regcache_collect_regset
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};
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/* Support for signal handlers. */
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/* In a signal frame, rsp points to a 'struct sigframe' which is
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defined as:
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struct sigframe {
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union {
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__siginfohandler_t *sf_action;
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__sighandler_t *sf_handler;
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} sf_ahu;
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ucontext_t sf_uc;
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...
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}
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ucontext_t is defined as:
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struct __ucontext {
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sigset_t uc_sigmask;
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mcontext_t uc_mcontext;
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...
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};
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The mcontext_t contains the general purpose register set as well
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as the floating point or XSAVE state. */
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/* NB: There is an 8 byte padding hole between sf_ahu and sf_uc. */
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#define AMD64_SIGFRAME_UCONTEXT_OFFSET 16
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#define AMD64_UCONTEXT_MCONTEXT_OFFSET 16
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#define AMD64_SIZEOF_MCONTEXT_T 800
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/* Implement the "init" method of struct tramp_frame. */
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static void
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amd64_fbsd_sigframe_init (const struct tramp_frame *self,
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const frame_info_ptr &this_frame,
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struct trad_frame_cache *this_cache,
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CORE_ADDR func)
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{
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CORE_ADDR sp = get_frame_register_unsigned (this_frame, AMD64_RSP_REGNUM);
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CORE_ADDR mcontext_addr
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= (sp
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+ AMD64_SIGFRAME_UCONTEXT_OFFSET
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+ AMD64_UCONTEXT_MCONTEXT_OFFSET);
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trad_frame_set_reg_regmap (this_cache, amd64_fbsd_mcregmap, mcontext_addr,
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AMD64_SIZEOF_MCONTEXT_T);
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/* Don't bother with floating point or XSAVE state for now. The
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current helper routines for parsing FXSAVE and XSAVE state only
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work with regcaches. This could perhaps create a temporary
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regcache, collect the register values from mc_fpstate and
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mc_xfpustate, and then set register values in the trad_frame. */
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trad_frame_set_id (this_cache, frame_id_build (sp, func));
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}
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static const struct tramp_frame amd64_fbsd_sigframe =
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{
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SIGTRAMP_FRAME,
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1,
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{
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{0x48, ULONGEST_MAX}, /* lea SIGF_UC(%rsp),%rdi */
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{0x8d, ULONGEST_MAX},
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{0x7c, ULONGEST_MAX},
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{0x24, ULONGEST_MAX},
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{0x10, ULONGEST_MAX},
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{0x6a, ULONGEST_MAX}, /* pushq $0 */
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{0x00, ULONGEST_MAX},
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{0x48, ULONGEST_MAX}, /* movq $SYS_sigreturn,%rax */
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{0xc7, ULONGEST_MAX},
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{0xc0, ULONGEST_MAX},
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{0xa1, ULONGEST_MAX},
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{0x01, ULONGEST_MAX},
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{0x00, ULONGEST_MAX},
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{0x00, ULONGEST_MAX},
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{0x0f, ULONGEST_MAX}, /* syscall */
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{0x05, ULONGEST_MAX},
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{TRAMP_SENTINEL_INSN, ULONGEST_MAX}
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},
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amd64_fbsd_sigframe_init
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};
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/* Implement the core_read_description gdbarch method. */
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static const struct target_desc *
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amd64fbsd_core_read_description (struct gdbarch *gdbarch,
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struct target_ops *target,
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bfd *abfd)
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{
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x86_xsave_layout layout;
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uint64_t xcr0 = i386_fbsd_core_read_xsave_info (abfd, layout);
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if (xcr0 == 0)
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xcr0 = X86_XSTATE_SSE_MASK;
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return amd64_target_description (xcr0, true);
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}
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/* Similar to amd64_supply_fpregset, but use XSAVE extended state. */
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static void
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amd64fbsd_supply_xstateregset (const struct regset *regset,
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struct regcache *regcache, int regnum,
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const void *xstateregs, size_t len)
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{
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amd64_supply_xsave (regcache, regnum, xstateregs);
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}
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/* Similar to amd64_collect_fpregset, but use XSAVE extended state. */
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static void
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amd64fbsd_collect_xstateregset (const struct regset *regset,
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const struct regcache *regcache,
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int regnum, void *xstateregs, size_t len)
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{
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amd64_collect_xsave (regcache, regnum, xstateregs, 1);
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}
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static const struct regset amd64fbsd_xstateregset =
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{
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NULL,
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amd64fbsd_supply_xstateregset,
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amd64fbsd_collect_xstateregset
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};
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/* Iterate over core file register note sections. */
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static void
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amd64fbsd_iterate_over_regset_sections (struct gdbarch *gdbarch,
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iterate_over_regset_sections_cb *cb,
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void *cb_data,
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const struct regcache *regcache)
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{
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i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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cb (".reg", AMD64_FBSD_SIZEOF_GREGSET, AMD64_FBSD_SIZEOF_GREGSET,
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&amd64_fbsd_gregset, NULL, cb_data);
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cb (".reg2", tdep->sizeof_fpregset, tdep->sizeof_fpregset, &amd64_fpregset,
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NULL, cb_data);
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cb (".reg-x86-segbases", AMD64_FBSD_SIZEOF_SEGBASES_REGSET,
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AMD64_FBSD_SIZEOF_SEGBASES_REGSET, &amd64_fbsd_segbases_regset,
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"segment bases", cb_data);
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if (tdep->xsave_layout.sizeof_xsave != 0)
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cb (".reg-xstate", tdep->xsave_layout.sizeof_xsave,
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tdep->xsave_layout.sizeof_xsave, &amd64fbsd_xstateregset,
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"XSAVE extended state", cb_data);
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}
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/* Implement the get_thread_local_address gdbarch method. */
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static CORE_ADDR
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amd64fbsd_get_thread_local_address (struct gdbarch *gdbarch, ptid_t ptid,
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CORE_ADDR lm_addr, CORE_ADDR offset)
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{
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regcache *regcache
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= get_thread_arch_regcache (current_inferior (), ptid, gdbarch);
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target_fetch_registers (regcache, AMD64_FSBASE_REGNUM);
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ULONGEST fsbase;
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if (regcache->cooked_read (AMD64_FSBASE_REGNUM, &fsbase) != REG_VALID)
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error (_("Unable to fetch %%fsbase"));
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CORE_ADDR dtv_addr = fsbase + gdbarch_ptr_bit (gdbarch) / 8;
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return fbsd_get_thread_local_address (gdbarch, dtv_addr, lm_addr, offset);
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}
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static void
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amd64fbsd_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
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{
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i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
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/* Generic FreeBSD support. */
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fbsd_init_abi (info, gdbarch);
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/* Obviously FreeBSD is BSD-based. */
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i386bsd_init_abi (info, gdbarch);
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amd64_init_abi (info, gdbarch,
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amd64_target_description (X86_XSTATE_SSE_MASK, true));
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tramp_frame_prepend_unwinder (gdbarch, &amd64_fbsd_sigframe);
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tdep->xsave_xcr0_offset = I386_FBSD_XSAVE_XCR0_OFFSET;
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set_gdbarch_core_read_x86_xsave_layout
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(gdbarch, i386_fbsd_core_read_x86_xsave_layout);
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/* Iterate over core file register note sections. */
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set_gdbarch_iterate_over_regset_sections
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(gdbarch, amd64fbsd_iterate_over_regset_sections);
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set_gdbarch_core_read_description (gdbarch,
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amd64fbsd_core_read_description);
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/* FreeBSD uses SVR4-style shared libraries. */
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set_solib_svr4_fetch_link_map_offsets
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(gdbarch, svr4_lp64_fetch_link_map_offsets);
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set_gdbarch_fetch_tls_load_module_address (gdbarch,
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svr4_fetch_objfile_link_map);
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set_gdbarch_get_thread_local_address (gdbarch,
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amd64fbsd_get_thread_local_address);
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}
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void _initialize_amd64fbsd_tdep ();
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void
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_initialize_amd64fbsd_tdep ()
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{
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gdbarch_register_osabi (bfd_arch_i386, bfd_mach_x86_64,
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GDB_OSABI_FREEBSD, amd64fbsd_init_abi);
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}
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