binutils-gdb/gas/ginsn.h
Indu Bhagat c7defc5386 gas: x86: synthesize CFI for hand-written asm
This patch adds support in GAS to create generic GAS instructions
(a.k.a., the ginsn) for the x86 backend (AMD64 ABI only at this time).
Using this ginsn infrastructure, GAS can then synthesize CFI for
hand-written asm for x86_64.

A ginsn is a target-independent representation of the machine
instructions.  One machine instruction may need one or more ginsn.

This patch also adds skeleton support for printing ginsn in the listing
output for debugging purposes.

Since the current use-case of ginsn is to synthesize CFI, the x86 target
needs to generate ginsns necessary for the following machine
instructions only:

 - All change of flow instructions, including all conditional and
   unconditional branches, call and return from functions.
 - All register saves and unsaves to the stack.
 - All instructions affecting the two registers that could potentially
   be used as the base register for CFA tracking.  For SCFI, the base
   register for CFA tracking is limited to REG_SP and REG_FP only for
   now.

The representation of ginsn is kept simple:

- GAS instruction has GINSN_NUM_SRC_OPNDS (defined to be 2 at this time)
  number of source operands and one destination operand at this time.
- GAS instruction uses DWARF register numbers in its representation and
  does not track register size.
- GAS instructions carry location information (file name and line
  number).
- GAS instructions are ID's with a natural number in order of their
  addtion to the list.  This can be used as a proxy for the static
  program order of the corresponding machine instructions.

Note that, GAS instruction (ginsn) format does not support
GINSN_TYPE_PUSH and GINSN_TYPE_POP.  Some architectures, like aarch64,
do not have push and pop instructions, but rather STP/LDP/STR/LDR etc.
instructions.  Further these instructions have a variety of addressing
modes, like offset, pre-indexing and post-indexing etc.  Among other
things, one of differences in these addressing modes is _when_ the addr
register is updated with the result of the address calculation: before
or after the memory operation.  To best support such needs, the generic
instructions like GINSN_TYPE_LOAD, GINSN_TYPE_STORE together with
GINSN_TYPE_ADD, and GINSN_TYPE_SUB may be used.

The functionality provided in ginsn.c and scfi.c is compiled in when a
target defines TARGET_USE_SCFI and TARGET_USE_GINSN.  This can be
revisited later when there are other use-cases of creating ginsn's in
GAS, apart from the current use-case of synthesizing CFI for
hand-written asm.

Support is added only for System V AMD64 ABI for ELF at this time.  If
the user enables SCFI with --32, GAS issues an error:

  "Fatal error: SCFI is not supported for this ABI"

For synthesizing (DWARF) CFI, the SCFI machinery requires the programmer
to adhere to some pre-requisites for their asm:
   - Hand-written asm block must begin with a .type   foo, @function
It is highly recommended to, additionally, also ensure that:
   - Hand-written asm block ends with a .size foo, .-foo

The SCFI machinery encodes some rules which align with the standard
calling convention specified by the ABI.  Apart from the rules, the SCFI
machinery employs some heuristics.  For example:
   - The base register for CFA tracking may be either REG_SP or REG_FP.
   - If the base register for CFA tracking is REG_SP, the precise amount of
     stack usage (and hence, the value of REG_SP) must be known at all times.
   - If using dynamic stack allocation, the function must switch to
     FP-based CFA.  This means using instructions like the following (in
     AMD64) in prologue:
        pushq   %rbp
        movq    %rsp, %rbp
     and analogous instructions in epilogue.
   - Save and Restore of callee-saved registers must be symmetrical.
     However, the SCFI machinery at this time only warns if any such
     asymmetry is seen.

These heuristics/rules are architecture-independent and are meant to
employed for all architectures/ABIs using SCFI in the future.

gas/
	* Makefile.am: Add new files.
	* Makefile.in: Regenerated.
	* as.c (defined): Handle documentation and listing option for
	ginsns and SCFI.
	* config/obj-elf.c (obj_elf_size): Invoke ginsn_data_end.
	(obj_elf_type): Invoke ginsn_data_begin.
	* config/tc-i386.c (x86_scfi_callee_saved_p): New function.
	(ginsn_prefix_66H_p): Likewise.
	(ginsn_dw2_regnum): Likewise.
	(x86_ginsn_addsub_reg_mem): Likewise.
	(x86_ginsn_addsub_mem_reg): Likewise.
	(x86_ginsn_alu_imm): Likewise.
	(x86_ginsn_move): Likewise.
	(x86_ginsn_lea): Likewise.
	(x86_ginsn_jump): Likewise.
	(x86_ginsn_jump_cond): Likewise.
	(x86_ginsn_enter): Likewise.
	(x86_ginsn_safe_to_skip): Likewise.
	(x86_ginsn_unhandled): Likewise.
	(x86_ginsn_new): New functionality to generate ginsns.
	(md_assemble): Invoke x86_ginsn_new.
	(s_insn): Likewise.
	(i386_target_format): Add hard error for usage of SCFI with non AMD64 ABIs.
	* config/tc-i386.h (TARGET_USE_GINSN): New definition.
	(TARGET_USE_SCFI): Likewise.
	(SCFI_MAX_REG_ID): Likewise.
	(REG_FP): Likewise.
	(REG_SP): Likewise.
	(SCFI_INIT_CFA_OFFSET): Likewise.
	(SCFI_CALLEE_SAVED_REG_P): Likewise.
	(x86_scfi_callee_saved_p): Likewise.
	* gas/listing.h (LISTING_GINSN_SCFI): New define for ginsn and
	SCFI.
	* gas/read.c (read_a_source_file): Close SCFI processing at end
	of file read.
	* gas/scfidw2gen.c (scfi_process_cfi_label): Add implementation.
	(scfi_process_cfi_signal_frame): Likewise.
	* subsegs.h (struct frch_ginsn_data): New forward declaration.
	(struct frchain): New member for ginsn data.
	* gas/subsegs.c (subseg_set_rest): Initialize the new member.
	* symbols.c (colon): Invoke ginsn_frob_label to convey
	user-defined labels to ginsn infrastructure.
	* ginsn.c: New file.
	* ginsn.h: New file.
	* scfi.c: New file.
	* scfi.h: New file.
2024-01-15 03:31:35 -08:00

385 lines
13 KiB
C

/* ginsn.h - GAS instruction representation.
Copyright (C) 2023 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.
GAS is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
02110-1301, USA. */
#ifndef GINSN_H
#define GINSN_H
#include "as.h"
/* Maximum number of source operands of a ginsn. */
#define GINSN_NUM_SRC_OPNDS 2
/* A ginsn in printed in the following format:
"ginsn: OPCD SRC1, SRC2, DST"
"<-5-> <--------125------->"
where each of SRC1, SRC2, and DST are in the form:
"%rNN," (up to 5 chars)
"imm," (up to int32_t+1 chars)
"[%rNN+-imm]," (up to int32_t+9 chars)
Hence a max of 19 chars. */
#define GINSN_LISTING_OPND_LEN 40
#define GINSN_LISTING_LEN 156
enum ginsn_gen_mode
{
GINSN_GEN_NONE,
/* Generate ginsns for program validation passes. */
GINSN_GEN_FVAL,
/* Generate ginsns for synthesizing DWARF CFI. */
GINSN_GEN_SCFI,
};
/* ginsn types.
GINSN_TYPE_PHANTOM are phantom ginsns. They are used where there is no real
machine instruction counterpart, but a ginsn is needed only to carry
information to GAS. For example, to carry an SCFI Op.
Note that, ginsns do not have a push / pop instructions.
Instead, following are used:
type=GINSN_TYPE_LOAD, src=GINSN_SRC_INDIRECT, REG_SP: Load from stack.
type=GINSN_TYPE_STORE, dst=GINSN_DST_INDIRECT, REG_SP: Store to stack.
*/
#define _GINSN_TYPES \
_GINSN_TYPE_ITEM (GINSN_TYPE_SYMBOL, "SYM") \
_GINSN_TYPE_ITEM (GINSN_TYPE_PHANTOM, "PHANTOM") \
_GINSN_TYPE_ITEM (GINSN_TYPE_ADD, "ADD") \
_GINSN_TYPE_ITEM (GINSN_TYPE_AND, "AND") \
_GINSN_TYPE_ITEM (GINSN_TYPE_CALL, "CALL") \
_GINSN_TYPE_ITEM (GINSN_TYPE_JUMP, "JMP") \
_GINSN_TYPE_ITEM (GINSN_TYPE_JUMP_COND, "JCC") \
_GINSN_TYPE_ITEM (GINSN_TYPE_MOV, "MOV") \
_GINSN_TYPE_ITEM (GINSN_TYPE_LOAD, "LOAD") \
_GINSN_TYPE_ITEM (GINSN_TYPE_STORE, "STORE") \
_GINSN_TYPE_ITEM (GINSN_TYPE_RETURN, "RET") \
_GINSN_TYPE_ITEM (GINSN_TYPE_SUB, "SUB") \
_GINSN_TYPE_ITEM (GINSN_TYPE_OTHER, "OTH")
enum ginsn_type
{
#define _GINSN_TYPE_ITEM(NAME, STR) NAME,
_GINSN_TYPES
#undef _GINSN_TYPE_ITEM
};
enum ginsn_src_type
{
GINSN_SRC_UNKNOWN,
GINSN_SRC_REG,
GINSN_SRC_IMM,
GINSN_SRC_INDIRECT,
GINSN_SRC_SYMBOL,
};
/* GAS instruction source operand representation. */
struct ginsn_src
{
enum ginsn_src_type type;
/* DWARF register number. */
unsigned int reg;
/* Immediate or disp for indirect memory access. */
offsetT immdisp;
/* Src symbol. May be needed for some control flow instructions. */
const symbolS *sym;
};
enum ginsn_dst_type
{
GINSN_DST_UNKNOWN,
GINSN_DST_REG,
GINSN_DST_INDIRECT,
};
/* GAS instruction destination operand representation. */
struct ginsn_dst
{
enum ginsn_dst_type type;
/* DWARF register number. */
unsigned int reg;
/* Disp for indirect memory access. */
offsetT disp;
};
/* Various flags for additional information per GAS instruction. */
/* Function begin or end symbol. */
#define GINSN_F_FUNC_MARKER 0x1
/* Identify real or implicit GAS insn.
Some targets employ CISC-like instructions. Multiple ginsn's may be used
for a single machine instruction in some ISAs. For some optimizations,
there is need to identify whether a ginsn, e.g., GINSN_TYPE_ADD or
GINSN_TYPE_SUB is a result of an user-specified instruction or not. */
#define GINSN_F_INSN_REAL 0x2
/* Identify if the GAS insn of type GINSN_TYPE_SYMBOL is due to a user-defined
label. Each user-defined labels in a function will cause addition of a new
ginsn. This simplifies control flow graph creation.
See htab_t label_ginsn_map usage. */
#define GINSN_F_USER_LABEL 0x4
/* Max bit position for flags (uint32_t). */
#define GINSN_F_MAX 0x20
#define GINSN_F_FUNC_BEGIN_P(ginsn) \
((ginsn != NULL) \
&& (ginsn->type == GINSN_TYPE_SYMBOL) \
&& (ginsn->flags & GINSN_F_FUNC_MARKER))
/* PS: For ginsn associated with a user-defined symbol location,
GINSN_F_FUNC_MARKER is unset, but GINSN_F_USER_LABEL is set. */
#define GINSN_F_FUNC_END_P(ginsn) \
((ginsn != NULL) \
&& (ginsn->type == GINSN_TYPE_SYMBOL) \
&& !(ginsn->flags & GINSN_F_FUNC_MARKER) \
&& !(ginsn->flags & GINSN_F_USER_LABEL))
#define GINSN_F_INSN_REAL_P(ginsn) \
((ginsn != NULL) \
&& (ginsn->flags & GINSN_F_INSN_REAL))
#define GINSN_F_USER_LABEL_P(ginsn) \
((ginsn != NULL) \
&& (ginsn->type == GINSN_TYPE_SYMBOL) \
&& !(ginsn->flags & GINSN_F_FUNC_MARKER) \
&& (ginsn->flags & GINSN_F_USER_LABEL))
typedef struct ginsn ginsnS;
typedef struct scfi_op scfi_opS;
typedef struct scfi_state scfi_stateS;
/* GAS generic instruction.
Generic instructions are used by GAS to abstract out the binary machine
instructions. In other words, ginsn is a target/ABI independent internal
representation for GAS. Note that, depending on the target, there may be
more than one ginsn per binary machine instruction.
ginsns can be used by GAS to perform validations, or even generate
additional information like, sythesizing DWARF CFI for hand-written asm. */
struct ginsn
{
enum ginsn_type type;
/* GAS instructions are simple instructions with GINSN_NUM_SRC_OPNDS number
of source operands and one destination operand at this time. */
struct ginsn_src src[GINSN_NUM_SRC_OPNDS];
struct ginsn_dst dst;
/* Additional information per instruction. */
uint32_t flags;
/* Symbol. For ginsn of type other than GINSN_TYPE_SYMBOL, this identifies
the end of the corresponding machine instruction in the .text segment.
These symbols are created anew by the targets and are not used elsewhere
in GAS. The only exception is some ginsns of type GINSN_TYPE_SYMBOL, when
generated for the user-defined labels. See ginsn_frob_label. */
const symbolS *sym;
/* Identifier (linearly increasing natural number) for each ginsn. Used as
a proxy for program order of ginsns. */
uint64_t id;
/* Location information for user-interfacing messaging. Only ginsns with
GINSN_F_FUNC_BEGIN_P and GINSN_F_FUNC_END_P may present themselves with no
file or line information. */
const char *file;
unsigned int line;
/* Information needed for synthesizing CFI. */
scfi_opS **scfi_ops;
uint32_t num_scfi_ops;
/* Flag to keep track of visited instructions for CFG creation. */
bool visited;
ginsnS *next; /* A linked list. */
};
struct ginsn_src *ginsn_get_src1 (ginsnS *ginsn);
struct ginsn_src *ginsn_get_src2 (ginsnS *ginsn);
struct ginsn_dst *ginsn_get_dst (ginsnS *ginsn);
unsigned int ginsn_get_src_reg (struct ginsn_src *src);
enum ginsn_src_type ginsn_get_src_type (struct ginsn_src *src);
offsetT ginsn_get_src_disp (struct ginsn_src *src);
offsetT ginsn_get_src_imm (struct ginsn_src *src);
unsigned int ginsn_get_dst_reg (struct ginsn_dst *dst);
enum ginsn_dst_type ginsn_get_dst_type (struct ginsn_dst *dst);
offsetT ginsn_get_dst_disp (struct ginsn_dst *dst);
/* Data object for book-keeping information related to GAS generic
instructions. */
struct frch_ginsn_data
{
/* Mode for GINSN creation. */
enum ginsn_gen_mode mode;
/* Head of the list of ginsns. */
ginsnS *gins_rootP;
/* Tail of the list of ginsns. */
ginsnS *gins_lastP;
/* Function symbol. */
const symbolS *func;
/* Start address of the function. */
symbolS *start_addr;
/* User-defined label to ginsn mapping. */
htab_t label_ginsn_map;
/* Is the list of ginsn apt for creating CFG. */
bool gcfg_apt_p;
};
int ginsn_data_begin (const symbolS *func);
int ginsn_data_end (const symbolS *label);
const symbolS *ginsn_data_func_symbol (void);
void ginsn_frob_label (const symbolS *sym);
void frch_ginsn_data_init (const symbolS *func, symbolS *start_addr,
enum ginsn_gen_mode gmode);
void frch_ginsn_data_cleanup (void);
int frch_ginsn_data_append (ginsnS *ginsn);
enum ginsn_gen_mode frch_ginsn_gen_mode (void);
void label_ginsn_map_insert (const symbolS *label, ginsnS *ginsn);
ginsnS *label_ginsn_map_find (const symbolS *label);
ginsnS *ginsn_new_symbol_func_begin (const symbolS *sym);
ginsnS *ginsn_new_symbol_func_end (const symbolS *sym);
ginsnS *ginsn_new_symbol_user_label (const symbolS *sym);
ginsnS *ginsn_new_phantom (const symbolS *sym);
ginsnS *ginsn_new_symbol (const symbolS *sym, bool real_p);
ginsnS *ginsn_new_add (const symbolS *sym, bool real_p,
enum ginsn_src_type src1_type, unsigned int src1_reg, offsetT src1_disp,
enum ginsn_src_type src2_type, unsigned int src2_reg, offsetT src2_disp,
enum ginsn_dst_type dst_type, unsigned int dst_reg, offsetT dst_disp);
ginsnS *ginsn_new_and (const symbolS *sym, bool real_p,
enum ginsn_src_type src1_type, unsigned int src1_reg, offsetT src1_disp,
enum ginsn_src_type src2_type, unsigned int src2_reg, offsetT src2_disp,
enum ginsn_dst_type dst_type, unsigned int dst_reg, offsetT dst_disp);
ginsnS *ginsn_new_call (const symbolS *sym, bool real_p,
enum ginsn_src_type src_type, unsigned int src_reg,
const symbolS *src_text_sym);
ginsnS *ginsn_new_jump (const symbolS *sym, bool real_p,
enum ginsn_src_type src_type, unsigned int src_reg,
const symbolS *src_ginsn_sym);
ginsnS *ginsn_new_jump_cond (const symbolS *sym, bool real_p,
enum ginsn_src_type src_type, unsigned int src_reg,
const symbolS *src_ginsn_sym);
ginsnS *ginsn_new_mov (const symbolS *sym, bool real_p,
enum ginsn_src_type src_type, unsigned int src_reg, offsetT src_disp,
enum ginsn_dst_type dst_type, unsigned int dst_reg, offsetT dst_disp);
ginsnS *ginsn_new_store (const symbolS *sym, bool real_p,
enum ginsn_src_type src_type, unsigned int src_reg,
enum ginsn_dst_type dst_type, unsigned int dst_reg, offsetT dst_disp);
ginsnS *ginsn_new_load (const symbolS *sym, bool real_p,
enum ginsn_src_type src_type, unsigned int src_reg, offsetT src_disp,
enum ginsn_dst_type dst_type, unsigned int dst_reg);
ginsnS *ginsn_new_sub (const symbolS *sym, bool real_p,
enum ginsn_src_type src1_type, unsigned int src1_reg, offsetT src1_disp,
enum ginsn_src_type src2_type, unsigned int src2_reg, offsetT src2_disp,
enum ginsn_dst_type dst_type, unsigned int dst_reg, offsetT dst_disp);
ginsnS *ginsn_new_other (const symbolS *sym, bool real_p,
enum ginsn_src_type src1_type, unsigned int src1_val,
enum ginsn_src_type src2_type, unsigned int src2_val,
enum ginsn_dst_type dst_type, unsigned int dst_reg);
ginsnS *ginsn_new_return (const symbolS *sym, bool real_p);
void ginsn_set_where (ginsnS *ginsn);
bool ginsn_track_reg_p (unsigned int dw2reg, enum ginsn_gen_mode);
int ginsn_link_next (ginsnS *ginsn, ginsnS *next);
enum gcfg_err_code
{
GCFG_OK = 0,
GCFG_JLABEL_NOT_PRESENT = 1, /* Warning-level code. */
};
typedef struct gbb gbbS;
typedef struct gedge gedgeS;
/* GBB - Basic block of generic GAS instructions. */
struct gbb
{
ginsnS *first_ginsn;
ginsnS *last_ginsn;
uint64_t num_ginsns;
/* Identifier (linearly increasing natural number) for each gbb. Added for
debugging purpose only. */
uint64_t id;
bool visited;
uint32_t num_out_gedges;
gedgeS *out_gedges;
/* Members for SCFI purposes. */
/* SCFI state at the entry of basic block. */
scfi_stateS *entry_state;
/* SCFI state at the exit of basic block. */
scfi_stateS *exit_state;
/* A linked list. In order of addition. */
gbbS *next;
};
struct gedge
{
gbbS *dst_bb;
/* A linked list. In order of addition. */
gedgeS *next;
bool visited;
};
/* Control flow graph of generic GAS instructions. */
struct gcfg
{
uint64_t num_gbbs;
gbbS *root_bb;
};
typedef struct gcfg gcfgS;
#define bb_for_each_insn(bb, ginsn) \
for (ginsn = bb->first_ginsn; ginsn; \
ginsn = (ginsn != bb->last_ginsn) ? ginsn->next : NULL)
#define bb_for_each_edge(bb, edge) \
for (edge = (edge == NULL) ? bb->out_gedges : edge; edge; edge = edge->next)
#define cfg_for_each_bb(cfg, bb) \
for (bb = cfg->root_bb; bb; bb = bb->next)
#define bb_get_first_ginsn(bb) \
(bb->first_ginsn)
#define bb_get_last_ginsn(bb) \
(bb->last_ginsn)
gcfgS *gcfg_build (const symbolS *func, int *errp);
void gcfg_cleanup (gcfgS **gcfg);
void gcfg_print (const gcfgS *gcfg, FILE *outfile);
gbbS *gcfg_get_rootbb (gcfgS *gcfg);
void gcfg_get_bbs_in_prog_order (gcfgS *gcfg, gbbS **prog_order_bbs);
#endif /* GINSN_H. */