o When unpacking an r5900 FP value,
was not treating IEEE-NaN's as very
large values.
o When packing an r5900 FP result from an infinite
precision intermediate value was saturating
to IEEE-MAX instead of r5900-MAX
o The least significant bit of the FP status
register did not stick to one.
[ChangeLog]
Mon Apr 13 16:28:52 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (decode_coproc): Add proper 1000000 bit-string at top
of VU lower instruction.
VCALLMS-related were found/fixed.
[ChangeLog.sky]
* sky-vu.c ({read,write}_vu_special_reg): Add CMSAR[01] as special
registers for a VU. Behavior not as mandated.
({read,write}_vu_{misc,special}_reg): Create sim_io_error upon
access to unknown register. Behavior not as mandated.
* sky-vu.h (anonymous register numbering enum): Add CMSAR[01].
* sky-libvpe.c (indebug): Cache $ENV{'SKY_DEBUG'}.
[ChangeLog]
* Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
* interp.c (decode_coproc): Refer to VU CIA as a "special"
register, not as a "misc" register. Aha. Add activity
assertions after VCALLMS* instructions.
work!
[ChangeLog.sky]
* sky-vu.h (vu_device): Represent "macro instruction just stuffed
into fetch buffer" condition with new "m" bit. Rename old "m" to
"l".
* sky-libvpe.c (indebug): Save snapshot of environment value;
workaround for suspected memory corruption.
(fetch_inst): Respect new "m" macro-instruction flag for reporting
successful fetch to caller.
(exec_inst): Disassemble instruction here instead of fetch time.
Renamed old "m" -> "l" flag in VU state to track interlock
release.
(vpecallms_cycle): Call exec_inst only if fetch_inst did some
work.
* sky-vu.c (vu_attach, vu[01]_device): Revamped initialization to
ensure complete clear of tail part of struct at attach time.
(vu0_busy): Fix thinko.
(vu0_macro_issue): Adapt to new "l" flag.
(vu0_micro_interlock_released): Ditto.
(write_vu_special_reg): Ditto.
(read_vu_special_reg): Compute VBS0/VBS1 bits more explicitly.
The other VU status bits are not yet computed.
[ChangeLog]
* interp.c (decode_coproc): Do not apply superfluous E (end) flag
to upper code of generated VU instruction.
masking facility for PATH3 transfers.
[ChangeLog.sky]
Sun Apr 5 12:11:45 1998 Frank Ch. Eigler <fche@cygnus.com>
* sky-libvpe.c (exec-inst): Added "M" bit detection for upper
instruction.
* sky-pke.c (pke_check_stall): Added more assertions.
(pke_code_mskpath3): Use new GPUIF M3P control register.
* sky-pke.h (VU[01]_CIA): New macros that give VU CIA
pseudo-register addresses.
* sky-vu.h (vu_device, VectorUnitState): Merged structs.
(VectorUnitState.mflag): New field.
(VU_REG_{CMSAR0,CMSAR1,FBRST}) Added missing control registers.
* sky-vu.c (vu0_busy): New function.
(vu0_q_busy): New function.
(vu0_macro_issue): New function.
(vu0_micro_interlock_released): New function.
(vu0_busy_in_{micro,macro}_mode): Deleted stubs.
(vu0_macro_hazard_check): Deleted stubs.
(vu_attach): Adapted code to merged device & state struct.
(read_vu_special_reg): Compute VBS0/VBS1 bits in STAT register.
[ChangeLog]
start-sanitize-sky
Sun Apr 5 12:05:44 1998 Frank Ch. Eigler <fche@cygnus.com>
* interp.c (*): Adapt code to merged VU device & state structs.
(decode_coproc): Execute COP2 each macroinstruction without
pipelining, by stepping VU to completion state. Adapted to
read_vu_*_reg style of register access.
* mips.igen ([SL]QC2): Removed these COP2 instructions.
* r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
* sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
end-sanitize-sky
into single PKE-style vu.[ch].
[ChangeLog]
Fri Mar 27 16:19:29 1998 Frank Ch. Eigler <fche@cygnus.com>
start-sanitize-sky
* Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
* interp.c (sim_{load,store}_register): Use new vu[01]_device
static to access VU registers.
(decode_coproc): Added skeleton of sky COP2 (VU) instruction
decoding. Work in progress.
* mips.igen (LDCzz, SDCzz): Removed *5900 case for this
overlapping/redundant bit pattern.
(LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in
progress.
* sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
status register.
end-sanitize-sky
* interp.c (cop_lq, cop_sq): New functions for future 128-bit
access to coprocessor registers.
* sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
[ChangeLog.sky]
* sky-engine.c (engine_run): Adapted from vu[01] -> vu merge.
* sky-hardware.c (register_devices): Ditto
* sky-pke.c (pke_fifo_*): Made these functions private again, now
that the GPUIF code does not use them.
* sky-pke.h (pke_fifo_*): Removed newly private declarations.
* sky-vu.c (*): Major rework: merge of old sky-vu0.c and
sky-vu1.c. Management of two VU devices parallels two PKEs.
Work in progress.
* sky-vu.h (*): Other half of merge.
(vu_device): New struct, parallel to pke_device.
sky-gs.h: initial drop of GS control registers
Makefile.in: added sky-gs.o to sanitized list
sky-gpuif.c (gif_io_write_buffer): correct memset length error, renamed
trace file for gif
* sky-pke.h (pke_fifo*): Exported these formerly private functions.
(pke_device): Added FIFO cache fields.
* sky-pke.c (pke_fifo_reset): New function for GPUIF client -
clear FIFO contents.
(pke_pcrel_fifo): Added caching facility to prevent O(n^2) cost for
searching for consecutive operand words.
* sky-libvpe.c (MEM, uMEM): New/changed macros that perform modulo
calculations to handle out-of-range VU memory addresses.
(*): Replaced many previous uses of MEM[] and state->uMEM[] with
calls to above macros.
* sky-vu.h (struct VectorUnitState): Added qw/dw size fields for
MEM/uMEM buffers, for overflow prevention. Renamed MEM/uMEM fields
to catch all their prior users.
* sky-vu0.c (vu0_attach): Manually align MEM0/MEM1 buffers to force
16-byte alignment. (zalloc is not enough.)
* sky-vu1.c (vu1_attach): Ditto.
(init_vu): Store buffer sizes from allocation into VectorUnitState.
* sky-gpuif.h (GifPath): Use a pke_fifo strucf instead of
temporary fixed-size array for flexible FIFO sizing.
* sky-gpuif.c (SKY_GPU2_REFRESH): This is now an integer value to be
used as a modulus for periodic refresh.
(refresh): New function to send GPU2 refresh code periodically.
(*): Use pke_fifo calls to en/dequeue GPUIF tags & operands.
* sky-pke.h (struct pke_device): Added fields to allow caching of
results from recent FIFO searches.
the stand-alone executable.
[in ChangeLog.sky:]
* sky-gpuif.c (call_gs): Call properly into GPU2 library if
configured --with-sim-gpu2. Use SKY_GPU2_REFRESH symbol as
placeholder for future GPU2-refresh policy.
[in ChangeLog:]
* Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
configurable settings for stand-alone simulator.
start-sanitize-sky
* configure.in: Added --with-sim-gpu2 option to specify path of
sky GPU2 library. Triggers -DSKY_GPU2 for sky-gpuif.c, and
links/compiles stand-alone simulator with this library.
* interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
end-sanitize-sky
* configure.in: Added X11 search, just in case.
* configure: Regenerated.
effectively full. The code is believed to be functionally complete now.
Some code cleanup is included at no extra charge in this version.
Fri Mar 13 20:21:57 1998 Frank Ch. Eigler <fche@cygnus.com>
* sky-vu1.c: (dump_mem): Commented out function to satiate
warning-ful compilation.
* sky-pke.c: (pke_reset): New function, called explicitly at
initialization and at FBRST.
(pke_fifo_flush): New function to flush (skip over) existing
quadwords in FIFO.
(pke_fifo_fit): New function to add space for new quadword in
FIFO.
(pke_fifo_access): New function to absolute-index into FIFO.
(pke_fifo_old): New function to remove old quadwords from FIFO.
(pke_begin_interrupt_stall): New function to abstract
interrupt-caused stalls.
(pke_*): Access PKE FIFO only thorugh pke_fifo functions.
(pke_pcrel_*): Renamed pke_pc_* functions.
(pke_code_unpack): Numerous logic tweaks for latest UNPACK
behavior changes & clarifications from SCEI.
* sky-pke.h (struct pke_fifo): New explicit FIFO representation.
(struct pke_device): Use struct above.
(PKE_DEBUG): Removed macro as misnomer.
* sky-hardware.c: Moved *_cmd_install declarations out.
* sky-hardware.h: Moved *_cmd_install declarations in.
for sim/testsuite/sky:
* t-pke4.run: Removed test, since it succeeds yet returns a
non-zero exit code.
* Makefile.in (RUNOPTS): Removed --memory-size flag, made
unnecessary by sim/mips/interp.c changes.
(TESTS): Removed t-pke4.ok target.
* t-pke3.trc: Classified tests with [---] indicators, to match
items up with entries documented in testplan.sgml. Added numerous
additional tests. They assert behavior that assumes certain
favorable answers to PKE question set #6 to SCEI.
* t-pke1.trc: Added some [---] indicators.
for sim/mips:
* sky-pke.c (pke_issue): Revamped interrupt & stall code. Assume
that ER1/ER0/PIS bits are only set if not masked by ERR bits.
Signal PIS only if unmasked.
(pke_code_error): Signal ER1 only if unmasked.
(pke_pc_fifo): Signal ER0 only if unmasked.
(pke_code_unpack): Round up num_operands for last operand's
partial-word. Factor out "R" bit handling for better coverage
analysis. Fill upper words of a quadword with zeroes for Vn_m
UNPACK with n < 4.
* sky-device.c (device_error): Made function accept varargs.
* sky-device.h (device_error): Changed declaration to match.
* interp.c (sim_open): Made 0x0000 area memory be an alias of
the K0/K1 segments. Sanitized code.
* Makefile.in (vr4320.igen) : Added.
* configure.in (mips64vr4320-*-*): Added.
* configure : Rebuilt.
* mips.igen : Correct the bfd-names in the mips-ISA model entries.
Add the vr4320 model entry and mark the vr4320 insn as necessary.
* sky-vu1.c (vu1_io_write_register_window): Make CIA (pc) write
effective by updating more registers.
* sky-libvpe.c: Updated to match earlier VU state-change code.
* sky-vpe.h: Removed unused globals from declarations.
PKE tests run identically on SPARC/Solaris and x86/Linux.
* sky-pke.c (pke_io_{read,write}_buffer): Endianness fixes aka
"E-fixes" in register and FIFO read/writes.
(pke_code_{pkemscalf,pkemscal}): E-fixes in VU CIA setting.
(pke_code_{mpg,unpack}): E-fixes in VU memory & tracking updates.
(pke_code_direct): E-fixes in GPUIF FIFO stuffing.
* sky-pke.h (PKE_MEM_WRITE): E-fixes in trace file writing.
* sky-vu0.c (vu0_attach): Allocate micro/data memory with zalloc
to guarantee sufficient (16-byte) alignment.
* sky-vu1.c (vu1_attach): Ditto.
(vu1_io_read_register_window): *PARTIAL* E-fixes in register accesses.
* sky-libvpe.c (gif_write): E-fixes in GPUIF FIFO stuffing.
* sky-gpuif.c (gif_io_{read,write}_buffer): E-fixes in
register and FIFO read/writes.
* sky-dma.c (do_dma_transfer_tag): E-fixes in tag reading.
mechanism is starting to subside.
* sky-pke.h (PKE_FLAG_INT_NOLOOP): Added device flag to indicate
presence of stalled & interrupted PKEcode.
* sky-pke.c (pke_issue): Added PKEcode interrupt bit handling.
(pke_flip_dbf): Changed double-buffering logic to match SCEI
clarification.
(pke_code_*): Added interrupt bit stalling clause.
(pke_code_pkems*): Added ITOP/ITOPS transmission code.
(pke_code_unpack): Added more careful logic for processing
overflows of VU data memory addresses.
* sky-pke.h (PKE_MEM_READ): Removed "read" entry from FIFO trace.
* sky-pke.c (pke_attach): Set trace file to line buffering iff
open.
(pke_io_read_buffer, pke_io_write_buffer): Handle erroneous
reads/writes by zero-padding.
(pke_io_write_buffer): Switch to more bit-field definition macros.
(pke_issue): Remove "stalled" entry from FIFO trace.
(pke_pc_advance): Correct logic for DMA-tag-skipping, PKEcode
classification.
(pke_code_mskpath3): Sketch of possible PATH3 masking method.
(pke_code_mpg): Keep order of lower/upper VU words as supplied.
(pke_code_unpack): Logic change for wl/cl/num unpacking. Weird.
little struct.
interp.c: Update. Also add floating point Max/Min functions.
mips.igen: Remove r5900 tag from any floating point instructions.
r5900.igen: Rewrite. Implement *all* floating point insns (except ld/st).
r5400.igen: Tag mdmx functions as being mdmx specific.
were hammered in today's runs. Work is beginning in endian-proofing
the code.
* sky-pke.c (pke1_issue): Issue on correct PKE device.
(pke_io_write_buffer, pke_code_mpg, pke_code_unpack): Perform more
endian conversions.
(pke_code_mpg, pke_code_direct): Add operand alignment assertions.
(pke_code_mpg): Correct VU stall checks. Correct VU opcode
transfer ordering.
(pke_code_direct): Correct typos in DIRECT operand accessing.
(pke_code_unpack): Correct conditional sign-extension handling.
* sky-gpuif.c (gif_io_read_buffer, gif_io_write_buffer): Correct
assertion polarity.
(gif_read_tag): Disable faulty DMA-tag testing code.
the SCEI PKE simulator's output on its own test sample (tsv432.in).
* sky-pke.h (PKE_MEM_READ, PKE_MEM_WRITE, PKE_REG_MASK_SET): Add
trace file records.
* sky-pke.c: (pke_track_write): Removed function. Replaced with
in-line modifications to VU tracking tables.
(pke_attach): Attach VU tracking tables. Use line buffering on
trace files.
(pke_issue): Spit out additional trace records.
(pke_pc_operand_bits): Correct bitfield masking error.
(*): Replace sim_read/write with kludge PKE_MEM_READ/WRITE
throughout.
(pke_code_unpack): Correct numerous small bugs in operand decoding
etc.
A few PKE instructions even run correctly! Next missing function of
interest: FIFO pruning.
* sky-pke.c (pke_issue): Take extra SIM_DESC argument.
(pke_attach): Attach correct PKE0/PKE1 device. Open trace file if
VIF{0,1}_TRACE_FILE env. var. is defined.
(pke_io_write_buffer): Classify words in FIFO quadword. Use
kludgey sim_core routines to access DMA registers.
(pke_pc_advance): Add PKEcode classification. Correct DMA tag
skipping. Emit trace records.
(pke_pc_fifo): Add PKEcode operand classification.
(pke_check_stall): Perform stall checks against updated register
scheme.
(pke_code_unpack): Correct operand-count calculation.
(pke_code_stmask): Correct instruction skipping.
* sky-pke.h (PKE_MEM_WRITE, PKE_MEM_READ): New kludge macros.
(BIT_MASK_BTW): Corrected off-by-one error.
(enum wordclass): Classify words in a FIFO quadword.
* sky-dma.c (dma_io_read_buffer): Correct address checking assertions.
* sky-engine.c (engine_run): Pass along SIM_DESC to PKE
instruction issue code.
* handling of super duper packed UNPACK arguments
* skipping of in-progress instruction on break/stop
* interrupt generation to 5900
* PATH2/PATH3 status checking & masking
* ability to write to FIFO one word (instead of quadword) at a time
update v850, tic80 and mips simulators.
IGEN - Prepend prefix to more generated symbols and macros
(idecode_issue, instruction_word).
IGEN - Add -Wnowith option to supress warnings about word size
inflicts in input files.
MIPS - Clean up Makefile.in, m16.igen, m16.dc (new), m16run.c (new) so
that a mips16 simulator built using IGEN can be compiled.
Use the bfd-processor name in the sim-engine switch.
Add nr_cpus argument to sim_engine_run.
tic80, v850, d30v, mips, common:
Update
mips: Fill in bfd-processor field of model records so that
they match ../bfd/archures.
For sim/mips, enable multi-sim support when mips64vr5400-elf is target.
For sim/igen, allow specification of a default machine (will need
more work later).
(ANDI): Was missing mipsIV model, fix assembler syntax.
(do_c_cond_fmt): New function.
(C.cond.fmt): Handle mips I-III which do not support CC field
separatly.
(bc1): Handle mips IV which do not have a delaed FCC separatly.
(SDR): Mask paddr when BigEndianMem, not the converse as specified
in IV3.2 spec.
(DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
vr5000 which saves LO in a GPR separatly.
* configure.in (enable-sim-igen): For vr5000, select vr5000
specific instructions.
* configure: Re-generate.
MIPS simulator so that correctly writes the value of CIA back int PC
(the global previously used) when the simulation halts.
Fix implementation of DELAY_SLOT and NULLIFY_NEXT_INSTRUCTION macros.
calls) and sim_open so that they uses the virtual memory data transfer
functions sim_read & sim_write. This eliminates all code (other than
in load_memory & store_memory) that makes assumptions about the
implementation of the underlying memory model.
When address translation of insn fetch fails raise exception immediatly.
Use address_word as type of all address variables (instead of unsigned64),
the former is configured as either 32 or 64 bit type.
Always compile fpu code (no #if has fpu)
* gencode.c (SDBBP,DERET): Added (3900) insns.
(RFE): Turn on for 3900.
* interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
(dsstate): Made global.
(SUBTARGET_R3900): Added.
(CANCELDELAYSLOT): New.
(SignalException): Ignore SystemCall rather than ignore and
terminate. Add DebugBreakPoint handling.
(decode_coproc): New insns RFE, DERET; and new registers Debug
and DEPC protected by SUBTARGET_R3900.
(sim_engine_run): Use CANCELDELAYSLOT rather than clearing
bits explicitly.
* Makefile.in,configure.in: Add mips subtarget option.
* configure: Update.
Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
