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f3da8a96ee
148 Commits
Author | SHA1 | Message | Date | |
---|---|---|---|---|
Alan Modra
|
fe0e921f00 |
PR26513, 629310abec breaks assembling PowerPC Linux kernels
Inserting with replacement is wrong for some gas hash table uses. This patch implements an htab_insert that conditionally replaces, and similarly for str_hash_insert. str_hash_insert with replace=0 is roughly equivalent to the older hash_insert, and str_hash_insert with replace=1 to the older hash_jam, but return values are different. I found it useful to know whether the slot was occupied prior to inserting/replacing. I've also reinstated the fatal errors on messing up opcode tables with duplicates. PR 26513 * hash.h (htab_insert): Update prototype and comment. (struct string_tuple): Make "value" a const void*. (string_tuple_alloc): Likewise. (str_hash_find, str_hash_find_n): Cast returned value. (str_hash_insert): Add "replace" parameter, and return slot pointer. Free alloc'd element when not inserted. * hash.c (htab_insert): Likewise. Return slot when element exists, otherwise return NULL. * read.c (pop_insert): Insert into hash table without first searching. * config/tc-avr.c (md_begin): Likewise. * config/tc-msp430.c (md_begin): Likewise. * config/tc-nds32.c (nds32_init_nds32_pseudo_opcodes): Likewise. * config/tc-v850.c (md_begin): Likewise. * macro.c (do_formals, define_macro, macro_expand_body): Likewise. (delete_macro): Delete from hash table. * config/tc-tic54x.c (subsym_create_or_replace): Correct logic. * symbols.c (local_symbol_make, symbol_table_insert): Allow replacement of hash table entries. * config/obj-coff-seh.c (seh_hash_insert): Likewise. * config/obj-coff.c (tag_insert): Likewise. * config/tc-iq2000.c (iq2000_add_macro): Likewise. * config/tc-m68k.c (md_begin): Likewise for aliases. * config/tc-tic4x.c (tic4x_asg): Likewise. * config/tc-tic6x.c (md_begin): Likewise. * dw2gencfi.c (dwcfi_hash_find_or_make): Disallow replacement of hash table entries. * ecoff.c (add_string, get_tag): Likewise. * macro.c (expand_irp): Likewise. * config/obj-elf.c (build_additional_section_info): Likewise. * config/tc-aarch64.c (insert_reg_alias): Likewise. (checked_hash_insert): Likewise. * config/tc-alpha.c (get_alpha_reloc_tag, md_begin): Likewise. * config/tc-arc.c (arc_insert_opcode, declare_register): Likewise. (declare_addrtype, md_begin, arc_extcorereg): Likewise. * config/tc-arm.c (insert_reg_alias): Likewise. (arm_tc_equal_in_insn, md_begin): Likewise. * config/tc-cr16.c (initialise_reg_hash_table, md_begin): Likewise. * config/tc-cris.c (md_begin): Likewise. * config/tc-crx.c (md_begin): Likewise. * config/tc-csky.c (md_begin): Likewise. * config/tc-d10v.c (md_begin): Likewise. * config/tc-dlx.c (md_begin): Likewise. * config/tc-ft32.c (md_begin): Likewise. * config/tc-h8300.c (md_begin): Likewise. * config/tc-hppa.c (md_begin): Likewise. * config/tc-i386.c (md_begin): Likewise. * config/tc-ia64.c (dot_rot, dot_entry, declare_register): Likewise. (md_begin, dot_alias): Likewise. * config/tc-m68hc11.c (md_begin): Likewise. * config/tc-m68k.c (md_begin): Likewise. * config/tc-mcore.c (md_begin): Likewise. * config/tc-microblaze.c (md_begin): Likewise. * config/tc-mips.c (md_begin): Likewise. * config/tc-mmix.c (md_begin): Likewise. * config/tc-mn10200.c (md_begin): Likewise. * config/tc-mn10300.c (md_begin): Likewise. * config/tc-moxie.c (md_begin): Likewise. * config/tc-nds32.c (nds32_relax_hint, md_begin): Likewise. * config/tc-nios2.c (md_begin): Likewise. * config/tc-ns32k.c (md_begin): Likewise. * config/tc-pdp11.c (md_begin): Likewise. * config/tc-pj.c (fake_opcode, md_begin): Likewise. * config/tc-ppc.c (ppc_setup_opcodes): Likewise. * config/tc-pru.c (md_begin): Likewise. * config/tc-riscv.c (init_ext_version_hash): Likewise. (init_opcode_names_hash, hash_reg_name, init_opcode_hash): Likewise. (riscv_init_csr_hash): Likewise. * config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise. * config/tc-score.c (s3_insert_reg): Likewise. (s3_build_score_ops_hsh, s3_build_dependency_insn_hsh): Likewise. * config/tc-score7.c (s7_build_score_ops_hsh): Likewise. (s7_build_dependency_insn_hsh, s7_insert_reg): Likewise. * config/tc-sh.c (md_begin): Likewise. * config/tc-sparc.c (md_begin): Likewise. * config/tc-spu.c (md_begin): Likewise. * config/tc-tic30.c (md_begin): Likewise. * config/tc-tic4x.c (tic4x_inst_insert): Likewise. * config/tc-tic54x.c (stag_add_field_symbols, md_begin): Likewise. (tic54x_endstruct, tic54x_var, tic54x_macro_info): Likewise. (subsym_substitute): Likewise. * config/tc-tilegx.c (md_begin): Likewise. * config/tc-tilepro.c (md_begin): Likewise. * config/tc-vax.c (vip_begin): Likewise. * config/tc-wasm32.c (md_begin): Likewise. * config/tc-xgate.c (md_begin): Likewise. * config/tc-z8k.c (md_begin): Likewise. * testsuite/gas/ppc/dcbt.d, * testsuite/gas/ppc/dcbt.s: New test. * testsuite/gas/ppc/ppc.exp: Run it. * ecoff.c (add_string): Report fatal error on duplicates. * config/tc-alpha.c (md_begin): Likewise. * config/tc-arc.c (arc_insert_opcode, declare_register): Likewise. (declare_addrtype, md_begin, arc_extcorereg): Likewise. * config/tc-cr16.c (initialise_reg_hash_table, md_begin): Likewise. * config/tc-cris.c (md_begin): Likewise. * config/tc-crx.c (md_begin): Likewise. * config/tc-dlx.c (md_begin): Likewise. * config/tc-hppa.c (md_begin): Likewise. * config/tc-i386.c (md_begin): Likewise. * config/tc-ia64.c (dot_rot, dot_entry, declare_register): Likewise. (md_begin): Likewise. * config/tc-m68k.c (md_begin): Likewise. * config/tc-mips.c (md_begin): Likewise. * config/tc-nios2.c (md_begin): Likewise. * config/tc-ns32k.c (md_begin): Likewise. * config/tc-ppc.c (ppc_setup_opcodes): Likewise. * config/tc-pru.c (md_begin): Likewise. * config/tc-riscv.c (init_ext_version_hash): Likewise. (init_opcode_names_hash, hash_reg_name, init_opcode_hash): Likewise. * config/tc-s390.c (s390_setup_opcodes, md_begin): Likewise. * config/tc-sparc.c (md_begin): Likewise. * config/tc-tic30.c (md_begin): Likewise. * config/tc-tic4x.c (tic4x_inst_insert): Likewise. * config/tc-tilegx.c (md_begin): Likewise. * config/tc-tilepro.c (md_begin): Likewise. * config/tc-vax.c (vip_begin): Likewise. * config/tc-alpha.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-cr16.c, * config/tc-csky.c, * config/tc-i386.c, * config/tc-m68hc11.c, * config/tc-m68k.c, * config/tc-microblaze.c, * config/tc-ns32k.c, * config/tc-pj.c, * config/tc-ppc.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-xgate.c: Formatting. |
||
Alan Modra
|
e01e1cee39 |
Rearrange symbol_create parameters
These functions take an offset within frag, frag within section, and section parameter. So it makes sense to order the parameters as section, frag, offset. * symbols.h (symbol_new, symbol_create, local_symbol_make), (symbol_temp_new): Arrange params as section, frag, offset. * symbols.c: Adjust to suit. * as.c: Likewise. * cgen.c: Likewise. * dwarf2dbg.c: Likewise. * ecoff.c: Likewise. * expr.c: Likewise. * itbl-ops.c: Likewise. * read.c: Likewise. * stabs.c: Likewise. * subsegs.c: Likewise. * config/obj-coff.c: Likewise. * config/obj-elf.c: Likewise. * config/obj-macho.c: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-avr.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-cris.c: Likewise. * config/tc-csky.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-nds32.c: Likewise. * config/tc-nios2.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-riscv.c: Likewise. * config/tc-s390.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-xtensa.c: Likewise. |
||
Martin Liska
|
629310abec |
Port gas/config/* to str_htab.
* config/obj-coff-seh.c (seh_hash_insert): Port to use new str_htab type. (seh_hash_find): Likewise. (seh_hash_find_or_make): Likewise. * config/obj-coff.c (tag_init): Likewise. (tag_insert): Likewise. (tag_find): Likewise. * config/obj-elf.c (struct group_list): Likewise. (build_additional_section_info): Likewise. (free_section_idx): Likewise. (elf_adjust_symtab): Likewise. (elf_frob_file_after_relocs): Likewise. * config/tc-aarch64.c (INSN_SIZE): Likewise. (parse_reg): Likewise. (insert_reg_alias): Likewise. (create_register_alias): Likewise. (s_unreq): Likewise. (parse_shift): Likewise. (parse_pldop): Likewise. (parse_barrier): Likewise. (parse_barrier_psb): Likewise. (parse_bti_operand): Likewise. (parse_sys_reg): Likewise. (parse_sys_ins_reg): Likewise. (lookup_mnemonic): Likewise. (opcode_lookup): Likewise. (parse_operands): Likewise. (checked_hash_insert): Likewise. (sysreg_hash_insert): Likewise. (fill_instruction_hash_table): Likewise. (md_begin): Likewise. * config/tc-alpha.c (struct alpha_reloc_tag): Likewise. (get_alpha_reloc_tag): Likewise. (assemble_tokens_to_insn): Likewise. (assemble_tokens): Likewise. (md_begin): Likewise. * config/tc-arc.c (arc_find_opcode): Likewise. (arc_insert_opcode): Likewise. (find_opcode_match): Likewise. (declare_register): Likewise. (declare_addrtype): Likewise. (md_begin): Likewise. (arc_parse_name): Likewise. (tc_arc_regname_to_dw2regnum): Likewise. (arc_extcorereg): Likewise. * config/tc-arm.c (MVE_BAD_QREG): Likewise. (arm_reg_parse_multi): Likewise. (parse_reloc): Likewise. (insert_reg_alias): Likewise. (create_register_alias): Likewise. (s_unreq): Likewise. (parse_shift): Likewise. (parse_psr): Likewise. (parse_cond): Likewise. (parse_barrier): Likewise. (do_vfp_nsyn_opcode): Likewise. (opcode_lookup): Likewise. (arm_tc_equal_in_insn): Likewise. (md_begin): Likewise. * config/tc-avr.c (md_begin): Likewise. (avr_ldi_expression): Likewise. (md_assemble): Likewise. (avr_update_gccisr): Likewise. (avr_emit_insn): Likewise. * config/tc-cr16.c (get_register): Likewise. (get_register_pair): Likewise. (get_index_register): Likewise. (get_index_register_pair): Likewise. (get_pregister): Likewise. (get_pregisterp): Likewise. (initialise_reg_hash_table): Likewise. (md_begin): Likewise. (cr16_assemble): Likewise. (md_assemble): Likewise. * config/tc-cris.c (cris_insn_first_word_frag): Likewise. (md_begin): Likewise. (cris_process_instruction): Likewise. * config/tc-crx.c (get_register): Likewise. (get_copregister): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-csky.c (md_begin): Likewise. (parse_opcode): Likewise. (get_operand_value): Likewise. (v1_work_jbsr): Likewise. (v2_work_rotlc): Likewise. (v2_work_bgeni): Likewise. (v2_work_not): Likewise. * config/tc-d10v.c (sizeof): Likewise. (md_begin): Likewise. (do_assemble): Likewise. (md_apply_fix): Likewise. * config/tc-d30v.c (sizeof): Likewise. (md_begin): Likewise. (do_assemble): Likewise. * config/tc-dlx.c (RELOC_DLX_VTENTRY): Likewise. (md_begin): Likewise. (machine_ip): Likewise. * config/tc-ft32.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-h8300.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-hppa.c (pa_ip): Likewise. (md_begin): Likewise. * config/tc-i386.c (md_begin): Likewise. (i386_print_statistics): Likewise. (parse_insn): Likewise. (process_operands): Likewise. (i386_index_check): Likewise. (parse_real_register): Likewise. * config/tc-ia64.c (dot_rot): Likewise. (dot_entry): Likewise. (declare_register): Likewise. (md_begin): Likewise. (ia64_parse_name): Likewise. (md_assemble): Likewise. (dot_alias): Likewise. (do_alias): Likewise. (ia64_adjust_symtab): Likewise. (do_secalias): Likewise. (ia64_frob_file): Likewise. * config/tc-m68hc11.c (m68hc11_print_statistics): Likewise. (md_begin): Likewise. (print_insn_format): Likewise. (md_assemble): Likewise. * config/tc-m68k.c (tc_gen_reloc): Likewise. (m68k_ip): Likewise. (md_begin): Likewise. * config/tc-mcore.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-microblaze.c (md_begin): Likewise. (md_assemble): Likewise. (md_apply_fix): Likewise. * config/tc-mips.c (nopic_need_relax): Likewise. (md_begin): Likewise. (macro_build): Likewise. (mips16_macro_build): Likewise. (mips_lookup_insn): Likewise. (mips_ip): Likewise. (mips16_ip): Likewise. * config/tc-mmix.c (sizeof): Likewise. (mmix_md_begin): Likewise. (md_assemble): Likewise. * config/tc-mn10200.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-mn10300.c (HAVE_AM30): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-moxie.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-msp430.c (md_begin): Likewise. (msp430_operands): Likewise. (md_assemble): Likewise. * config/tc-nds32.c (PV_DONT_CARE): Likewise. (builtin_isreg): Likewise. (builtin_regnum): Likewise. (nds32_init_nds32_pseudo_opcodes): Likewise. (nds32_lookup_pseudo_opcode): Likewise. (nds32_relax_hint): Likewise. (md_begin): Likewise. (nds32_find_reloc_table): Likewise. (nds32_elf_append_relax_relocs_traverse): Likewise. (nds32_relax_branch_instructions): Likewise. (md_convert_frag): Likewise. (nds32_elf_analysis_relax_hint): Likewise. (tc_nds32_regname_to_dw2regnum): Likewise. * config/tc-nios2.c (nios2_opcode_lookup): Likewise. (nios2_reg_lookup): Likewise. (nios2_ps_lookup): Likewise. (md_begin): Likewise. * config/tc-ns32k.c (struct hash_control): Likewise. (parse): Likewise. (md_begin): Likewise. * config/tc-pdp11.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-pj.c (fake_opcode): Likewise. (alias): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-ppc.c (ppc_setup_opcodes): Likewise. (md_assemble): Likewise. * config/tc-pru.c (pru_opcode_lookup): Likewise. (pru_reg_lookup): Likewise. (md_begin): Likewise. (md_end): Likewise. * config/tc-riscv.c (init_ext_version_hash): Likewise. (riscv_get_default_ext_version): Likewise. (riscv_set_arch): Likewise. (init_opcode_names_hash): Likewise. (opcode_name_lookup): Likewise. (enum reg_class): Likewise. (hash_reg_name): Likewise. (riscv_init_csr_hash): Likewise. (reg_csr_lookup_internal): Likewise. (reg_lookup_internal): Likewise. (init_opcode_hash): Likewise. (md_begin): Likewise. (DECLARE_CSR): Likewise. (macro_build): Likewise. (riscv_ip): Likewise. * config/tc-s390.c (register_name): Likewise. (s390_setup_opcodes): Likewise. (md_begin): Likewise. (md_assemble): Likewise. (s390_insn): Likewise. * config/tc-score.c (struct s3_reg_map): Likewise. (s3_score_reg_parse): Likewise. (s3_dependency_type_from_insn): Likewise. (s3_parse_16_32_inst): Likewise. (s3_parse_48_inst): Likewise. (s3_insert_reg): Likewise. (s3_build_reg_hsh): Likewise. (s3_build_score_ops_hsh): Likewise. (s3_build_dependency_insn_hsh): Likewise. (s3_begin): Likewise. * config/tc-score7.c (struct s7_reg_map): Likewise. (s7_score_reg_parse): Likewise. (s7_dependency_type_from_insn): Likewise. (s7_parse_16_32_inst): Likewise. (s7_build_score_ops_hsh): Likewise. (s7_build_dependency_insn_hsh): Likewise. (s7_insert_reg): Likewise. (s7_build_reg_hsh): Likewise. (s7_begin): Likewise. * config/tc-sh.c (EMPTY): Likewise. (md_begin): Likewise. (find_cooked_opcode): Likewise. * config/tc-sparc.c (md_begin): Likewise. (sparc_ip): Likewise. * config/tc-spu.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-tic30.c (md_begin): Likewise. (tic30_operand): Likewise. (tic30_parallel_insn): Likewise. (md_assemble): Likewise. * config/tc-tic4x.c (TIC4X_ALT_SYNTAX): Likewise. (tic4x_asg): Likewise. (tic4x_inst_insert): Likewise. (tic4x_inst_add): Likewise. (md_begin): Likewise. (tic4x_operand_parse): Likewise. (md_assemble): Likewise. * config/tc-tic54x.c (MAX_SUBSYM_HASH): Likewise. (stag_add_field_symbols): Likewise. (tic54x_endstruct): Likewise. (tic54x_tag): Likewise. (tic54x_remove_local_label): Likewise. (tic54x_clear_local_labels): Likewise. (tic54x_var): Likewise. (tic54x_macro_start): Likewise. (tic54x_macro_info): Likewise. (tic54x_macro_end): Likewise. (subsym_isreg): Likewise. (subsym_structsz): Likewise. (md_begin): Likewise. (is_mmreg): Likewise. (is_type): Likewise. (encode_condition): Likewise. (encode_cc3): Likewise. (encode_cc2): Likewise. (encode_operand): Likewise. (tic54x_parse_insn): Likewise. (tic54x_parse_parallel_insn_firstline): Likewise. (subsym_create_or_replace): Likewise. (subsym_lookup): Likewise. (subsym_substitute): Likewise. (tic54x_undefined_symbol): Likewise. * config/tc-tic6x.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-tilegx.c (O_hw2_last_plt): Likewise. (INSERT_SPECIAL_OP): Likewise. (md_begin): Likewise. (tilegx_parse_name): Likewise. (parse_reg_expression): Likewise. (md_assemble): Likewise. * config/tc-tilepro.c (O_tls_ie_load): Likewise. (INSERT_SPECIAL_OP): Likewise. (tilepro_parse_name): Likewise. (parse_reg_expression): Likewise. (md_assemble): Likewise. * config/tc-v850.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-vax.c (md_ri_to_chars): Likewise. (vip_begin): Likewise. (vip): Likewise. (main): Likewise. (md_begin): Likewise. * config/tc-wasm32.c (md_begin): Likewise. (md_assemble): Likewise. * config/tc-xgate.c (xgate_parse_operand): Likewise. (md_begin): Likewise. (md_assemble): Likewise. * config/tc-z8k.c (md_begin): Likewise. (md_assemble): Likewise. |
||
Claudiu Zissulescu
|
3128916d88 |
arc: Improve error messages when assembling
gas/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (find_opcode_match): Add error messages. * testsuite/gas/arc/add_s-err.s: Update test. * testsuite/gas/arc/asm-errors.err: Likewise. * testsuite/gas/arc/cpu-em-err.s: Likewise. * testsuite/gas/arc/hregs-err.s: Likewise. * testsuite/gas/arc/warn.s: Likewise. |
||
Claudiu Zissulescu
|
5e4f7e0518 |
[ARC][committed] Code cleanup and improvements.
Code clean up and improvements when changing the cpu from command line. Also, remove unused/old emulations. gas/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change the CPU. * config/tc-arc.h: Add header if/defs. * testsuite/gas/arc/pseudos.d: Improve matching pattern. ls/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * Makefile.am: Remove earcelf_prof.c and earclinux_prof.c emulations. * Makefile.in: Regenerate. * configure.tgt: Likewise. * emulparams/arcelf_prof.sh: Remove file. * emulparams/arclinux_prof.sh: Likewise. opcodes/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * arc-opc.c (C_NE): Make it required. |
||
Claudiu Zissulescu
|
2a1ebfb221 |
[ARC] Improve parsing instruction operands.
We use gas' expression function to parse the operands of an instruction in a generic way. There are situations when we have labels and registers having the same name as well as the substraction sign doesn't always stands for the arithmetical operation but for the register range (e.g. enter instruction). This patch improves parsing symbols found in a instruction operand, cleans up code and avoids using default or undefined variables. gas/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (parse_reloc_symbol): New function. (tokenize_arguments): Clean up, use parse_reloc_symbol function. (md_operand): Set X_md to absent. (arc_parse_name): Check for X_md. |
||
Alan Modra
|
b3adc24a07 | Update year range in copyright notice of binutils files | ||
Alan Modra
|
fd3619828e |
bfd_section_* macros
This large patch removes the unnecessary bfd parameter from various bfd section macros and functions. The bfd is hardly ever used and if needed for the bfd_set_section_* or bfd_rename_section functions can be found via section->owner except for the com, und, abs, and ind std_section special sections. Those sections shouldn't be modified anyway. The patch also removes various bfd_get_section_<field> macros, replacing their use with bfd_section_<field>, and adds bfd_set_section_lma. I've also fixed a minor bug in gas where compressed section renaming was done directly rather than calling bfd_rename_section. This would have broken bfd_get_section_by_name and similar functions, but that hardly mattered at such a late stage in gas processing. bfd/ * bfd-in.h (bfd_get_section_name, bfd_get_section_vma), (bfd_get_section_lma, bfd_get_section_alignment), (bfd_get_section_size, bfd_get_section_flags), (bfd_get_section_userdata): Delete. (bfd_section_name, bfd_section_size, bfd_section_vma), (bfd_section_lma, bfd_section_alignment): Lose bfd parameter. (bfd_section_flags, bfd_section_userdata): New. (bfd_is_com_section): Rename parameter. * section.c (bfd_set_section_userdata, bfd_set_section_vma), (bfd_set_section_alignment, bfd_set_section_flags, bfd_rename_section), (bfd_set_section_size): Delete bfd parameter, rename section parameter. (bfd_set_section_lma): New. * bfd-in2.h: Regenerate. * mach-o.c (bfd_mach_o_init_section_from_mach_o): Delete bfd param, update callers. * aoutx.h, * bfd.c, * coff-alpha.c, * coff-arm.c, * coff-mips.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * ecoff.c, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-properties.c, * elf-s390-common.c, * elf-vxworks.c, * elf.c, * elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c, * elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-d10v.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc1x.c, * elf32-m68k.c, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-microblaze.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-or1k.c, * elf32-ppc.c, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-score7.c, * elf32-sh.c, * elf32-spu.c, * elf32-tic6x.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-vax.c, * elf32-visium.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mmix.c, * elf64-ppc.c, * elf64-s390.c, * elf64-sparc.c, * elf64-x86-64.c, * elflink.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-mips.c, * elfxx-sparc.c, * elfxx-tilegx.c, * elfxx-x86.c, * i386msdos.c, * linker.c, * mach-o.c, * mmo.c, * opncls.c, * pdp11.c, * pei-x86_64.c, * peicode.h, * reloc.c, * section.c, * syms.c, * vms-alpha.c, * xcofflink.c: Update throughout for bfd section macro and function changes. binutils/ * addr2line.c, * bucomm.c, * coffgrok.c, * dlltool.c, * nm.c, * objcopy.c, * objdump.c, * od-elf32_avr.c, * od-macho.c, * od-xcoff.c, * prdbg.c, * rdcoff.c, * rddbg.c, * rescoff.c, * resres.c, * size.c, * srconv.c, * strings.c, * windmc.c: Update throughout for bfd section macro and function changes. gas/ * as.c, * as.h, * dw2gencfi.c, * dwarf2dbg.c, * ecoff.c, * read.c, * stabs.c, * subsegs.c, * subsegs.h, * write.c, * config/obj-coff-seh.c, * config/obj-coff.c, * config/obj-ecoff.c, * config/obj-elf.c, * config/obj-macho.c, * config/obj-som.c, * config/tc-aarch64.c, * config/tc-alpha.c, * config/tc-arc.c, * config/tc-arm.c, * config/tc-avr.c, * config/tc-bfin.c, * config/tc-bpf.c, * config/tc-d10v.c, * config/tc-d30v.c, * config/tc-epiphany.c, * config/tc-fr30.c, * config/tc-frv.c, * config/tc-h8300.c, * config/tc-hppa.c, * config/tc-i386.c, * config/tc-ia64.c, * config/tc-ip2k.c, * config/tc-iq2000.c, * config/tc-lm32.c, * config/tc-m32c.c, * config/tc-m32r.c, * config/tc-m68hc11.c, * config/tc-mep.c, * config/tc-microblaze.c, * config/tc-mips.c, * config/tc-mmix.c, * config/tc-mn10200.c, * config/tc-mn10300.c, * config/tc-msp430.c, * config/tc-mt.c, * config/tc-nds32.c, * config/tc-or1k.c, * config/tc-ppc.c, * config/tc-pru.c, * config/tc-rl78.c, * config/tc-rx.c, * config/tc-s12z.c, * config/tc-s390.c, * config/tc-score.c, * config/tc-score7.c, * config/tc-sh.c, * config/tc-sparc.c, * config/tc-spu.c, * config/tc-tic4x.c, * config/tc-tic54x.c, * config/tc-tic6x.c, * config/tc-tilegx.c, * config/tc-tilepro.c, * config/tc-v850.c, * config/tc-visium.c, * config/tc-wasm32.c, * config/tc-xc16x.c, * config/tc-xgate.c, * config/tc-xstormy16.c, * config/tc-xtensa.c, * config/tc-z8k.c: Update throughout for bfd section macro and function changes. * write.c (compress_debug): Use bfd_rename_section. gdb/ * aarch64-linux-tdep.c, * arm-tdep.c, * auto-load.c, * coff-pe-read.c, * coffread.c, * corelow.c, * dbxread.c, * dicos-tdep.c, * dwarf2-frame.c, * dwarf2read.c, * elfread.c, * exec.c, * fbsd-tdep.c, * gcore.c, * gdb_bfd.c, * gdb_bfd.h, * hppa-tdep.c, * i386-cygwin-tdep.c, * i386-fbsd-tdep.c, * i386-linux-tdep.c, * jit.c, * linux-tdep.c, * machoread.c, * maint.c, * mdebugread.c, * minidebug.c, * mips-linux-tdep.c, * mips-sde-tdep.c, * mips-tdep.c, * mipsread.c, * nto-tdep.c, * objfiles.c, * objfiles.h, * osabi.c, * ppc-linux-tdep.c, * ppc64-tdep.c, * record-btrace.c, * record-full.c, * remote.c, * rs6000-aix-tdep.c, * rs6000-tdep.c, * s390-linux-tdep.c, * s390-tdep.c, * solib-aix.c, * solib-dsbt.c, * solib-frv.c, * solib-spu.c, * solib-svr4.c, * solib-target.c, * spu-linux-nat.c, * spu-tdep.c, * symfile-mem.c, * symfile.c, * symmisc.c, * symtab.c, * target.c, * windows-nat.c, * xcoffread.c, * cli/cli-dump.c, * compile/compile-object-load.c, * mi/mi-interp.c: Update throughout for bfd section macro and function changes. * gcore (gcore_create_callback): Use bfd_set_section_lma. * spu-tdep.c (spu_overlay_new_objfile): Likewise. gprof/ * corefile.c, * symtab.c: Update throughout for bfd section macro and function changes. ld/ * ldcref.c, * ldctor.c, * ldelf.c, * ldlang.c, * pe-dll.c, * emultempl/aarch64elf.em, * emultempl/aix.em, * emultempl/armcoff.em, * emultempl/armelf.em, * emultempl/cr16elf.em, * emultempl/cskyelf.em, * emultempl/m68hc1xelf.em, * emultempl/m68kelf.em, * emultempl/mipself.em, * emultempl/mmix-elfnmmo.em, * emultempl/mmo.em, * emultempl/msp430.em, * emultempl/nios2elf.em, * emultempl/pe.em, * emultempl/pep.em, * emultempl/ppc64elf.em, * emultempl/xtensaelf.em: Update throughout for bfd section macro and function changes. libctf/ * ctf-open-bfd.c: Update throughout for bfd section macro changes. opcodes/ * arc-ext.c: Update throughout for bfd section macro changes. sim/ * common/sim-load.c, * common/sim-utils.c, * cris/sim-if.c, * erc32/func.c, * lm32/sim-if.c, * m32c/load.c, * m32c/trace.c, * m68hc11/interp.c, * ppc/hw_htab.c, * ppc/hw_init.c, * rl78/load.c, * rl78/trace.c, * rx/gdb-if.c, * rx/load.c, * rx/trace.c: Update throughout for bfd section macro changes. |
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Nick Clifton
|
3076e59490 |
A series of fixes to addres problems detected by compiling the assembler with address sanitization enabled.
PR 24538 gas * macro.c (get_any_string): Increase size of buffer used to hold decimal value of expression result. * dw2gencfi.c (get_debugseg_name): Handle an empty name. * dwarf2dbg.c (get_filenum): Catch integer wraparound when extending allocate file array. (dwarf2_directive_filename): Add extra checks of the computed file number. * config/tc-arm.c (arm_tc_equal_in_insn): Insert copy of name into warning hash table. (s_arm_eabi_attribute): Check for obj_elf_vendor_attribute returning -1. * config/tc-i386.c (i386_output_nops): Catch an attempt to generate nops of negative lengths. * as.h (MAX_LITTLENUMS): Move definition to here from... * config/atof-ieee.c: ...here. * config/tc-aarch64.c: ...here. * config/tc-arc.c: ...here. * config/tc-arm.c: ...here. * config/tc-epiphany.c: ...here. * config/tc-i386.c: ...here. * config/tc-ia64.c: ...here. (And correct the value). * config/tc-m32c.c: ...here. * config/tc-m32r.c: ...here. * config/tc-metag.c: ...here. * config/tc-microblaze.c: ...here. * config/tc-nds32.c: ...here. * config/tc-or1k.c: ...here. * config/tc-score.c: ...here. * config/tc-score7.c: ...here. * config/tc-tic4x.c: ...here. * config/tc-tilegx.c: ...here. * config/tc-tilepro.c: ...here. * config/tc-visium.c: ...here. * config/tc-sh.c (md_assemble): Add check for an instruction with no opcodes. * config/tc-mips.c (mips_lookup_insn): Add check for very short instruction name. * config/tc-tic54x.c: Use unsigned chars to access is_end_of_line array. (tic54x_start_line_hook): Check for an empty line. (next_line_shows_parallel): Do not walk off the end of the string. (tic54x_macro_start): Check for too much macro nesting. (tic54x_start_label): Add label_start parameter. Use this parameter to check the first character of the label. * config/tc-tic54x.h (TC_START_LABEL_WITHOUT_COLON): Pass line_start variable to tic54x_start_label. PR 24538 opcodes * ia64-opc.c (ia64_find_matching_opcode): Check for reaching the end of the table prematurely. |
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Alan Modra
|
871a6bd2d8 |
Make frag fr_fix unsigned
The field only stores unsigned values, so let's make it unsigned to stop people worrying about the possibility of negative values. * frags.h (struct frag <fr_fix>): Use unsigned type. * frags.c (frag_new): Assert that current size exceeds old_frags_var_max_size. * ehopt.c (get_cie_info): Adjust for unsigned fr_fix. * listing.c (calc_hex): Likewise. * write.c (cvt_frag_to_fill, write_relocs): Likewise. * config/tc-arc.c (md_convert_frag): Likewise. * config/tc-avr.c (avr_patch_gccisr_frag): Likewise. * config/tc-mips.c (md_convert_frag): Likewise. * config/tc-rl78.c (md_convert_frag): Likewise. * config/tc-rx.c (md_convert_frag): Likewise. * config/tc-sparc.c (md_apply_fix): Likewise. * config/tc-xtensa.c (next_instrs_are_b_retw): Likewise. (unrelaxed_frag_min_insn_count, unrelaxed_frag_has_b_j): Likewise. |
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Alan Modra
|
827041555a | Update year range in copyright notice of binutils files | ||
Alan Modra
|
8d1015a887 |
Move struc-symbol.h to symbols.c
This file was never supposed to be widely used. The fact that it has
found its way into many gas files led to bugs, typically when code
expecting a symbolS* to point at a struct symbol is presented with a
struct local_symbol. Also, commit
|
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Maciej W. Rozycki
|
53b6d6f5b2 |
ARC: Fix build errors with large constants and C89
Fix build errors: cc1: warnings being treated as errors In file included from .../opcodes/arc-opc.c:2630: .../opcodes/arc-nps400-tbl.h:38: warning: integer constant is too large for 'long' type .../opcodes/arc-nps400-tbl.h:38: warning: integer constant is too large for 'long' type .../opcodes/arc-nps400-tbl.h:41: warning: integer constant is too large for 'long' type .../opcodes/arc-nps400-tbl.h:41: warning: integer constant is too large for 'long' type [...] .../opcodes/arc-nps400-tbl.h:712: warning: integer constant is too large for 'long' type .../opcodes/arc-nps400-tbl.h:712: warning: integer constant is too large for 'long' type .../opcodes/arc-nps400-tbl.h:715: warning: integer constant is too large for 'long' type .../opcodes/arc-nps400-tbl.h:715: warning: integer constant is too large for 'long' type make[4]: *** [arc-opc.lo] Error 1 and: cc1: warnings being treated as errors .../gas/config/tc-arc.c: In function 'md_number_to_chars_midend': .../gas/config/tc-arc.c:802: warning: integer constant is too large for 'long' type .../gas/config/tc-arc.c:810: warning: integer constant is too large for 'long' type make[4]: *** [config/tc-arc.o] Error 1 observed with GCC 4.1.2 and presumably other C89 compilers with the `arc-elf' and `arc-linux-gnu' targets, caused by the use of constants the values of which are outside the range of the `int' type (or the `long' type if it is of the same with). In the C89 language standard such constants are not implicitly converted to a wider type and an explicit suffix is required for such constants. Add a `ull' suffix then as with such constants used in other ports. gas/ * config/tc-arc.c (md_number_to_chars_midend): Append `ull' to large constants. opcodes/ * arc-nps400-tbl.h: Append `ull' to large constants throughout. |
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claziss
|
63741043bd |
[ARC] Check if an input asm file is rf16 compliant
Check if an input asm file is rf16 compliant; if not, and the tag says otherwise, fix the tag and emit a warning. gas/ 2017-09-20 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (rf16_only): New static variable. (autodetect_attributes): Check if we are rf16 compliant. (arc_set_public_attributes): Fix and emit the warning is required. * testsuite/gas/arc/attr-rf16.d: New file. * testsuite/gas/arc/attr-rf16.err: Likewise. * testsuite/gas/arc/attr-rf16.s: Likewise. |
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claziss
|
db1e1b45b4 |
[ARC] Add Tag_ARC_ATR_version.
Add a new tag (Tag_ARC_ATR_version) used to indicate if current attributes are interpreted in GNU way. This attribute is used by Synopsys custom compiler to correctly identify and interpret the object attributes section as generated by GNU tools. gas/ 2017-08-02 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (arc_set_public_attributes): Add Tag_ARC_ATR_version. (arc_convert_symbolic_attribute): Likewise. * testsuite/gas/arc/attr-arc600.d: Update test. * testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc600_norm.d: Likewise. * testsuite/gas/arc/attr-arc601.d: Likewise. * testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc601_mul64.d: Likewise. * testsuite/gas/arc/attr-arc601_norm.d: Likewise. * testsuite/gas/arc/attr-arc700.d: Likewise. * testsuite/gas/arc/attr-arcem.d: Likewise. * testsuite/gas/arc/attr-archs.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.d: Likewise. * testsuite/gas/arc/attr-cpu-a601.d: Likewise. * testsuite/gas/arc/attr-cpu-a700.d: Likewise. * testsuite/gas/arc/attr-cpu-em.d: Likewise. * testsuite/gas/arc/attr-cpu-hs.d: Likewise. * testsuite/gas/arc/attr-em.d: Likewise. * testsuite/gas/arc/attr-em4.d: Likewise. * testsuite/gas/arc/attr-em4_dmips.d: Likewise. * testsuite/gas/arc/attr-em4_fpuda.d: Likewise. * testsuite/gas/arc/attr-em4_fpus.d: Likewise. * testsuite/gas/arc/attr-hs.d: Likewise. * testsuite/gas/arc/attr-hs34.d: Likewise. * testsuite/gas/arc/attr-hs38.d: Likewise. * testsuite/gas/arc/attr-hs38_linux.d: Likewise. * testsuite/gas/arc/attr-mul64.d: Likewise. * testsuite/gas/arc/attr-name.d: Likewise. * testsuite/gas/arc/attr-nps400.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.d: Likewise. * testsuite/gas/arc/attr-quarkse_em.d: Likewise. bfd/ 2017-08-02 Claudiu Zissulescu <claziss@synopsys.com> * elf32-arc.c (arc_elf_merge_attributes): Handle Tag_ARC_ATR_version. binutils/ 2017-08-02 Claudiu Zissulescu <claziss@synopsys.com> * readelf.c (display_arc_attribute): Print Tag_ARC_ATR_version. include/ 2017-08-02 Claudiu Zissulescu <claziss@synopsys.com> * elf/arc.h (Tag_ARC_ATR_version): New tag. ld/ 2017-08-02 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/attr-merge-0.d: Update test. * testsuite/ld-arc/attr-merge-1.d: Likewise. * testsuite/ld-arc/attr-merge-2.d: Likewise. * testsuite/ld-arc/attr-merge-3.d: Likewise. * testsuite/ld-arc/attr-merge-5.d: Likewise. |
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claziss
|
b6523c37fb |
[ARC] Update handling AUX-registers.
Update aux-registers data-base, and accept aux-registers names with upper/lowercase names. opcode/ 2017-07-18 Claudiu Zissulescu <claziss@synopsys.com> * arc-regs.h: Update aux-registers. gas/ 2017-07-18 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (find_opcode_match): Accept uppercase aux-regs names. * testsuite/gas/arc/ld2.d: Update test. * testsuite/gas/arc/taux.d: Likewise. * testsuite/gas/arc/taux.s: Likewise. include/ 2017-07-18 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (ARC_OPCODE_ARCV1): Define. |
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claziss
|
f02806be1f |
[ARC] Fix case-sensitivity for extension instructions.
In ARC assembler, we accept case insensitive mnemonics, but this was not the case for extension instruction, fix it and add a test. gas/ Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (tokenize_extinsn): Convert to lower case the name of extension instructions. * testsuite/gas/arc/textinsn_case.d: New file. * testsuite/gas/arc/textinsn_case.s: Likewise. |
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Alan Modra
|
219d1afa89 | Update year range in copyright notice of binutils files | ||
claziss
|
cf9bdae906 |
Update check conditions for illegal placed instructions.
ARC cpus do not accept any jump or instructions with long immediate into the delay slots. gas/ 2017-06-07 Claudiu Zissulescu <claziss@synopsys.com> * /config/tc-arc.c (is_br_jmp_insn_p): Update macro with known instructions to be accounted as jumps. (assemble_insn): Check for limms into the delay slots. Emit an error if so. * testsuite/gas/arc/asm-errors-3.d: New file. * testsuite/gas/arc/asm-errors-3.err: Likewise. * testsuite/gas/arc/asm-errors-3.s: Likewise. |
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Vineet Gupta
|
7ef0acc15e |
[ARC] Don't convert _DYNAMIC@ to _GLOBAL_OFFSET_TABLE_
Historically the arc abi demanded that a GOT[0] should be referencible as [pc+_DYNAMIC@gotpc]. Hence we convert a _DYNAMIC@gotpc to a GOTPC reference to _GLOBAL_OFFSET_TABLE_. This is no longer the case and uClibc and upcomming GNU libc don't expect this to happen. gas/ChangeLog: Vineet Gupta <vgupta@synopsys.com> Cupertino Miranda <cmiranda@synopsys.com> * config/tc-arc.c (md_undefined_symbol): Changed. * config/tc-arc.h (DYNAMIC_STRUCT_NAME): Removed. |
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Anton Kolesov
|
940171d086 |
[ARC] Add arc-cpu.def with processor definitions
This patch extracts ARC CPU definitions from gas/config/tc-arc.c (cpu_types) into a separate file arc-cpu.def. This will allow reuse of CPU type definition in multiple places where it might be needed, for example in disassembler. This will help ensure that gas and disassembker use same option values for CPUs. arc-cpu.def file relies on preprocessor macroses which are defined somewhere else. This for example multiple C files to include arc-cpu.def, but define different macroses, therefore creating different structures. include/ChangeLog: yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com> * elf/arc-cpu.def: New file. gas/ChangeLog: yyyy-mm-dd Anton Kolesov <anton.kolesov@synopsys.com> * config/tc-arc.c (cpu_types): Include arc-cpu.def Signed-off-by: Anton Kolesov <Anton.Kolesov@synopsys.com> |
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claziss
|
6e3f3473e2 |
[ARC] Reformat error messages.
gas/ 2017-05-23 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (md_apply_fix): Use as_bad_where. (assemble_insn): Use as_bad. |
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Claudiu Zissulescu
|
53a346d823 |
[ARC] Object attributes.
gas/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/attr-arc600.d: New file. * testsuite/gas/arc/attr-arc600_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc600_norm.d: Likewise. * testsuite/gas/arc/attr-arc601.d: Likewise. * testsuite/gas/arc/attr-arc601_mul32x16.d: Likewise. * testsuite/gas/arc/attr-arc601_mul64.d: Likewise. * testsuite/gas/arc/attr-arc601_norm.d: Likewise. * testsuite/gas/arc/attr-arc700.d: Likewise. * testsuite/gas/arc/attr-arcem.d: Likewise. * testsuite/gas/arc/attr-archs.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.d: Likewise. * testsuite/gas/arc/attr-autodetect-1.s: Likewise. * testsuite/gas/arc/attr-cpu-a601.d: Likewise. * testsuite/gas/arc/attr-cpu-a601.s: Likewise. * testsuite/gas/arc/attr-cpu-a700.d: Likewise. * testsuite/gas/arc/attr-cpu-a700.s: Likewise. * testsuite/gas/arc/attr-cpu-em.d: Likewise. * testsuite/gas/arc/attr-cpu-em.s: Likewise. * testsuite/gas/arc/attr-cpu-hs.d: Likewise. * testsuite/gas/arc/attr-cpu-hs.s: Likewise. * testsuite/gas/arc/attr-em.d: Likewise. * testsuite/gas/arc/attr-em4.d: Likewise. * testsuite/gas/arc/attr-em4_dmips.d: Likewise. * testsuite/gas/arc/attr-em4_fpuda.d: Likewise. * testsuite/gas/arc/attr-em4_fpus.d: Likewise. * testsuite/gas/arc/attr-hs.d: Likewise. * testsuite/gas/arc/attr-hs34.d: Likewise. * testsuite/gas/arc/attr-hs38.d: Likewise. * testsuite/gas/arc/attr-hs38_linux.d: Likewise. * testsuite/gas/arc/attr-mul64.d: Likewise. * testsuite/gas/arc/attr-name.d: Likewise. * testsuite/gas/arc/attr-name.s: Likewise. * testsuite/gas/arc/attr-nps400.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.d: Likewise. * testsuite/gas/arc/attr-override-mcpu.s * testsuite/gas/arc/attr-quarkse_em.d: Likewise. * testsuite/gas/arc/blank.s: Likewise. * testsuite/gas/elf/section2.e-arc: Likewise. * testsuite/gas/arc/cpu-pseudop-1.d: Update test. * testsuite/gas/arc/cpu-pseudop-2.d: Likewise. * testsuite/gas/arc/nps400-0.d: Likewise. * testsuite/gas/elf/elf.exp: Set target_machine for ARC. * config/tc-arc.c (opcode/arc-attrs.h): Include. (ARC_GET_FLAG, ARC_SET_FLAG, streq): Define. (arc_attribute): Declare new function. (md_pseudo_table): Add arc_attribute. (cpu_types): Rename default cpu features. (selected_cpu): Set the default OSABI flag. (mpy_option): New variable. (pic_option): Likewise. (sda_option): Likewise. (tls_option): Likewise. (feature_type, feature_list): Remove. (arc_initial_eflag): Likewise. (attributes_set_explicitly): New variable. (arc_check_feature): Check also for the conflicting features. (arc_select_cpu): Refactor assignment of selected_cpu.eflags. (arc_option): Remove setting of private flags and architecture. (check_cpu_feature): Refactor feature names. (autodetect_attributes): New function. (assemble_tokens): Use above function. (md_parse_option): Refactor feature names. (arc_attribute): New function. (arc_set_attribute_int): Likewise. (arc_set_attribute_string): Likewise. (arc_stralloc): Likewise. (arc_set_public_attributes): Likewise. (arc_md_end): Likewise. (arc_copy_symbol_attributes): Likewise. (rc_convert_symbolic_attribute): Likewise. * config/tc-arc.h (md_end): Define. (CONVERT_SYMBOLIC_ATTRIBUTE): Likewise. (TC_COPY_SYMBOL_ATTRIBUTES): Likewise. * doc/c-arc.texi: Document ARC object attributes. binutils/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * readelf.c (decode_ARC_machine_flags): Recognize OSABI v4. (get_arc_section_type_name): New function. (get_section_type_name): Use the above function. (display_arc_attribute): New function. (process_arc_specific): Likewise. (process_arch_specific): Handle ARC specific information. * testsuite/binutils-all/strip-3.d: Consider ARC.attributes section. include/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf/arc.h (SHT_ARC_ATTRIBUTES): Define. (Tag_ARC_*): Define. (E_ARC_OSABI_V4): Define. (E_ARC_OSABI_CURRENT): Reassign it. (TAG_CPU_*): Define. * opcode/arc-attrs.h: New file. * opcode/arc.h (insn_subclass_t): Assign enum values. (insn_subclass_t): Update enum with QUARKSE1, QUARKSE2, and LL64. (ARC_EA, ARC_CD, ARC_LLOCK, ARC_ATOMIC, ARC_MPY, ARC_MULT) (ARC_NPS400, ARC_DPFP, ARC_SPFP, ARC_FPU, ARC_FPUDA, ARC_SWAP) (ARC_NORM, ARC_BSCAN, ARC_UIX, ARC_TSTAMP, ARC_VBFDW) (ARC_BARREL, ARC_DSPA, ARC_SHIFT, ARC_INTR, ARC_DIV, ARC_XMAC) (ARC_CRC): Delete. bfd/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * elf32-arc.c (FEATURE_LIST_NAME): Define. (CONFLICT_LIST): Likewise. (opcode/arc-attrs.h): Include. (arc_elf_print_private_bfd_data): Print OSABI v4 flag. (arc_extract_features): New file. (arc_stralloc): Likewise. (arc_elf_merge_attributes): Likewise. (arc_elf_merge_private_bfd_data): Use object attributes. (bfd_arc_get_mach_from_attributes): New function. (arc_elf_object_p): Use object attributes. (arc_elf_final_write_processing): Likewise. (elf32_arc_obj_attrs_arg_type): New function. (elf32_arc_obj_attrs_handle_unknown): Likewise. (elf32_arc_section_from_shdr): Likewise. (elf_backend_obj_attrs_vendor): Define. (elf_backend_obj_attrs_section): Likewise. (elf_backend_obj_attrs_arg_type): Likewise. (elf_backend_obj_attrs_section_type): Likewise. (elf_backend_obj_attrs_handle_unknown): Likewise. (elf_backend_section_from_shdr): Likewise. ld/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/attr-merge-0.d: New file. * testsuite/ld-arc/attr-merge-0.s: Likewise. * testsuite/ld-arc/attr-merge-0e.s: Likewise. * testsuite/ld-arc/attr-merge-1.d: Likewise. * testsuite/ld-arc/attr-merge-1.s: Likewise. * testsuite/ld-arc/attr-merge-1e.s: Likewise. * testsuite/ld-arc/attr-merge-2.d: Likewise. * testsuite/ld-arc/attr-merge-2.s: Likewise. * testsuite/ld-arc/attr-merge-3.d: Likewise. * testsuite/ld-arc/attr-merge-3.s: Likewise. * testsuite/ld-arc/attr-merge-3e.s: Likewise. * testsuite/ld-arc/attr-merge-4.s: Likewise. * testsuite/ld-arc/attr-merge-5.d: Likewise. * testsuite/ld-arc/attr-merge-5a.s: Likewise. * testsuite/ld-arc/attr-merge-5b.s: Likewise. * testsuite/ld-arc/attr-merge-conflict-isa.d: Likewise. * testsuite/ld-arc/attr-merge-err-isa.d: Likewise. * testsuite/ld-arc/attr-merge-incompatible-cpu.d: Likewise. * testsuite/ld-arc/got-01.d: Update test. * testsuite/ld-arc/attr-merge-err-quarkse.d: New file. * testsuite/ld-arc/attr-quarkse.s: Likewise. * testsuite/ld-arc/attr-quarkse2.s: Likewise. opcodes/ 2017-05-10 Claudiu Zissulescu <claziss@synopsys.com> * arc-dis.c (parse_option): Update quarkse_em option.. * arc-ext-tbl.h (dsp_fp_flt2i, dsp_fp_i2flt): Change subclass to QUARKSE1. (dsp_fp_div, dsp_fp_cmp): Change subclass to QUARKSE2. |
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Rinat Zelig
|
2c52e2e8c9 |
gas/arc: Limit special handling of t/nt flag to ARCv2
In a later commit I'll be adding a new version of the ".nt" flag for an ARC700 extension (NPS400) which does not require this same special handling. In this commit I have restricted the special flag handling to only apply if we are assembling for ARCv2. This is a restructuring commit, and there should be no user visible changes after this commit. gas/ChangeLog: * config/tc-arc.c (assemble_insn): Only handle ".t" and ".nt" specially for ARCv2. |
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Claudiu Zissulescu
|
cc07cda69e |
[ARC] Fix assembler relaxation.
Fix assembler relaxation step for add, ld, mov, mpy and sub instructions. Add tests to it. gas/ 2017-02-15 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (md_convert_frag): Remove @pcl relocation information from input expression. (assemble_insn): Make sure pcrel is correctly set. (arc_pcrel_adjust): Compensate for PCL rounding. * testsuite/gas/arc/relax-add01.d: New file. * testsuite/gas/arc/relax-add01.s: Likewise. * testsuite/gas/arc/relax-add02.d: Likewise. * testsuite/gas/arc/relax-add02.s: Likewise. * testsuite/gas/arc/relax-add03.d: Likewise. * testsuite/gas/arc/relax-add03.s: Likewise. * testsuite/gas/arc/relax-add04.d: Likewise. * testsuite/gas/arc/relax-add04.s: Likewise. * testsuite/gas/arc/relax-ld01.d: Likewise. * testsuite/gas/arc/relax-ld01.s: Likewise. * testsuite/gas/arc/relax-ld02.d: Likewise. * testsuite/gas/arc/relax-ld02.s: Likewise. * testsuite/gas/arc/relax-mov01.d: Likewise. * testsuite/gas/arc/relax-mov01.s: Likewise. * testsuite/gas/arc/relax-mov02.d: Likewise. * testsuite/gas/arc/relax-mov02.s: Likewise. * testsuite/gas/arc/relax-mpy01.d: Likewise. * testsuite/gas/arc/relax-mpy01.s: Likewise. * testsuite/gas/arc/relax-sub01.d: Likewise. * testsuite/gas/arc/relax-sub01.s: Likewise. * testsuite/gas/arc/relax-sub02.d: Likewise. * testsuite/gas/arc/relax-sub02.s: Likewise. * testsuite/gas/arc/relax-sub03.d: Likewise. * testsuite/gas/arc/relax-sub03.s: Likewise. * testsuite/gas/arc/relax-sub04.d: Likewise. * testsuite/gas/arc/relax-sub04.s: Likewise. opcodes/ 2017-02-15 Claudiu Zissulescu <claziss@synopsys.com> * arc-opc.c (UIMM6_20R): Define. (SIMM12_20): Use above. (SIMM12_20R): Define. (SIMM3_5_S): Use above. (UIMM7_A32_11R_S): Define. (UIMM7_9_S): Use above. (UIMM3_13R_S): Define. (SIMM11_A32_7_S): Use above. (SIMM9_8R): Define. (UIMM10_A32_8_S): Use above. (UIMM8_8R_S): Define. (W6): Use above. (arc_relax_opcodes): Use all above defines. |
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Claudiu Zissulescu
|
6ec7c1ae19 |
[ARC] Provide an interface to decode ARC instructions.
gas/ 2017-02-06 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (parse_opcode_flags): Ignore implicit flags. include/ 2017-02-06 Claudiu Zissulescu <claziss@synopsys.com> Anton Kolesov <anton.kolesov@synopsys.com> * opcode/arc.h (insn_class_t): Add ENTER, LEAVE, POP, PUSH, BBIT0, BBIT1, BI, BIH, BRCC, EI, JLI, and SUB instruction classes. (flag_class_t): Add F_CLASS_WB, F_CLASS_ZZ, and F_CLASS_IMPLICIT flag classes. opcode/ 2017-02-06 Claudiu Zissulescu <claziss@synopsys.com> Anton Kolesov <anton.kolesov@synopsys.com> * arc-dis.c (arc_disassemble_info): New structure. (init_arc_disasm_info): New function. (find_format_from_table): Ignore implicit flags. (find_format): Update dissassembler private data. (print_flags): Likewise. (print_insn_arc): Likewise. (arc_opcode_to_insn_type): Consider the new added instruction classes. (arcAnalyzeInstr): Remove. (arc_insn_decode): New function. * arc-dis.h (arc_ldst_writeback_mode): New enum. (arc_ldst_data_size): Likewise. (arc_condition_code): Likewise. (arc_operand_kind): Likewise. (arc_insn_kind): New struct. (arc_instruction): Likewise. (arc_insn_decode): Declare function. (ARC_Debugger_OperandType): Deleted. (Flow): Likewise. (NullifyMode): Likewise. (allOperandsSize): Likewise. (arcDisState): Likewise. (arcAnalyzeInstr): Likewise. * arc-dis.c (arc_opcode_to_insn_type): Handle newly introduced insn_class_t enums. * arc-opc.c (F_SIZED): New define. (C_CC_EQ, C_CC_GE, C_CC_GT, C_CC_HI, C_CC_HS): Likewise. (C_CC_LE, C_CC_LO, C_CC_LS, C_CC_LT, C_CC_NE): Likewise. (C_CC_NE, C_AA_AB, C_AA_AW, C_ZZ_D, C_ZZ_H, C_ZZ_B): Likewise. (arc_flag_classes): Add F_CLASS_COND/F_CLASS_IMPLICIT flags. * opcodes/arc-tbl.h: Update instructions to include new F_CLASS_IMPLICIT flags. (bbit0, lp): Change class. (bbit1, bi, bih, br*, ei_s, jli_s): Likewsie |
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Nick Clifton
|
33eaf5de31 |
Fix spelling mistakes and typos in the GAS sources.
PR gas/21072 * asintl.h: Fix spelling mistakes and typos. * atof-generic.c: Likewise. * bit_fix.h: Likewise. * config/atof-ieee.c: Likewise. * config/bfin-defs.h: Likewise. * config/bfin-parse.y: Likewise. * config/obj-coff-seh.h: Likewise. * config/obj-coff.c: Likewise. * config/obj-evax.c: Likewise. * config/obj-macho.c: Likewise. * config/rx-parse.y: Likewise. * config/tc-aarch64.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-avr.c: Likewise. * config/tc-bfin.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-cris.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-d10v.c: Likewise. * config/tc-d30v.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-epiphany.c: Likewise. * config/tc-frv.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386-intel.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m32r.c: Likewise. * config/tc-m68hc11.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-mep.h: Likewise. * config/tc-metag.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-mmix.c: Likewise. * config/tc-mn10200.c: Likewise. * config/tc-mn10300.c: Likewise. * config/tc-msp430.c: Likewise. * config/tc-msp430.h: Likewise. * config/tc-nds32.c: Likewise. * config/tc-nds32.h: Likewise. * config/tc-nios2.c: Likewise. * config/tc-nios2.h: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-pdp11.c: Likewise. * config/tc-ppc.c: Likewise. * config/tc-pru.c: Likewise. * config/tc-rx.c: Likewise. * config/tc-s390.c: Likewise. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-sh64.c: Likewise. * config/tc-sparc.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-tic54x.c: Likewise. * config/tc-v850.c: Likewise. * config/tc-vax.c: Likewise. * config/tc-visium.c: Likewise. * config/tc-xgate.c: Likewise. * config/tc-xtensa.c: Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * config/te-vms.c: Likewise. * config/xtensa-relax.c: Likewise. * doc/as.texinfo: Likewise. * doc/c-arm.texi: Likewise. * doc/c-hppa.texi: Likewise. * doc/c-i370.texi: Likewise. * doc/c-i386.texi: Likewise. * doc/c-m32r.texi: Likewise. * doc/c-m68k.texi: Likewise. * doc/c-mmix.texi: Likewise. * doc/c-msp430.texi: Likewise. * doc/c-nds32.texi: Likewise. * doc/c-ns32k.texi: Likewise. * doc/c-riscv.texi: Likewise. * doc/c-rx.texi: Likewise. * doc/c-s390.texi: Likewise. * doc/c-tic6x.texi: Likewise. * doc/c-tilegx.texi: Likewise. * doc/c-tilepro.texi: Likewise. * doc/c-v850.texi: Likewise. * doc/c-xgate.texi: Likewise. * doc/c-xtensa.texi: Likewise. * dwarf2dbg.c: Likewise. * ecoff.c: Likewise. * itbl-ops.c: Likewise. * listing.c: Likewise. * macro.c: Likewise. * po/gas.pot: Likewise. * read.c: Likewise. * struc-symbol.h: Likewise. * symbols.h: Likewise. * testsuite/gas/arc/relocs-errors.err: Likewise. * write.c: Likewise. |
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Alan Modra
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2571583aed | Update year range in copyright notice of all files. | ||
Maciej W. Rozycki
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731f7c4ea3 |
ARC/GAS: Correct a `spaces' global shadowing error
Fix a commit |
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Claudiu Zissulescu
|
0691188992 |
[ARC] Don't check extAuxRegister second argument for sign.
gas/ 2016-12-05 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/textauxregister-1.d: New file. * testsuite/gas/arc/textauxregister-1.s: Likewise. * testsuite/gas/arc/textcondcode-err.s: Likewise. * testsuite/gas/arc/textcoreregister-err.s: Likewise. * config/tc-arc.c (tokenize_extregister): Return bfd_boolean, don't check second argument of extension auxiliary register for signess. (arc_extcorereg): Consider the return of tokenize_extregister function call. |
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Claudiu Zissulescu
|
a9752fdf83 |
[ARC] Sync cpu names with the ones accepted by GCC.
gas/ 2016-12-02 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/cpu-em-err.s: New file. * testsuite/gas/arc/cpu-em4-err.s: Likewise. * testsuite/gas/arc/cpu-fpuda-err.s: Likewise. * testsuite/gas/arc/cpu-hs-err.s: Likewise. * testsuite/gas/arc/cpu-quarkse-err.s: Likewise. * testsuite/gas/arc/noargs_a7.s: Add .cpu. * config/tc-arc.c (ARC_CPU_TYPE_A6xx): Define. (ARC_CPU_TYPE_A7xx): Likewise. (ARC_CPU_TYPE_AV2EM): Likewise. (ARC_CPU_TYPE_AV2HS): Likewise. (cpu_types): Update list of known CPU names. (arc_show_cpu_list): New function. (md_show_usage): Print accepted CPU names. (cl_features): New variable. (arc_select_cpu): Use cl_features. (arc_option): Allow various .cpu names. (md_parse_option): Set cl_features. * doc/c-arc.texi: Update -mcpu and .cpu documentation. |
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Claudiu Zissulescu
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abe7c33b45 |
[ARC] Add checking for LP_COUNT reg usage, improve error reporting.
gas/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (find_opcode_match): New function argument errmsg. (assemble_tokens): Collect and report the eventual error message found during opcode matching process. * testsuite/gas/arc/lpcount-err.s: New file. * testsuite/gas/arc/add_s-err.s: Update error message. opcode/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * arc-opc.c (insert_ra_chk): New function. (insert_rb_chk): Likewise. (insert_rad): Update text error message. (insert_rcd): Likewise. (insert_rhv2): Likewise. (insert_r0): Likewise. (insert_r1): Likewise. (insert_r2): Likewise. (insert_r3): Likewise. (insert_sp): Likewise. (insert_gp): Likewise. (insert_pcl): Likewise. (insert_blink): Likewise. (insert_ilink1): Likewise. (insert_ilink2): Likewise. (insert_ras): Likewise. (insert_rbs): Likewise. (insert_rcs): Likewise. (insert_simm3s): Likewise. (insert_rrange): Likewise. (insert_fpel): Likewise. (insert_blinkel): Likewise. (insert_pcel): Likewise. (insert_nps_3bit_dst): Likewise. (insert_nps_3bit_dst_short): Likewise. (insert_nps_3bit_src2_short): Likewise. (insert_nps_bitop_size_2b): Likewise. (MAKE_SRC_POS_INSERT_EXTRACT_FUNCS): Likewise. (RA_CHK): Define. (RB): Adjust. (RB_CHK): Define. (RC): Adjust. * arc-dis.c (print_insn_arc): Add LOAD and STORE class. * arc-tbl.h (div, divu): All instructions are DIVREM class. Change first insn argument to check for LP_COUNT usage. (rem): Likewise. (ld, ldd): All instructions are LOAD class. Change first insn argument to check for LP_COUNT usage. (st, std): All instructions are STORE class. (mac, mpy, dmac, mul, dmpy): All instructions are MPY class. Change first insn argument to check for LP_COUNT usage. (mov): All instructions are MOVE class. Change first insn argument to check for LP_COUNT usage. include/ 2016-11-29 Claudiu Zissulescu <claziss@synopsys.com> * opcode/arc.h (insn_class_t): Add DIVREM, LOAD, MOVE, MPY, STORE instruction classes. |
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Ambrogino Modigliani
|
2b0f37619f |
Fix spelling in comments in C source files (gas)
* as.h: Fix spelling in comments. * config/obj-ecoff.c: Fix spelling in comments. * config/obj-macho.c: Fix spelling in comments. * config/tc-aarch64.c: Fix spelling in comments. * config/tc-arc.c: Fix spelling in comments. * config/tc-arm.c: Fix spelling in comments. * config/tc-avr.c: Fix spelling in comments. * config/tc-cr16.c: Fix spelling in comments. * config/tc-epiphany.c: Fix spelling in comments. * config/tc-frv.c: Fix spelling in comments. * config/tc-hppa.c: Fix spelling in comments. * config/tc-hppa.h: Fix spelling in comments. * config/tc-i370.c: Fix spelling in comments. * config/tc-m68hc11.c: Fix spelling in comments. * config/tc-m68k.c: Fix spelling in comments. * config/tc-mcore.c: Fix spelling in comments. * config/tc-mep.c: Fix spelling in comments. * config/tc-metag.c: Fix spelling in comments. * config/tc-mips.c: Fix spelling in comments. * config/tc-mn10200.c: Fix spelling in comments. * config/tc-mn10300.c: Fix spelling in comments. * config/tc-nds32.c: Fix spelling in comments. * config/tc-nios2.c: Fix spelling in comments. * config/tc-ns32k.c: Fix spelling in comments. * config/tc-pdp11.c: Fix spelling in comments. * config/tc-ppc.c: Fix spelling in comments. * config/tc-riscv.c: Fix spelling in comments. * config/tc-rx.c: Fix spelling in comments. * config/tc-score.c: Fix spelling in comments. * config/tc-score7.c: Fix spelling in comments. * config/tc-sparc.c: Fix spelling in comments. * config/tc-tic54x.c: Fix spelling in comments. * config/tc-vax.c: Fix spelling in comments. * config/tc-xgate.h: Fix spelling in comments. * config/tc-xtensa.c: Fix spelling in comments. * config/tc-z80.c: Fix spelling in comments. * dwarf2dbg.c: Fix spelling in comments. * input-file.h: Fix spelling in comments. * itbl-ops.c: Fix spelling in comments. * read.c: Fix spelling in comments. * stabs.c: Fix spelling in comments. * symbols.c: Fix spelling in comments. * write.c: Fix spelling in comments. * testsuite/gas/all/itbl-test.c: Fix spelling in comments. * testsuite/gas/tic4x/opclasses.h: Fix spelling in comments. |
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Claudiu Zissulescu
|
bb050a6932 |
[ARC] Fix and extend features of .cpu directive.
gas/ 2016-11-18 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/cl-warn.s: New file. * testsuite/gas/arc/cpu-pseudop-1.d: Likewise. * testsuite/gas/arc/cpu-pseudop-1.s: Likewise. * testsuite/gas/arc/cpu-pseudop-2.d: Likewise. * testsuite/gas/arc/cpu-pseudop-2.s: Likewise. * testsuite/gas/arc/cpu-warn2.s: Likewise. * config/tc-arc.c (selected_cpu): Initialize. (feature_type): New struct. (feature_list): New variable. (arc_check_feature): New function. (arc_select_cpu): Check for .cpu duplicates. Don't overwrite the current cpu features. Check if a feature is available for a given cpu. (md_parse_option): Test if features are available for a given cpu. |
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Andrew Burgess
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b437d035dd |
arc/nps400: Validate address type operands correctly
When we match against an address type operand within an instruction it is important that we match exactly the right address type operand early on, during the opcode selection phase. If we wait until the operand insertion phase to check that we have the correct address operand, then it is too late to select an alternative opcode. This becomes important only when we have multiple opcodes with the same mnemonic, and operand lists that differ only in the type of the address operands. This commit fixes this issue, and adds some example instructions that require this issue to be fixed (the instructions are identical except for the address type operand). gas/ChangeLog: * config/tc-arc.c (find_opcode_match): Use insert function to validate matching address type operands. * testsuite/gas/arc/nps400-10.d: New file. * testsuite/gas/arc/nps400-10.s: New file. opcodes/ChangeLog: * arc-opc.c (arc_flag_operands): Add F_DI14. (arc_flag_classes): Add C_DI14. * arc-nps400-tbl.h: Add new exc instructions. |
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Andrew Burgess
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bdfe53e3cf |
arc: Change max instruction length to 64-bits
The current handling for arc instructions longer than 32-bits is all handled as a special case in both the assembler and disassembler. The problem with this approach is that it leads to code duplication, selecting a long instruction is exactly the same process as selecting a short instruction, except over more bits, in both cases we select based on bit comparison, and initial operand insertion and extraction. This commit unifies both the long and short instruction worlds, converting the core opcodes library from being largely 32-bit focused, to being largely 64-bit focused. The changes are, on the whole, not too much. There's obviously a lot of type changes but otherwise the bulk of the code just works. Most of the actual functional changes are to code that previously handled the longer 48 or 64 bit instructions. The insert/extract handlers for these have now been brought into line with the short instruction insert/extract handlers. All of the special case handling code that was previously added has now been removed again. Overall, this commit reduces the amount of code in the arc assembler and disassembler. gas/ChangeLog: * config/tc-arc.c (struct arc_insn): Change type of insn field. (md_number_to_chars_midend): Support 6- and 8-byte values. (emit_insn0): Update debug output. (find_opcode_match): Likewise. (build_fake_opcode_hash_entry): Delete. (find_special_case_long_opcode): Delete. (find_special_case): Remove long format special case handling. (insert_operand): Change instruction type and update debug print format. (assemble_insn): Change instruction type, update debug print formats, and remove unneeded assert. include/ChangeLog: * opcode/arc.h (struct arc_opcode): Change type of opcode and mask fields. (struct arc_long_opcode): Delete. (struct arc_operand): Change types for insert and extract handlers. opcodes/ChangeLog: * arc-dis.c (struct arc_operand_iterator): Remove all fields relating to long instruction processing, add new limm field. (OPCODE): Rename to... (OPCODE_32BIT_INSN): ...this. (OPCODE_AC): Delete. (skip_this_opcode): Handle different instruction lengths, update macro name. (special_flag_p): Update parameter type. (find_format_from_table): Update for more instruction lengths. (find_format_long_instructions): Delete. (find_format): Update for more instruction lengths. (arc_insn_length): Likewise. (extract_operand_value): Update for more instruction lengths. (operand_iterator_next): Remove code relating to long instructions. (arc_opcode_to_insn_type): New function. (print_insn_arc):Update for more instructions lengths. * arc-ext.c (extInstruction_t): Change argument type. * arc-ext.h (extInstruction_t): Change argument type. * arc-fxi.h: Change type unsigned to unsigned long long extensively throughout. * arc-nps400-tbl.h: Add long instructions taken from arc_long_opcodes table in arc-opc.c. * arc-opc.c: Update parameter types on insert/extract handlers. (arc_long_opcodes): Delete. (arc_num_long_opcodes): Delete. (arc_opcode_len): Update for more instruction lengths. |
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Graham Markall
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06fe285fd2 |
arc: Replace ARC_SHORT macro with arc_opcode_len function
In preparation for moving to a world where arc instructions can be 2, 4, 6, or 8 bytes in length, replace the ARC_SHORT macro (which is either true of false) with an arc_opcode_len function that returns a length in bytes. There should be no functional change after this commit. gas/ChangeLog: * config/tc-arc.c (assemble_insn): Replace use of ARC_SHORT with arc_opcode_len. include/ChangeLog: * opcode/arc.h (arc_opcode_len): Declare. (ARC_SHORT): Delete. opcodes/ChangeLog: * arc-dis.c (find_format_from_table): Replace use of ARC_SHORT with arc_opcode_len. (find_format_long_instructions): Likewise. * arc-opc.c (arc_opcode_len): New function. |
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Graham Markall
|
91fdca6f26 |
gas/arc: Replace short_insn flag with insn length field
When assembling an instruction replace the short_insn boolean flag with an integer field for holding the instruction length. This is in preparation for moving to a world where instructions can be 2, 4, 6, or 8 bytes in length. gas/ChangeLog: * config/tc-arc.c (struct arc_insn): Replace short_insn flag with len field. (apply_fixups): Update to use len field. (emit_insn0): Simplify code, making use of len field. (md_convert_frag): Update to use len field. (assemble_insn): Update to use len field. |
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Andrew Burgess
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bb65a718b6 |
gas/arc: Don't rely on bfd list of cpu type for cpu selection
In the ARC assembler, when a cpu type is specified using the .cpu directive, we rely on the bfd list of arc machine types in order to validate the cpu name passed in. This validation is only used in order to check that the cpu type passed to the .cpu directive matches any machine type selected earlier on the command line. Once that initial check has passed a full check is performed using the assemblers internal list of know cpu types. The problem is that the assembler knows about more cpu types than bfd, some cpu types known by the assembler are actually aliases for a base cpu type plus a specific set of assembler extensions. One such example is NPS400, though more could be added later. This commit removes the need for the assembler to use the bfd list of machine types for validation. Instead the error checking, to ensure that any value passed to a '.cpu' directive matches any earlier command line selection, is moved into the function arc_select_cpu. I have taken the opportunity to bundle the 4 separate static globals that describe the currently selected machine type into a single structure (called selected_cpu). gas/ChangeLog: * config/tc-arc.c (arc_target): Delete. (arc_target_name): Delete. (arc_features): Delete. (arc_mach_type): Delete. (mach_type_specified_p): Delete. (enum mach_selection_type): New enum. (mach_selection_mode): New static global. (selected_cpu): New static global. (arc_eflag): Rename to ... (arc_initial_eflag): ...this, and make const. (arc_select_cpu): Update comment, new parameter, check how previous machine type selection was made, and record this selection. Use selected_cpu instead of old globals. (arc_option): Remove use of arc_get_mach, instead use arc_select_cpu to validate machine type selection. Use selected_cpu over old globals. (allocate_tok): Use selected_cpu over old globals. (find_opcode_match): Likewise. (assemble_tokens): Likewise. (arc_cons_fix_new): Likewise. (arc_extinsn): Likewise. (arc_extcorereg): Likewise. (md_begin): Update default machine type selection, use selected_cpu over old globals. (md_parse_option): Update machine type selection option handling, use selected_cpu over old globals. * testsuite/gas/arc/nps400-0.s: Add .cpu directive. bfd/ChangeLog: * cpu-arc.c (arc_get_mach): Delete. |
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Claudiu Zissulescu
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08ec958fe0 |
[ARC] Fix parsing leave_s and enter_s mnemonics.
gas/ 2016-10-06 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/leave_enter.d: New file. * testsuite/gas/arc/leave_enter.s: Likewise. * testsuite/gas/arc/regnames.d: Likewise. * testsuite/gas/arc/regnames.s: Likewise. * config/tc-arc.c (arc_parse_name): Don't match reg names against confirmed symbol names. |
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Alan Modra
|
1a0670f374 |
-Wimplicit-fallthrough warning fixes
Comment changes. bfd/ * coff-h8300.c: Spell fall through comments consistently. * coffgen.c: Likewise. * elf32-hppa.c: Likewise. * elf32-ppc.c: Likewise. * elf32-score.c: Likewise. * elf32-score7.c: Likewise. * elf64-ppc.c: Likewise. * elfxx-aarch64.c: Likewise. * elfxx-mips.c: Likewise. * cpu-ns32k.c: Add missing fall through comments. * elf-m10300.c: Likewise. * elf32-arm.c: Likewise. * elf32-avr.c: Likewise. * elf32-bfin.c: Likewise. * elf32-frv.c: Likewise. * elf32-i386.c: Likewise. * elf32-microblaze.c: Likewise. * elf32-nds32.c: Likewise. * elf32-ppc.c: Likewise. * elf32-rl78.c: Likewise. * elf32-rx.c: Likewise. * elf32-s390.c: Likewise. * elf32-sh.c: Likewise. * elf32-tic6x.c: Likewise. * elf64-ia64-vms.c: Likewise. * elf64-ppc.c: Likewise. * elf64-s390.c: Likewise. * elf64-x86-64.c: Likewise. * elflink.c: Likewise. * elfnn-aarch64.c: Likewise. * elfnn-ia64.c: Likewise. * ieee.c: Likewise. * oasys.c: Likewise. * pdp11.c: Likewise. * srec.c: Likewise. * versados.c: Likewise. opcodes/ * aarch64-opc.c: Spell fall through comments consistently. * i386-dis.c: Likewise. * aarch64-dis.c: Add missing fall through comments. * aarch64-opc.c: Likewise. * arc-dis.c: Likewise. * arm-dis.c: Likewise. * i386-dis.c: Likewise. * m68k-dis.c: Likewise. * mep-asm.c: Likewise. * ns32k-dis.c: Likewise. * sh-dis.c: Likewise. * tic4x-dis.c: Likewise. * tic6x-dis.c: Likewise. * vax-dis.c: Likewise. binutils/ * dlltool.c: Spell fall through comments consistently. * objcopy.c: Likewise. * readelf.c: Likewise. * dwarf.c: Add missing fall through comments. * elfcomm.c: Likewise. * sysinfo.y: Likewise. * readelf.c: Likewise. Also remove extraneous comments. gas/ * app.c: Add missing fall through comments. * dw2gencfi.c: Likewise. * expr.c: Likewise. * config/tc-alpha.c: Likewise. * config/tc-arc.c: Likewise. * config/tc-arm.c: Likewise. * config/tc-cr16.c: Likewise. * config/tc-crx.c: Likewise. * config/tc-dlx.c: Likewise. * config/tc-h8300.c: Likewise. * config/tc-hppa.c: Likewise. * config/tc-i370.c: Likewise. * config/tc-i386.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68hc11.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-metag.c: Likewise. * config/tc-microblaze.c: Likewise. * config/tc-mips.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-rx.c: Likewise. * config/tc-score.c: Likewise. * config/tc-score7.c: Likewise. * config/tc-sh.c: Likewise. * config/tc-tic4x.c: Likewise. * config/tc-vax.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z80.c: Likewise. * config/tc-z8k.c: Likewise. * config/obj-elf.c: Likewise. * config/tc-i386.c: Likewise. * depend.c: Spell fall through comments consistently. * config/tc-arm.c: Likewise. * config/tc-d10v.c: Likewise. * config/tc-i960.c: Likewise. * config/tc-ia64.c: Likewise. * config/tc-m68k.c: Likewise. * config/tc-mcore.c: Likewise. * config/tc-mep.c: Likewise. * config/tc-ns32k.c: Likewise. * config/tc-visium.c: Likewise. * config/tc-xstormy16.c: Likewise. * config/tc-z8k.c: Likewise. gprof/ * gprof.c: Add missing fall through comments. ld/ * lexsup.c: Spell fall through comments consistently and add missing fall through comments. |
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Alan Modra
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2b80414579 |
-Wimplicit-fallthrough error fixes
Well, not all are errors, but a little more substantive than just fiddling with comments. bfd/ * coffcode.h (coff_slurp_symbol_table): Revert accidental commit made 2015-01-08. * elf32-nds32.c (nds32_elf_grok_psinfo): Add missing break. * reloc.c (bfd_default_reloc_type_lookup): Add missing breaks. opcodes/ * arc-ext.c (create_map): Add missing break. * msp430-decode.opc (encode_as): Likewise. * msp430-decode.c: Regenerate. binutils/ * coffdump.c (dump_coff_where): Add missing break. * stabs.c (stab_xcoff_builtin_type): Likewise. gas/ * config/tc-arc.c (find_opcode_match): Add missing break. * config/tc-i960.c (get_cdisp): Likewise. * config/tc-metag.c (parse_swap, md_apply_fix): Likewise. * config/tc-mt.c (md_parse_option): Likewise. * config/tc-nds32.c (nds32_apply_fix): Likewise. * config/tc-hppa.c (pa_ip): Assert rather than testing last condition of multiple if statements. * config/tc-s390.c (s390_exp_compare): Return 0 on error. * config/tc-tic4x.c (tic4x_operand_parse): Add as_bad and break out of case rather than falling into next case. Formatting. ld/ * plugin.c (asymbol_from_plugin_symbol): Avoid compiler warning by adding return. |
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Claudiu Zissulescu
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32348c581b |
[ARC] Fix parsing dtpoff relocation expression.
The assembler accepts dtpoff complex relocation expression like identifier@dtpoff + const. However, it doesn't accept an expression such as identifier@dtpoff@base + const. This patch solves this issue, and adds a number of tests. ld/ 2016-09-14 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/ld-arc/tls-dtpoff.dd: New file. * testsuite/ld-arc/tls-dtpoff.rd: Likewise. * testsuite/ld-arc/tls-dtpoff.s: Likewise. * testsuite/ld-arc/tls-relocs.ld: Likewise. * testsuite/ld-arc/arc.exp: Add new tdpoff test. gas/ 2016-09-14 Claudiu Zissulescu <claziss@synopsys.com> * testsuite/gas/arc/tls-relocs2.d: New file. * testsuite/gas/arc/tls-relocs2.s: Likewise. * config/tc-arc.c (tokenize_arguments): Accept offsets when base is used. |
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Graham Markall
|
db18dbabad |
Begin implementing ARC NPS-400 Accelerator instructions
opcodes * arc-nps400-tbl.h: Change block comments to GNU format. * arc-dis.c: Add new globals addrtypenames, addrtypenames_max, and addtypeunknown. (get_addrtype): New function. (print_insn_arc): Print colons and address types when required. * arc-opc.c: Add MAKE_INSERT_NPS_ADDRTYPE macro and use to define insert and extract functions for all address types. (arc_operands): Add operands for colon and all address types. * arc-nps-400-tbl.h: Add NPS-400 BMU instructions to opcode table. * arc-opc.c: Add NPS_BD_TYPE and NPS_BMU_NUM operands, insert_nps_bd_num_buff and extract_nps_bd_num_buff functions. * arc-nps-400-tbl.h: Add NPS-400 PMU instructions to opcode table. * arc-opc.c: Add NPS_PMU_NXT_DST and NPS_PMU_NUM_JOB operands, insert_nps_pmu_num_job and extract_nps_pmu_num_job functions. include * opcode/arc.h: Add ARC_OPERAND_ADDRTYPE, ARC_OPERAND_COLON. Add the arc_nps_address_type enum and ARC_NUM_ADDRTYPES. * opcode/arc.h: Add BMU to insn_class_t enum. * opcode/arc.h: Add PMU to insn_class_t enum. gas * config/tc-arc.c: Add new global arc_addrtype_hash. Define O_colon and O_addrtype. (debug_exp): Add O_colon and O_addrtype. (tokenize_arguments): Handle colon and address type tokens. (declare_addrtype): New function. (md_begin): Initialise arc_addrtype_hash. (arc_parse_name): Add lookup of address types. (assemble_insn): Handle colons and address types by ignoring them. * testsuite/gas/arc/nps400-8.s: New file. * testsuite/gas/arc/nps400-8.d: New file. * testsuite/gas/arc/nps400-8.s: Add PMU instruction tests. * testsuite/gas/arc/nps400-8.d: Add expected PMU instruction output. |
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Claudiu Zissulescu
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05bbf0164a |
TLS: DTPOFF can accept offsets, stored into addendum. Remove the need of base
gas/ChangeLog: 2016-07-05 Claudiu Zissulescu <claziss@synopsys.com> * config/tc-arc.c (arc_reloc_op_tag): Allow complex ops for dtpoff. (tc_gen_reloc): Remove passing DTPOFF base info into reloc addendum as it is no longer needed. Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com> |
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Andrew Burgess
|
9004b6bd58 |
Allow ARC target to be configured with --with-cpu=<cpu-name>.
gas * config.in (TARGET_WITH_CPU): Undefine. * configure.ac: Add --with-cpu support, and define in config.h. * configure: Regenerate. * config/tc-arc.c: Use TARGET_WITH_CPU to select default CPU. * NEWS: Mention new configure option. |
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Vineet Gupta
|
45a54ee577 |
Make the kernel dwarf stack unwinder work for ARC targets.
* config//tc-arc.c (tc_arc_frame_initial_instructions): Use cfi_add_CFA_def_cfa to generate default CFA with offset * testsuite/gas/cfi/cfi-arc-1.d: Update expected output. |
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Graham Markall
|
ce440d638d |
[ARC] Misc minor edits/fixes
The code supporting -mspfp, -mdpfp, and -mfpuda options are in sections of code that are commented as being for backward compatibility only, and having no effect. However, they do have an effect, enabling the SPX, DPX, and DPA instruction subclasses respectively. This commit moves the code supporting these options away from the comments indicating that they are dummy options, and also fixes a small issue where -mnps400 had the additional effect of enabling SPX instructions. A couple of other minor edits (that make no functional change) are also included. gas/ChangeLog: * config/tc-arc.c (options, md_longopts, md_parse_option): Move -mspfp, -mdpfp and -mfpuda out of the sections for dummy options. Correct erroneous enabling of SPFP instructions when using -mnps400. include/ChangeLog: * opcode/arc.h: Make insn_class_t alphabetical again. opcodes/ChangeLog: * arc-opc.c: Correct description of availability of NPS400 features. |
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Graham Markall
|
bdd582dbf1 |
Arc assembler: Convert nps400 from a machine type to an extension.
gas * config/tc-arc.c (check_cpu_feature, md_parse_option): Add nps400 option and feature. Add check for nps400 feature. Refactor existing checks to check subclass before feature enablement. (md_show_usage): Document flags for NPS-400 and add some other undocumented flags. (cpu_type): Remove nps400 CPU type entry (check_zol): Remove bfd_mach_arc_nps400 case. (md_show_usage): Add help on -mcpu=nps400. (cpu_types): Add entry for nps400 as arc700 plus nps400 extension set. * doc/c-arc.texi: Document the -mnps400, -mspfp, -mdpfp, and -fpuda flags. Document -mcpu=nps400. * testsuite/gas/arc/nps-400-0.d: Use -mcpu=arc700 -mnps400. Change expected flags to match ARC700 instead of NPS400. * testsuite/gas/arc/nps-400-1.d: Use -mcpu=arc700 -mnps400. * testsuite/gas/arc/nps-400-2.d: Likewise. * testsuite/gas/arc/nps-400-3.d: Likewise. * testsuite/gas/arc/nps-400-4.d: Likewise. * testsuite/gas/arc/nps-400-5.d: Likewise. * testsuite/gas/arc/nps-400-6.d: Likewise. * testsuite/gas/arc/nps-400-7.d: Likewise. * testsuite/gas/arc/textinsn2op01.s: Change opcode of myinsn to avoid clash with cbba instruction. * testsuite/gas/arc/textinsn2op01.d: Likewise. * testsuite/gas/arc/textinsn3op.d: Likewise. * testsuite/gas/arc/textinsn3op.s: Likewise. * testsuite/gas/arc/nps-400-0.d: Test using NPS-400 using -mcpu=nps400 as an alternative to -mcpu=arc700 -mnps400 flags. binutils* readelf.c (decode_ARC_machine_flags): Remove E_ARC_MACH_NPS400 case. ld * testsuite/ld-arc/nps-1a.d: Use -mcpu=arc700 -mnps400. * testsuite/ld-arc/nps-1b.d: Likewise. include * opcode/arc.h: Add nps400 extension and instruction subclass. Remove ARC_OPCODE_NPS400 * elf/arc.h: Remove E_ARC_MACH_NPS400 opcodes * arc-dis.c (arc_insn_length): Add comment on instruction length. Use same method for determining instruction length on ARC700 and NPS-400. (arc_insn_length, print_insn_arc): Remove bfd_mach_arc_nps400. * arc-nps400-tbl.h: Make all nps400 instructions ARC700 instructions with the NPS400 subclass. * arc-opc.c: Likewise. bfd * archures.c: Remove bfd_mach_arc_nps400. * bfd-in2.h: Likewise. * cpu-arc.c (arch_info_struct): Likewise. * elf32-arc.c (arc_elf_object_p, arc_elf_final_write_processing): Likewise. |
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Nick Clifton
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69c9e028b6 |
Fix compile time warning messages building with gcc v6.1.1
etc * texi2pod.pl: Escape curly braces, whilst searching for keyword strong. gas * config/tc-arm.c: For non-ELF based targets skip ARM feature sets that are not supported. * config/tc-arc.c (md_apply_fix): Avoid left shifting a signed constant. * config/tc-cr16.c (check_range): Likewise. * config/tc-nios2.c (nios2_check_overflow): Likewise. |