These relocations should have had REL in their names, to reflect the
fact that they are pc-relative. Fix that now by adding _PCREL.
I've added some back-compatibility code to support anyone using
.reloc with the old relocations.
include/
* elf/ppc64.h (elf_ppc64_reloc_type): Rename
R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
bfd/
* reloc.c: Rename
BFD_RELOC_PPC64_GOT_TLSGD34 to BFD_RELOC_PPC64_GOT_TLSGD_PCREL34,
BFD_RELOC_PPC64_GOT_TLSLD34 to BFD_RELOC_PPC64_GOT_TLSLD_PCREL34,
BFD_RELOC_PPC64_GOT_TPREL34 to BFD_RELOC_PPC64_GOT_TPREL_PCREL34,
BFD_RELOC_PPC64_GOT_DTPREL34 to BFD_RELOC_PPC64_GOT_DTPREL_PCREL34.
* elf64-ppc.c: Update throughout for reloc renaming.
(ppc64_elf_reloc_name_lookup): Handle old reloc names.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* config/tc-ppc.c: Update throughout for reloc renaming.
elfcpp/
* powerpc.h: Rename
R_PPC64_GOT_TLSGD34 to R_PPC64_GOT_TLSGD_PCREL34,
R_PPC64_GOT_TLSLD34 to R_PPC64_GOT_TLSLD_PCREL34,
R_PPC64_GOT_TPREL34 to R_PPC64_GOT_TPREL_PCREL34, and
R_PPC64_GOT_DTPREL34 to R_PPC64_GOT_DTPREL_PCREL34.
gold/
* powerpc.cc: Update throughout for reloc renaming.
PR 25882
bfd/
* elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): Don't init FP
attributes from shared libraries, and do not return an error if
they don't match.
gold/
* powerpc.cc (merge_object_attributes): Replace name param with
obj param. Update callers. Don't init FP attributes from shared
libraries, and do not emit an error if they don't match.
sym->object() could be either a Plugin or Powerpc_relobj. There could
be a situation when Pluginobj would be proccessed in
ppc_object->get_opd_ent(dst_off) as Powerpc_relobj and it leads to the
segmentation fault.
* powerpc.cc (do_gc_mark_symbol): Don't segfault on plugin symbols.
Now that ISA3.1 is out we can finish with the powerxx silliness.
bfd/
* elf64-ppc.c: Rename powerxx to power10 throughout.
gas/
* config/tc-ppc.c (md_assemble): Update for PPC_OPCODE_POWER10
renaming.
* testsuite/gas/ppc/prefix-align.d: Use -mpower10/-Mpower10 in
place of -mfuture/-Mfuture.
* testsuite/gas/ppc/prefix-pcrel.d: Likewise.
* testsuite/gas/ppc/prefix-reloc.d: Likewise.
gold/
* powerpc.cc: Rename powerxx to power10 throughout.
include/
* elf/ppc64.h: Update comment.
* opcode/ppc.h (PPC_OPCODE_POWER10): Rename from PPC_OPCODE_POWERXX.
ld/
* testsuite/ld-powerpc/callstub-1.d: Use -mpower10/-Mpower10 in
place of -mfuture/-Mfuture.
* testsuite/ld-powerpc/notoc2.d: Likewise.
* testsuite/ld-powerpc/powerpc.exp: Likewise.
* testsuite/ld-powerpc/tlsgd.d: Likewise.
* testsuite/ld-powerpc/tlsie.d: Likewise.
* testsuite/ld-powerpc/tlsld.d: Likewise.
opcodes/
* ppc-dis.c (ppc_opts): Add "power10" entry.
(print_insn_powerpc): Update for PPC_OPCODE_POWER10 renaming.
* ppc-opc.c (POWER10): Rename from POWERXX. Update all uses.
Since GCC 10 defaults to -fno-common, add -fcommon to common tests to
force common behavior.
PR gold/25904
* testsuite/Makefile.am (COMMON_TEST_C_CFLAGS): New.
(common_test_1.o): New rule.
(common_test_2.o): Likewise.
(common_test_3.o): Likewise.
(plugin_common_test_1.o): Likewise.
(plugin_common_test_2.o): Likewise.
(common_test_1_v1.o): Likewise.
(common_test_1_v2.o): Likewise.
(common_test_2_pic.o): Compile with $(COMMON_TEST_C_CFLAGS).
(common_test_3_pic.o): Likewise.
* testsuite/Makefile.in: Regenerated.
GCC 9 generates the same function size for Ordering::operator() in
odr_violation1.cc and odr_violation2.cc on x32:
134: 00000000 31 FUNC WEAK DEFAULT 64 _ZN8OrderingclEii
40: 00000000 31 FUNC GLOBAL DEFAULT 10 _ZN8OrderingclEii
This patch makes Ordering::operator() even more complex
134: 00000000 31 FUNC WEAK DEFAULT 64 _ZN8OrderingclEii
42: 00000000 35 FUNC GLOBAL DEFAULT 11 _ZN8OrderingclEii
* testsuite/odr_violation2.cc (Ordering::operator()): Make
expression even more complex.
Handle local IFUNC symbol for APLT like global IFUNC symbol.
PR gold/25872
* x86_64.cc (Output_data_plt_x86_64_bnd::do_address_for_local):
Handle local IFUNC symbol.
(Output_data_plt_x86_64_ibt::do_address_for_local): Likewise.
This patch arranges to have OSABI set to ELFOSABI_GNU (if not set to
some other non-zero value) when gold outputs an ifunc local or global
symbol, or a unique global symbol to either .dynsym or .symtab.
STT_GNU_IFUNC and STB_GNU_UNIQUE have values in the LOOS to HIOS range
and therefore require interpretation according to OSABI.
I'm not sure why parameters->target() is const Target& while
parameters->sized_target() is Sized_target*, but it's inconvenient to
use the latter in Symbol_table::finalize. So this patch adds another
const_cast complained about in layout.cc and gold.cc.
PR 24853
* symtab.h (set_has_gnu_output, has_gnu_output_): New.
* symtab.cc (Symbol_table::Symbol_table): Init has_gnu_output_.
(Symbol_table::finalize): Set ELFOSABI_GNU when has_gnu_output_.
(Symbol_table::set_dynsym_indexes, Symbol_table::sized_finalize):
Call set_has_gnu_output for STT_GNU_IFUNC and STB_GNU_UNIQUE globals.
* object.cc (Sized_relobj_file::do_finalize_local_symbols): Call
set_has_gnu_output when STT_GNU_IFUNC locals will be output.
An R_386_GOTOFF relocation has an addend, typically used when a
symbol can be replaced by its section symbol plus an offset.
psymval->value(object,0) is quite wrong then, fix it.
PR 16794
* i386.cc (Target_i386::Relocate::relocate <R_386_GOTOFF>): Don't
ignore addend, apply using pcrel32.
* x86_64.cc (Target_x86_64::Relocate::relocate <R_X86_64_GOTOFF64>):
Similarly use pcrel64.
lto_slim_object_ was unitialized. I also thought it worth adding
a sanity check on the .gnu.lto_.lto.* section size, and made some
other tidies.
PR 24768
* layout.cc (Layout::Layout): Init lto_slim_object_.
* object.cc (Sized_relobj_file::do_layout): Wrap overlong line.
Don't use C cast. Validate section size. Don't copy contents.
This patch corrects the set of dynamic relocations recognised by gold
as supported by glibc, and teaches ld.bfd to report an error similar
to the gold error. Note that ld --noinhibit-exec can be used to
produce an output, supporting older ld with newer glibc if the set of
supported glibc dynamic relocations changes.
bfd/
* elf64-ppc.c (ppc64_glibc_dynamic_reloc): New function.
(ppc64_elf_relocate_section): Error if emitting unsupported
dynamic relocations.
gold/
* powerpc.cc (Target_powerpc::Scan::check_non_pic): Move REL24
to 32-bit supported.
I get some spurious changes when running autoconf/automake for various
projects in the tree. This is likely because they were generated using
distro-patched tools last time.
I ran `autoreconf -f` in the various automake projects of the
binutils-gdb tree, and this is the result. The tools I am using have
been compiled from source, from the upstream release.
bfd/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
* doc/Makefile.in: Re-generate.
binutils/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
* doc/Makefile.in: Re-generate.
gas/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
* doc/Makefile.in: Re-generate.
gold/ChangeLog:
* testsuite/Makefile.in: Re-generate.
gprof/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
ld/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
opcodes/ChangeLog:
* Makefile.in: Re-generate.
* configure: Re-generate.
2019-08-16 Martin Liska <mliska@suse.cz>
PR ld/24912
* elflink.c: Report error only for not relocatable.
* linker.c (_bfd_generic_link_add_one_symbol): Do not handle
here lto_slim_object as it's handled in caller.
2019-08-16 Martin Liska <mliska@suse.cz>
PR ld/24912
* object.cc (big_endian>::do_layout): Do not report error,
but only set a flag.
(big_endian>::do_add_symbols): Report error only for when
relocatable.
Gold version of git commit c213164ad2.
elfcpp/
* powerpc.h (R_PPC64_TPREL34, R_PPC64_DTPREL34),
(R_PPC64_GOT_TLSGD34, R_PPC64_GOT_TLSLD34),
(R_PPC64_GOT_TPREL34, R_PPC64_GOT_DTPREL34): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Set
flags for new relocations, and some missing older relocs.
(Target_powerpc::Scan::local): Handle new pcrel tls relocs.
Call set_has_static_tls for tprel relocs.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Handle new pcrel tls relocs.
Relocations with right shifts were calculating wrong overflow status.
Since the addr34 split-field reloc is implemented as an 18-bit high
part with value shifted right by 16 and a 16-bit low part, most of the
pc-relative relocs were affected.
* powerpc.cc (Powerpc_relocate_functions::rela, rela_ua): Perform
signed right shift for signed overflow check.
Note that gold won't remove unused GOT entries, in contrast to ld.bfd
which will.
* powerpc.cc (Powerpc_relobj::make_got_relative): New function.
(relative_value_is_known): New functions.
(Target_powerpc::Relocate::relocate): Edit code using
GOT16_HA, GOT16_LO_DS, and GOT_PCREL34 relocs.
When generating notoc call and branch stubs without the benefit of
pc-relative insns, the stubs need to use LR to access the run time PC.
All LR changes must be described in .eh_frame if we're to support
unwinding through asynchronous exceptions. That's what this patch
does.
The patch has gone through way too many iterations. At first I
attempted to add multiple FDEs, one for each stub. That ran into
difficulties with do_plt_fde_location which is only capable of setting
the address of a single FDE per Output_data section, and with removing
any FDEs added on a previous do_relax pass. Removing FDEs (git commit
be897fb774) went overboard in matching the FDE contents. That means
either stashing the contents created for add_eh_frame_for_plt to use
when calling remove_eh_frame_for_plt, or recreating contents on the
fly (*) just to remove FDEs. In fact, FDE content matching is quite
unnecesary. FDEs added by a previous do_relax pass are those with
u_.from_linker.post_map set. So they can easily be recognised just by
looking at that flag. This patch keeps that part of the multiple FDE
changes.
In the end I went for just one FDE per stub group to describe the call
stubs. That's reasonably efficient for the common case of only
needing to describe the __tls_get_addr_opt call stub. We don't expect
to be making many calls using notoc stubs without pc-relative insns.
*) Which has it's own set of problems. The contents must be recreated
using the old stub layout, but .eh_frame size can affect stub
requirements so you need to temporarily keep the old .eh_frame size
when creating new stubs, then reset .eh_frame size before adding new
FDEs.
* ehframe.cc (Fde::operator==): Delete.
(Cie::remove_fde): Delete.
(Eh_frame::remove_ehframe_for_plt): Delete fde_data and fde_length
parameters. Remove all post-map plt FDEs.
* ehframe.h (Fde:post_map): Make const, add variant to compare plt.
(Fde::operator==): Delete.
(Cie::remove_fde): Implement here.
(Cie::last_fde): New accessor.
(Eh_frame::remove_ehframe_for_plt): Update prototype.
* layout.cc (Layout::remove_eh_frame_for_plt): Delete fde_data and
fde_length parameters.
* layout.h (Layout::remove_eh_frame_for_plt): Update prototype.
* powerpc.cc (Stub_table::tls_get_addr_opt_bctrl_): Delete.
(Stub_table::plt_fde_len_, plt_fde_, init_plt_fde): Delete.
(Stub_table::add_plt_call_entry): Don't set tls_get_addr_opt_bctrl_.
(eh_advance): New function.
(stub_sort): New function.
(Stub_table::add_eh_frame): Emit eh_frame for notoc plt calls and
branches as well as __tls_get_addr_opt plt call stub.
(Stub_table::remove_eh_frame): Update to suit.
Calls from notoc functions via the PLT need different stubs. Even
calls to local functions requiring a valid toc pointer must go via a
stub. This patch provides the support in gold.
elfcpp/
* powerpc.h (R_PPC64_PLTSEQ_NOTOC, R_PPC64_PLTCALL_NOTOC): Define.
gold/
* powerpc.cc (Target_powerpc::maybe_skip_tls_get_addr_call): Handle
notoc calls.
(is_branch_reloc): Template on size. Return true for REL24_NOTOC.
Update all callers.
(max_branch_delta): Likewise.
(Target_powerpc::Branch_info::make_stub): Add a stub for notoc
calls to functions needing a valid toc pointer.
(Target_powerpc::do_relax): Layout stubs again if any need resize.
(add_12_11_12, addi_12_11, addis_12_11, ldx_12_11_12, ori_12_12_0),
(oris_12_12_0, sldi_12_12_32): Define.
(Stub_table::Plt_stub_ent): Add notoc_ and iter_ fields.
(Stub_table::Branch_stub_key, Branch_stub_key_hash): Rename from
Branch_stub_ent and Branch_stub_ent hash. Remove save_res_ from key.
(Stub_table::Branch_stub_ent): New struct.
(class Stub_table): Add need_resize and resizing vars.
(Stub_table::need_resize, branch_size): New accessors.
(Stub_table::set_resizing): New function.
(Stub_table::add_plt_call_entry): Handle notoc calls and resizing
on seeing such or a tocsave stubs after a normal stub using the
same sym.
(Stub_table::add_long_branch_entry): Similarly.
(Stub_table::find_long_branch_entry): Return a Branch_stub_ent*.
(Stub_table::define_stub_syms): Adjust
(Stub_table::build_tls_opt_head, build_tls_opt_tail): New functions.
(build_notoc_offset): New function.
(Stub_table::plt_call_size): Move out of line. Handle notoc calls.
(Stub_table::branch_stub_size): Similarly.
(Stub_table::do_write): Separate loop for ELFv2 stubs, handling
notoc calls. Simplify ELFv1 loop. Output notoc branch stubs.
Use build_tls_opt_head and build_tls_opt_tail.
(Target_powerpc::Scan::get_reference_flags): Handle REL24_NOTOC.
(Target_powerpc::Scan::reloc_needs_plt_for_ifunc): Likewise,
and PLTSEQ_NOTOC and PLTCALL_NOTOC.
(Target_powerpc::Scan::local, global, relocate): Likewise.
There is a call of relocate() to perform a single relocation. In that
case the "relnum" parameter is -1U and of course it isn't appropriate
to consider any of the PowerPC code sequence optimisations triggered
by a following relocation.
* powerpc.cc (Target_powerpc::Relocate::relocate): Don't look
at next/previous reloc when relnum is -1.
This fixes a segfault when attempring to output a "linkage table
error". "object" is only non-NULL in the local symbol case.
* powerpc.cc (Stub_table::plt_error): New function.
(Stub_table::do_write): Use it.
(Output_data_glink::do_write): Don't segfault emitting linkage
table error.
These relocs have been around for quite a while. It's past time gold
supported them.
elfcpp/
* powerpc.h (R_PPC64_REL16_HIGH, R_PPC64_REL16_HIGHA),
(R_PPC64_REL16_HIGHER, R_PPC64_REL16_HIGHERA),
(R_PPC64_REL16_HIGHEST, R_PPC64_REL16_HIGHESTA): Define.
gold/
* powerpc.cc (Target_powerpc::Scan::get_reference_flags): Handle
REL16_HIGH* relocs.
(Target_powerpc::Scan::local): Likewise.
(Target_powerpc::Scan::global): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
PR gold/21066
* gc.h (gc_process_relocs): Track relocations in .eh_frame sections
when ICF is enabled, even though the .eh_frame sections themselves
are not foldable.
* icf.cc (get_section_contents): Change arguments to permit operation
on just part of a section. Include extra identity regions in the
referring section's contents recursively.
(match_sections): Lock object here instead of in get_section_contents
so that get_section_contents can operate recursively.
(Icf::add_ehframe_links): New method.
(Icf::find_identical_sections): Pass .eh_frame sections to
add_ehframe_links(). Increase default iteration count from 2 to 3
because handling exception info typically requires one extra iteration.
* icf.h (Icf::extra_identity_list_): New data member with accessor.
(is_section_foldable_candidate): Include .gcc_except_table sections.
* options.h: Update documentation for new default ICF iteration count.
* testsuite/Makefile.am (icf_test_pr21066): New test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/icf_test_pr21066.cc: New source file.
* testsuite/icf_test_pr21066.sh: New test script.
2019-02-19 Egeyar Bagcioglu <egeyar.bagcioglu@oracle.com>
gold/
PR gold/23870
* aarch64.cc (Target_aarch64::Scan::global): Check if a symbol with
R_AARCH64_MOVW_.ABS_* relocations requires a PLT entry.
* testsuite/Makefile.am: Add aarch64_pr23870 test case.
* testsuite/Makefile.in: Regenerate.
* testsuite/aarch64_pr23870_bar.c: New file.
* testsuite/aarch64_pr23870_foo.c: New file.
* testsuite/aarch64_pr23870_main.S: New file.
